1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 18 * NO WARRANTY 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29 * THE POSSIBILITY OF SUCH DAMAGES. 30 */ 31 32#include <sys/cdefs.h> 33__FBSDID("$FreeBSD$"); 34 35/* 36 * Broadcom Common PCIe-G2 Support. 37 * 38 * This base driver implementation is shared by the bhnd_pcib_g2 (root complex) 39 * and bhnd_pci_hostb_g2 (host bridge) drivers. 40 */ 41 42#include <sys/param.h> 43#include <sys/malloc.h> 44#include <sys/kernel.h> 45#include <sys/bus.h> 46#include <sys/module.h> 47#include <sys/systm.h> 48 49#include <machine/bus.h> 50#include <sys/rman.h> 51#include <machine/resource.h> 52 53#include <dev/bhnd/bhnd.h> 54#include <dev/mdio/mdio.h> 55 56#include "bhnd_pcie2_reg.h" 57#include "bhnd_pcie2_var.h" 58 59static struct bhnd_device_quirk bhnd_pcie2_quirks[]; 60 61#define BHND_PCIE_DEV(_core, _desc, ...) \ 62 BHND_DEVICE(BCM, _core, _desc, bhnd_pcie2_quirks, ## __VA_ARGS__) 63 64static const struct bhnd_device bhnd_pcie2_devs[] = { 65 BHND_PCIE_DEV(PCIE2, "PCIe-G2 Host-PCI bridge", BHND_DF_HOSTB), 66 BHND_PCIE_DEV(PCIE2, "PCIe-G2 PCI-BHND bridge", BHND_DF_SOC), 67 68 BHND_DEVICE_END 69}; 70 71/* Device quirks tables */ 72static struct bhnd_device_quirk bhnd_pcie2_quirks[] = { 73 BHND_DEVICE_QUIRK_END 74}; 75 76int 77bhnd_pcie2_generic_probe(device_t dev) 78{ 79 const struct bhnd_device *id; 80 81 id = bhnd_device_lookup(dev, bhnd_pcie2_devs, 82 sizeof(bhnd_pcie2_devs[0])); 83 if (id == NULL) 84 return (ENXIO); 85 86 bhnd_set_custom_core_desc(dev, id->desc); 87 return (BUS_PROBE_DEFAULT); 88} 89 90int 91bhnd_pcie2_generic_attach(device_t dev) 92{ 93 struct bhnd_pcie2_softc *sc; 94 int error; 95 96 sc = device_get_softc(dev); 97 sc->dev = dev; 98 sc->quirks = bhnd_device_quirks(dev, bhnd_pcie2_devs, 99 sizeof(bhnd_pcie2_devs[0])); 100 101 /* Allocate bus resources */ 102 sc->mem_res = bhnd_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid, 103 RF_ACTIVE); 104 if (sc->mem_res == NULL) 105 return (ENXIO); 106 107 BHND_PCIE2_LOCK_INIT(sc); 108 109 /* Probe and attach children */ 110 if ((error = bus_generic_attach(dev))) 111 goto cleanup; 112 113 return (0); 114 115cleanup: 116 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res); 117 BHND_PCIE2_LOCK_DESTROY(sc); 118 119 return (error); 120} 121 122int 123bhnd_pcie2_generic_detach(device_t dev) 124{ 125 struct bhnd_pcie2_softc *sc; 126 int error; 127 128 sc = device_get_softc(dev); 129 130 if ((error = bus_generic_detach(dev))) 131 return (error); 132 133 bhnd_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem_res); 134 135 BHND_PCIE2_LOCK_DESTROY(sc); 136 137 return (0); 138} 139 140static struct resource_list * 141bhnd_pcie2_get_resource_list(device_t dev, device_t child) 142{ 143 struct bhnd_pcie2_devinfo *dinfo; 144 145 if (device_get_parent(child) != dev) 146 return (NULL); 147 148 dinfo = device_get_ivars(child); 149 return (&dinfo->resources); 150} 151 152static device_t 153bhnd_pcie2_add_child(device_t dev, u_int order, const char *name, int unit) 154{ 155 struct bhnd_pcie2_devinfo *dinfo; 156 device_t child; 157 158 child = device_add_child_ordered(dev, order, name, unit); 159 if (child == NULL) 160 return (NULL); 161 162 dinfo = malloc(sizeof(struct bhnd_pcie2_devinfo), M_DEVBUF, M_NOWAIT); 163 if (dinfo == NULL) { 164 device_delete_child(dev, child); 165 return (NULL); 166 } 167 168 resource_list_init(&dinfo->resources); 169 170 device_set_ivars(child, dinfo); 171 return (child); 172} 173 174static void 175bhnd_pcie2_child_deleted(device_t dev, device_t child) 176{ 177 struct bhnd_pcie2_devinfo *dinfo; 178 179 if (device_get_parent(child) != dev) 180 return; 181 182 dinfo = device_get_ivars(child); 183 if (dinfo != NULL) { 184 resource_list_free(&dinfo->resources); 185 free(dinfo, M_DEVBUF); 186 } 187 188 device_set_ivars(child, NULL); 189} 190 191int 192bhnd_pcie2_generic_suspend(device_t dev) 193{ 194 return (bus_generic_suspend(dev)); 195} 196 197int 198bhnd_pcie2_generic_resume(device_t dev) 199{ 200 return (bus_generic_resume(dev)); 201} 202 203/** 204 * Read a 32-bit PCIe TLP/DLLP/PLP protocol register. 205 * 206 * @param sc The bhndb_pci driver state. 207 * @param addr The protocol register offset. 208 */ 209uint32_t 210bhnd_pcie2_read_proto_reg(struct bhnd_pcie2_softc *sc, uint32_t addr) 211{ 212 // TODO 213 return (ENXIO); 214} 215 216/** 217 * Write a 32-bit PCIe TLP/DLLP/PLP protocol register value. 218 * 219 * @param sc The bhndb_pci driver state. 220 * @param addr The protocol register offset. 221 * @param val The value to write to @p addr. 222 */ 223void 224bhnd_pcie2_write_proto_reg(struct bhnd_pcie2_softc *sc, uint32_t addr, 225 uint32_t val) 226{ 227 // TODO 228 panic("unimplemented"); 229} 230 231int 232bhnd_pcie2_mdio_read(struct bhnd_pcie2_softc *sc, int phy, int reg) 233{ 234 // TODO 235 return (ENXIO); 236} 237 238int 239bhnd_pcie2_mdio_write(struct bhnd_pcie2_softc *sc, int phy, int reg, int val) 240{ 241 // TODO 242 return (ENXIO); 243} 244 245int 246bhnd_pcie2_mdio_read_ext(struct bhnd_pcie2_softc *sc, int phy, int devaddr, 247 int reg) 248{ 249 // TODO 250 return (ENXIO); 251} 252 253int 254bhnd_pcie2_mdio_write_ext(struct bhnd_pcie2_softc *sc, int phy, int devaddr, 255 int reg, int val) 256{ 257 // TODO 258 return (ENXIO); 259} 260 261static device_method_t bhnd_pcie2_methods[] = { 262 /* Device interface */ 263 DEVMETHOD(device_probe, bhnd_pcie2_generic_probe), 264 DEVMETHOD(device_attach, bhnd_pcie2_generic_attach), 265 DEVMETHOD(device_detach, bhnd_pcie2_generic_detach), 266 DEVMETHOD(device_suspend, bhnd_pcie2_generic_suspend), 267 DEVMETHOD(device_resume, bhnd_pcie2_generic_resume), 268 269 /* Bus interface */ 270 DEVMETHOD(bus_add_child, bhnd_pcie2_add_child), 271 DEVMETHOD(bus_child_deleted, bhnd_pcie2_child_deleted), 272 DEVMETHOD(bus_print_child, bus_generic_print_child), 273 DEVMETHOD(bus_get_resource_list, bhnd_pcie2_get_resource_list), 274 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 275 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 276 DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource), 277 278 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 279 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 280 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 281 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 282 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 283 284 DEVMETHOD_END 285}; 286 287DEFINE_CLASS_0(bhnd_pcie2, bhnd_pcie2_driver, bhnd_pcie2_methods, 288 sizeof(struct bhnd_pcie2_softc)); 289MODULE_DEPEND(bhnd_pcie2, bhnd, 1, 1, 1); 290MODULE_DEPEND(bhnd_pcie2, pci, 1, 1, 1); 291MODULE_VERSION(bhnd_pcie2, 1); 292