1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) Peter Wemm <peter@netplex.com.au> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31#ifndef _MACHINE_PCPU_H_ 32#define _MACHINE_PCPU_H_ 33 34#ifndef _SYS_CDEFS_H_ 35#error "sys/cdefs.h is a prerequisite for this file" 36#endif 37 38#define PC_PTI_STACK_SZ 16 39/* 40 * The SMP parts are setup in pmap.c and locore.s for the BSP, and 41 * mp_machdep.c sets up the data for the AP's to "see" when they awake. 42 * The reason for doing it via a struct is so that an array of pointers 43 * to each CPU's data can be set up for things like "check curproc on all 44 * other processors" 45 */ 46#define PCPU_MD_FIELDS \ 47 char pc_monitorbuf[128] __aligned(128); /* cache line */ \ 48 struct pcpu *pc_prvspace; /* Self-reference */ \ 49 struct pmap *pc_curpmap; \ 50 struct amd64tss *pc_tssp; /* TSS segment active on CPU */ \ 51 struct amd64tss *pc_commontssp;/* Common TSS for the CPU */ \ 52 uint64_t pc_kcr3; \ 53 uint64_t pc_ucr3; \ 54 uint64_t pc_saved_ucr3; \ 55 register_t pc_rsp0; \ 56 register_t pc_scratch_rsp; /* User %rsp in syscall */ \ 57 register_t pc_scratch_rax; \ 58 u_int pc_apic_id; \ 59 u_int pc_acpi_id; /* ACPI CPU id */ \ 60 /* Pointer to the CPU %fs descriptor */ \ 61 struct user_segment_descriptor *pc_fs32p; \ 62 /* Pointer to the CPU %gs descriptor */ \ 63 struct user_segment_descriptor *pc_gs32p; \ 64 /* Pointer to the CPU LDT descriptor */ \ 65 struct system_segment_descriptor *pc_ldt; \ 66 /* Pointer to the CPU TSS descriptor */ \ 67 struct system_segment_descriptor *pc_tss; \ 68 uint64_t pc_pm_save_cnt; \ 69 u_int pc_cmci_mask; /* MCx banks for CMCI */ \ 70 uint64_t pc_dbreg[16]; /* ddb debugging regs */ \ 71 uint64_t pc_pti_stack[PC_PTI_STACK_SZ]; \ 72 register_t pc_pti_rsp0; \ 73 int pc_dbreg_cmd; /* ddb debugging reg cmd */ \ 74 u_int pc_vcpu_id; /* Xen vCPU ID */ \ 75 uint32_t pc_pcid_next; \ 76 uint32_t pc_pcid_gen; \ 77 uint32_t pc_smp_tlb_done; /* TLB op acknowledgement */ \ 78 uint32_t pc_ibpb_set; \ 79 void *pc_mds_buf; \ 80 void *pc_mds_buf64; \ 81 uint32_t pc_pad[2]; \ 82 uint8_t pc_mds_tmp[64]; \ 83 char __pad[3176] /* pad to UMA_PCPU_ALLOC_SIZE */ 84 85#define PC_DBREG_CMD_NONE 0 86#define PC_DBREG_CMD_LOAD 1 87 88#ifdef _KERNEL 89 90#if defined(__GNUCLIKE_ASM) && defined(__GNUCLIKE___TYPEOF) 91 92/* 93 * Evaluates to the byte offset of the per-cpu variable name. 94 */ 95#define __pcpu_offset(name) \ 96 __offsetof(struct pcpu, name) 97 98/* 99 * Evaluates to the type of the per-cpu variable name. 100 */ 101#define __pcpu_type(name) \ 102 __typeof(((struct pcpu *)0)->name) 103 104/* 105 * Evaluates to the address of the per-cpu variable name. 106 */ 107#define __PCPU_PTR(name) __extension__ ({ \ 108 __pcpu_type(name) *__p; \ 109 \ 110 __asm __volatile("movq %%gs:%1,%0; addq %2,%0" \ 111 : "=r" (__p) \ 112 : "m" (*(struct pcpu *)(__pcpu_offset(pc_prvspace))), \ 113 "i" (__pcpu_offset(name))); \ 114 \ 115 __p; \ 116}) 117 118/* 119 * Evaluates to the value of the per-cpu variable name. 120 */ 121#define __PCPU_GET(name) __extension__ ({ \ 122 __pcpu_type(name) __res; \ 123 struct __s { \ 124 u_char __b[MIN(sizeof(__pcpu_type(name)), 8)]; \ 125 } __s; \ 126 \ 127 if (sizeof(__res) == 1 || sizeof(__res) == 2 || \ 128 sizeof(__res) == 4 || sizeof(__res) == 8) { \ 129 __asm __volatile("mov %%gs:%1,%0" \ 130 : "=r" (__s) \ 131 : "m" (*(struct __s *)(__pcpu_offset(name)))); \ 132 *(struct __s *)(void *)&__res = __s; \ 133 } else { \ 134 __res = *__PCPU_PTR(name); \ 135 } \ 136 __res; \ 137}) 138 139/* 140 * Adds the value to the per-cpu counter name. The implementation 141 * must be atomic with respect to interrupts. 142 */ 143#define __PCPU_ADD(name, val) do { \ 144 __pcpu_type(name) __val; \ 145 struct __s { \ 146 u_char __b[MIN(sizeof(__pcpu_type(name)), 8)]; \ 147 } __s; \ 148 \ 149 __val = (val); \ 150 if (sizeof(__val) == 1 || sizeof(__val) == 2 || \ 151 sizeof(__val) == 4 || sizeof(__val) == 8) { \ 152 __s = *(struct __s *)(void *)&__val; \ 153 __asm __volatile("add %1,%%gs:%0" \ 154 : "=m" (*(struct __s *)(__pcpu_offset(name))) \ 155 : "r" (__s)); \ 156 } else \ 157 *__PCPU_PTR(name) += __val; \ 158} while (0) 159 160/* 161 * Increments the value of the per-cpu counter name. The implementation 162 * must be atomic with respect to interrupts. 163 */ 164#define __PCPU_INC(name) do { \ 165 CTASSERT(sizeof(__pcpu_type(name)) == 1 || \ 166 sizeof(__pcpu_type(name)) == 2 || \ 167 sizeof(__pcpu_type(name)) == 4 || \ 168 sizeof(__pcpu_type(name)) == 8); \ 169 if (sizeof(__pcpu_type(name)) == 1) { \ 170 __asm __volatile("incb %%gs:%0" \ 171 : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\ 172 : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\ 173 } else if (sizeof(__pcpu_type(name)) == 2) { \ 174 __asm __volatile("incw %%gs:%0" \ 175 : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\ 176 : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\ 177 } else if (sizeof(__pcpu_type(name)) == 4) { \ 178 __asm __volatile("incl %%gs:%0" \ 179 : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\ 180 : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\ 181 } else if (sizeof(__pcpu_type(name)) == 8) { \ 182 __asm __volatile("incq %%gs:%0" \ 183 : "=m" (*(__pcpu_type(name) *)(__pcpu_offset(name)))\ 184 : "m" (*(__pcpu_type(name) *)(__pcpu_offset(name))));\ 185 } \ 186} while (0) 187 188/* 189 * Sets the value of the per-cpu variable name to value val. 190 */ 191#define __PCPU_SET(name, val) { \ 192 __pcpu_type(name) __val; \ 193 struct __s { \ 194 u_char __b[MIN(sizeof(__pcpu_type(name)), 8)]; \ 195 } __s; \ 196 \ 197 __val = (val); \ 198 if (sizeof(__val) == 1 || sizeof(__val) == 2 || \ 199 sizeof(__val) == 4 || sizeof(__val) == 8) { \ 200 __s = *(struct __s *)(void *)&__val; \ 201 __asm __volatile("mov %1,%%gs:%0" \ 202 : "=m" (*(struct __s *)(__pcpu_offset(name))) \ 203 : "r" (__s)); \ 204 } else { \ 205 *__PCPU_PTR(name) = __val; \ 206 } \ 207} 208 209#define get_pcpu() __extension__ ({ \ 210 struct pcpu *__pc; \ 211 \ 212 __asm __volatile("movq %%gs:%1,%0" \ 213 : "=r" (__pc) \ 214 : "m" (*(struct pcpu *)(__pcpu_offset(pc_prvspace)))); \ 215 __pc; \ 216}) 217 218#define PCPU_GET(member) __PCPU_GET(pc_ ## member) 219#define PCPU_ADD(member, val) __PCPU_ADD(pc_ ## member, val) 220#define PCPU_INC(member) __PCPU_INC(pc_ ## member) 221#define PCPU_PTR(member) __PCPU_PTR(pc_ ## member) 222#define PCPU_SET(member, val) __PCPU_SET(pc_ ## member, val) 223 224#define IS_BSP() (PCPU_GET(cpuid) == 0) 225 226#else /* !__GNUCLIKE_ASM || !__GNUCLIKE___TYPEOF */ 227 228#error "this file needs to be ported to your compiler" 229 230#endif /* __GNUCLIKE_ASM && __GNUCLIKE___TYPEOF */ 231 232#endif /* _KERNEL */ 233 234#endif /* !_MACHINE_PCPU_H_ */ 235