1//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// 10//===----------------------------------------------------------------------===// 11 12#include "XCoreTargetMachine.h" 13#include "MCTargetDesc/XCoreMCTargetDesc.h" 14#include "TargetInfo/XCoreTargetInfo.h" 15#include "XCore.h" 16#include "XCoreTargetObjectFile.h" 17#include "XCoreTargetTransformInfo.h" 18#include "llvm/ADT/Optional.h" 19#include "llvm/ADT/STLExtras.h" 20#include "llvm/Analysis/TargetTransformInfo.h" 21#include "llvm/CodeGen/Passes.h" 22#include "llvm/CodeGen/TargetPassConfig.h" 23#include "llvm/Support/CodeGen.h" 24#include "llvm/Support/TargetRegistry.h" 25 26using namespace llvm; 27 28static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { 29 if (!RM.hasValue()) 30 return Reloc::Static; 31 return *RM; 32} 33 34static CodeModel::Model 35getEffectiveXCoreCodeModel(Optional<CodeModel::Model> CM) { 36 if (CM) { 37 if (*CM != CodeModel::Small && *CM != CodeModel::Large) 38 report_fatal_error("Target only supports CodeModel Small or Large"); 39 return *CM; 40 } 41 return CodeModel::Small; 42} 43 44/// Create an ILP32 architecture model 45/// 46XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT, 47 StringRef CPU, StringRef FS, 48 const TargetOptions &Options, 49 Optional<Reloc::Model> RM, 50 Optional<CodeModel::Model> CM, 51 CodeGenOpt::Level OL, bool JIT) 52 : LLVMTargetMachine( 53 T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32", 54 TT, CPU, FS, Options, getEffectiveRelocModel(RM), 55 getEffectiveXCoreCodeModel(CM), OL), 56 TLOF(std::make_unique<XCoreTargetObjectFile>()), 57 Subtarget(TT, CPU, FS, *this) { 58 initAsmInfo(); 59} 60 61XCoreTargetMachine::~XCoreTargetMachine() = default; 62 63namespace { 64 65/// XCore Code Generator Pass Configuration Options. 66class XCorePassConfig : public TargetPassConfig { 67public: 68 XCorePassConfig(XCoreTargetMachine &TM, PassManagerBase &PM) 69 : TargetPassConfig(TM, PM) {} 70 71 XCoreTargetMachine &getXCoreTargetMachine() const { 72 return getTM<XCoreTargetMachine>(); 73 } 74 75 void addIRPasses() override; 76 bool addPreISel() override; 77 bool addInstSelector() override; 78 void addPreEmitPass() override; 79}; 80 81} // end anonymous namespace 82 83TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) { 84 return new XCorePassConfig(*this, PM); 85} 86 87void XCorePassConfig::addIRPasses() { 88 addPass(createAtomicExpandPass()); 89 90 TargetPassConfig::addIRPasses(); 91} 92 93bool XCorePassConfig::addPreISel() { 94 addPass(createXCoreLowerThreadLocalPass()); 95 return false; 96} 97 98bool XCorePassConfig::addInstSelector() { 99 addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel())); 100 return false; 101} 102 103void XCorePassConfig::addPreEmitPass() { 104 addPass(createXCoreFrameToArgsOffsetEliminationPass(), false); 105} 106 107// Force static initialization. 108extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXCoreTarget() { 109 RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget()); 110} 111 112TargetTransformInfo 113XCoreTargetMachine::getTargetTransformInfo(const Function &F) { 114 return TargetTransformInfo(XCoreTTIImpl(this, F)); 115} 116