1//===-- AMDGPURegisterInfo.td - AMDGPU register info -------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Tablegen register definitions common to all hw codegen targets.
10//
11//===----------------------------------------------------------------------===//
12
13let Namespace = "AMDGPU" in {
14
15foreach Index = 0-31 in {
16  def sub#Index : SubRegIndex<32, !shl(Index, 5)>;
17}
18
19}
20
21include "SIRegisterInfo.td"
22