1;; Scheduling description for IBM Power2 processor. 2;; Copyright (C) 2003, 2004 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5 6;; GCC is free software; you can redistribute it and/or modify it 7;; under the terms of the GNU General Public License as published 8;; by the Free Software Foundation; either version 2, or (at your 9;; option) any later version. 10 11;; GCC is distributed in the hope that it will be useful, but WITHOUT 12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14;; License for more details. 15 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING. If not, write to the 18;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 19;; MA 02110-1301, USA. 20 21(define_automaton "rios2,rios2fp") 22(define_cpu_unit "iu1_rios2,iu2_rios2" "rios2") 23(define_cpu_unit "fpu1_rios2,fpu2_rios2" "rios2fp") 24(define_cpu_unit "bpu_rios2" "rios2") 25 26;; RIOS2 32-bit 2xIU, 2xFPU, BPU 27;; IU1 can perform all integer operations 28;; IU2 can perform all integer operations except imul and idiv 29 30(define_insn_reservation "rios2-load" 2 31 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,\ 32 load_ux,load_u,fpload,fpload_ux,fpload_u,\ 33 load_l,store_c,sync") 34 (eq_attr "cpu" "rios2")) 35 "iu1_rios2|iu2_rios2") 36 37(define_insn_reservation "rios2-store" 2 38 (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u") 39 (eq_attr "cpu" "rios2")) 40 "iu1_rios2|iu2_rios2") 41 42(define_insn_reservation "rios2-integer" 1 43 (and (eq_attr "type" "integer,insert_word") 44 (eq_attr "cpu" "rios2")) 45 "iu1_rios2|iu2_rios2") 46 47(define_insn_reservation "rios2-two" 1 48 (and (eq_attr "type" "two") 49 (eq_attr "cpu" "rios2")) 50 "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2") 51 52(define_insn_reservation "rios2-three" 1 53 (and (eq_attr "type" "three") 54 (eq_attr "cpu" "rios2")) 55 "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2") 56 57(define_insn_reservation "rios2-imul" 2 58 (and (eq_attr "type" "imul,imul2,imul3,imul_compare") 59 (eq_attr "cpu" "rios2")) 60 "iu1_rios2*2") 61 62(define_insn_reservation "rios2-idiv" 13 63 (and (eq_attr "type" "idiv") 64 (eq_attr "cpu" "rios2")) 65 "iu1_rios2*13") 66 67; compare executes on integer unit, but feeds insns which 68; execute on the branch unit. 69(define_insn_reservation "rios2-compare" 3 70 (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare") 71 (eq_attr "cpu" "rios2")) 72 "(iu1_rios2|iu2_rios2),nothing,bpu_rios2") 73 74(define_insn_reservation "rios2-fp" 2 75 (and (eq_attr "type" "fp") 76 (eq_attr "cpu" "rios2")) 77 "fpu1_rios2|fpu2_rios2") 78 79(define_insn_reservation "rios2-fpcompare" 5 80 (and (eq_attr "type" "fpcompare") 81 (eq_attr "cpu" "rios2")) 82 "(fpu1_rios2|fpu2_rios2),nothing*3,bpu_rios2") 83 84(define_insn_reservation "rios2-dmul" 2 85 (and (eq_attr "type" "dmul") 86 (eq_attr "cpu" "rios2")) 87 "fpu1_rios2|fpu2_rios2") 88 89(define_insn_reservation "rios2-sdiv" 17 90 (and (eq_attr "type" "sdiv,ddiv") 91 (eq_attr "cpu" "rios2")) 92 "(fpu1_rios2*17)|(fpu2_rios2*17)") 93 94(define_insn_reservation "rios2-ssqrt" 26 95 (and (eq_attr "type" "ssqrt,dsqrt") 96 (eq_attr "cpu" "rios2")) 97 "(fpu1_rios2*26)|(fpu2_rios2*26)") 98 99(define_insn_reservation "rios2-mfcr" 2 100 (and (eq_attr "type" "mfcr") 101 (eq_attr "cpu" "rios2")) 102 "iu1_rios2,bpu_rios2") 103 104(define_insn_reservation "rios2-mtcr" 3 105 (and (eq_attr "type" "mtcr") 106 (eq_attr "cpu" "rios2")) 107 "iu1_rios2,bpu_rios2") 108 109(define_insn_reservation "rios2-crlogical" 3 110 (and (eq_attr "type" "cr_logical,delayed_cr") 111 (eq_attr "cpu" "rios2")) 112 "bpu_rios2") 113 114(define_insn_reservation "rios2-mtjmpr" 5 115 (and (eq_attr "type" "mtjmpr") 116 (eq_attr "cpu" "rios2")) 117 "iu1_rios2,bpu_rios2") 118 119(define_insn_reservation "rios2-mfjmpr" 2 120 (and (eq_attr "type" "mfjmpr") 121 (eq_attr "cpu" "rios2")) 122 "iu1_rios2,bpu_rios2") 123 124(define_insn_reservation "rios2-branch" 1 125 (and (eq_attr "type" "jmpreg,branch,isync") 126 (eq_attr "cpu" "rios2")) 127 "bpu_rios2") 128 129