1/* Print i386 instructions for GDB, the GNU debugger. 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 20 21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 22 July 1988 23 modified by John Hassey (hassey@dg-rtp.dg.com) 24 x86-64 support added by Jan Hubicka (jh@suse.cz) 25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */ 26 27/* The main tables describing the instructions is essentially a copy 28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386 29 Programmers Manual. Usually, there is a capital letter, followed 30 by a small letter. The capital letter tell the addressing mode, 31 and the small letter tells about the operand size. Refer to 32 the Intel manual for details. */ 33 34#include "dis-asm.h" 35#include "sysdep.h" 36#include "opintl.h" 37#include "opcode/i386.h" 38 39#include <setjmp.h> 40 41static int fetch_data (struct disassemble_info *, bfd_byte *); 42static void ckprefix (void); 43static const char *prefix_name (int, int); 44static int print_insn (bfd_vma, disassemble_info *); 45static void dofloat (int); 46static void OP_ST (int, int); 47static void OP_STi (int, int); 48static int putop (const char *, int); 49static void oappend (const char *); 50static void append_seg (void); 51static void OP_indirE (int, int); 52static void print_operand_value (char *, int, bfd_vma); 53static void print_displacement (char *, bfd_vma); 54static void OP_E (int, int); 55static void OP_G (int, int); 56static bfd_vma get64 (void); 57static bfd_signed_vma get32 (void); 58static bfd_signed_vma get32s (void); 59static int get16 (void); 60static void set_op (bfd_vma, int); 61static void OP_REG (int, int); 62static void OP_IMREG (int, int); 63static void OP_I (int, int); 64static void OP_I64 (int, int); 65static void OP_sI (int, int); 66static void OP_J (int, int); 67static void OP_SEG (int, int); 68static void OP_DIR (int, int); 69static void OP_OFF (int, int); 70static void OP_OFF64 (int, int); 71static void ptr_reg (int, int); 72static void OP_ESreg (int, int); 73static void OP_DSreg (int, int); 74static void OP_C (int, int); 75static void OP_D (int, int); 76static void OP_T (int, int); 77static void OP_R (int, int); 78static void OP_MMX (int, int); 79static void OP_XMM (int, int); 80static void OP_EM (int, int); 81static void OP_EX (int, int); 82static void OP_EMC (int,int); 83static void OP_MXC (int,int); 84static void OP_MS (int, int); 85static void OP_XS (int, int); 86static void OP_M (int, int); 87static void OP_VMX (int, int); 88static void OP_VMX2 (int, int); 89static void OP_0fae (int, int); 90static void OP_0f07 (int, int); 91static void NOP_Fixup1 (int, int); 92static void NOP_Fixup2 (int, int); 93static void OP_3DNowSuffix (int, int); 94static void OP_SIMD_Suffix (int, int); 95static void SIMD_Fixup (int, int); 96static void PNI_Fixup (int, int); 97static void XCR_Fixup (int, int); 98static void SVME_Fixup (int, int); 99static void INVLPG_Fixup (int, int); 100static void BadOp (void); 101static void VMX_Fixup (int, int); 102static void REP_Fixup (int, int); 103static void CMPXCHG8B_Fixup (int, int); 104static void XMM_Fixup (int, int); 105static void CRC32_Fixup (int, int); 106 107struct dis_private { 108 /* Points to first byte not fetched. */ 109 bfd_byte *max_fetched; 110 bfd_byte the_buffer[MAX_MNEM_SIZE]; 111 bfd_vma insn_start; 112 int orig_sizeflag; 113 jmp_buf bailout; 114}; 115 116enum address_mode 117{ 118 mode_16bit, 119 mode_32bit, 120 mode_64bit 121}; 122 123enum address_mode address_mode; 124 125/* Flags for the prefixes for the current instruction. See below. */ 126static int prefixes; 127 128/* REX prefix the current instruction. See below. */ 129static int rex; 130/* Bits of REX we've already used. */ 131static int rex_used; 132/* Mark parts used in the REX prefix. When we are testing for 133 empty prefix (for 8bit register REX extension), just mask it 134 out. Otherwise test for REX bit is excuse for existence of REX 135 only in case value is nonzero. */ 136#define USED_REX(value) \ 137 { \ 138 if (value) \ 139 { \ 140 if ((rex & value)) \ 141 rex_used |= (value) | REX_OPCODE; \ 142 } \ 143 else \ 144 rex_used |= REX_OPCODE; \ 145 } 146 147/* Flags for prefixes which we somehow handled when printing the 148 current instruction. */ 149static int used_prefixes; 150 151/* Flags stored in PREFIXES. */ 152#define PREFIX_REPZ 1 153#define PREFIX_REPNZ 2 154#define PREFIX_LOCK 4 155#define PREFIX_CS 8 156#define PREFIX_SS 0x10 157#define PREFIX_DS 0x20 158#define PREFIX_ES 0x40 159#define PREFIX_FS 0x80 160#define PREFIX_GS 0x100 161#define PREFIX_DATA 0x200 162#define PREFIX_ADDR 0x400 163#define PREFIX_FWAIT 0x800 164 165/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 166 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 167 on error. */ 168#define FETCH_DATA(info, addr) \ 169 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ 170 ? 1 : fetch_data ((info), (addr))) 171 172static int 173fetch_data (struct disassemble_info *info, bfd_byte *addr) 174{ 175 int status; 176 struct dis_private *priv = (struct dis_private *) info->private_data; 177 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 178 179 if (addr <= priv->the_buffer + MAX_MNEM_SIZE) 180 status = (*info->read_memory_func) (start, 181 priv->max_fetched, 182 addr - priv->max_fetched, 183 info); 184 else 185 status = -1; 186 if (status != 0) 187 { 188 /* If we did manage to read at least one byte, then 189 print_insn_i386 will do something sensible. Otherwise, print 190 an error. We do that here because this is where we know 191 STATUS. */ 192 if (priv->max_fetched == priv->the_buffer) 193 (*info->memory_error_func) (status, start, info); 194 longjmp (priv->bailout, 1); 195 } 196 else 197 priv->max_fetched = addr; 198 return 1; 199} 200 201#define XX { NULL, 0 } 202 203#define Eb { OP_E, b_mode } 204#define Ev { OP_E, v_mode } 205#define Ed { OP_E, d_mode } 206#define Edq { OP_E, dq_mode } 207#define Edqw { OP_E, dqw_mode } 208#define Edqb { OP_E, dqb_mode } 209#define Edqd { OP_E, dqd_mode } 210#define indirEv { OP_indirE, stack_v_mode } 211#define indirEp { OP_indirE, f_mode } 212#define stackEv { OP_E, stack_v_mode } 213#define Em { OP_E, m_mode } 214#define Ew { OP_E, w_mode } 215#define M { OP_M, 0 } /* lea, lgdt, etc. */ 216#define Ma { OP_M, v_mode } 217#define Mo { OP_M, o_mode } 218#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ 219#define Mq { OP_M, q_mode } 220#define Gb { OP_G, b_mode } 221#define Gv { OP_G, v_mode } 222#define Gd { OP_G, d_mode } 223#define Gdq { OP_G, dq_mode } 224#define Gm { OP_G, m_mode } 225#define Gw { OP_G, w_mode } 226#define Rd { OP_R, d_mode } 227#define Rm { OP_R, m_mode } 228#define Ib { OP_I, b_mode } 229#define sIb { OP_sI, b_mode } /* sign extened byte */ 230#define Iv { OP_I, v_mode } 231#define Iq { OP_I, q_mode } 232#define Iv64 { OP_I64, v_mode } 233#define Iw { OP_I, w_mode } 234#define I1 { OP_I, const_1_mode } 235#define Jb { OP_J, b_mode } 236#define Jv { OP_J, v_mode } 237#define Cm { OP_C, m_mode } 238#define Dm { OP_D, m_mode } 239#define Td { OP_T, d_mode } 240 241#define RMeAX { OP_REG, eAX_reg } 242#define RMeBX { OP_REG, eBX_reg } 243#define RMeCX { OP_REG, eCX_reg } 244#define RMeDX { OP_REG, eDX_reg } 245#define RMeSP { OP_REG, eSP_reg } 246#define RMeBP { OP_REG, eBP_reg } 247#define RMeSI { OP_REG, eSI_reg } 248#define RMeDI { OP_REG, eDI_reg } 249#define RMrAX { OP_REG, rAX_reg } 250#define RMrBX { OP_REG, rBX_reg } 251#define RMrCX { OP_REG, rCX_reg } 252#define RMrDX { OP_REG, rDX_reg } 253#define RMrSP { OP_REG, rSP_reg } 254#define RMrBP { OP_REG, rBP_reg } 255#define RMrSI { OP_REG, rSI_reg } 256#define RMrDI { OP_REG, rDI_reg } 257#define RMAL { OP_REG, al_reg } 258#define RMAL { OP_REG, al_reg } 259#define RMCL { OP_REG, cl_reg } 260#define RMDL { OP_REG, dl_reg } 261#define RMBL { OP_REG, bl_reg } 262#define RMAH { OP_REG, ah_reg } 263#define RMCH { OP_REG, ch_reg } 264#define RMDH { OP_REG, dh_reg } 265#define RMBH { OP_REG, bh_reg } 266#define RMAX { OP_REG, ax_reg } 267#define RMDX { OP_REG, dx_reg } 268 269#define eAX { OP_IMREG, eAX_reg } 270#define eBX { OP_IMREG, eBX_reg } 271#define eCX { OP_IMREG, eCX_reg } 272#define eDX { OP_IMREG, eDX_reg } 273#define eSP { OP_IMREG, eSP_reg } 274#define eBP { OP_IMREG, eBP_reg } 275#define eSI { OP_IMREG, eSI_reg } 276#define eDI { OP_IMREG, eDI_reg } 277#define AL { OP_IMREG, al_reg } 278#define CL { OP_IMREG, cl_reg } 279#define DL { OP_IMREG, dl_reg } 280#define BL { OP_IMREG, bl_reg } 281#define AH { OP_IMREG, ah_reg } 282#define CH { OP_IMREG, ch_reg } 283#define DH { OP_IMREG, dh_reg } 284#define BH { OP_IMREG, bh_reg } 285#define AX { OP_IMREG, ax_reg } 286#define DX { OP_IMREG, dx_reg } 287#define zAX { OP_IMREG, z_mode_ax_reg } 288#define indirDX { OP_IMREG, indir_dx_reg } 289 290#define Sw { OP_SEG, w_mode } 291#define Sv { OP_SEG, v_mode } 292#define Ap { OP_DIR, 0 } 293#define Ob { OP_OFF64, b_mode } 294#define Ov { OP_OFF64, v_mode } 295#define Xb { OP_DSreg, eSI_reg } 296#define Xv { OP_DSreg, eSI_reg } 297#define Xz { OP_DSreg, eSI_reg } 298#define Yb { OP_ESreg, eDI_reg } 299#define Yv { OP_ESreg, eDI_reg } 300#define DSBX { OP_DSreg, eBX_reg } 301 302#define es { OP_REG, es_reg } 303#define ss { OP_REG, ss_reg } 304#define cs { OP_REG, cs_reg } 305#define ds { OP_REG, ds_reg } 306#define fs { OP_REG, fs_reg } 307#define gs { OP_REG, gs_reg } 308 309#define MX { OP_MMX, 0 } 310#define XM { OP_XMM, 0 } 311#define EM { OP_EM, v_mode } 312#define EMd { OP_EM, d_mode } 313#define EMq { OP_EM, q_mode } 314#define EXd { OP_EX, d_mode } 315#define EXq { OP_EX, q_mode } 316#define EXx { OP_EX, x_mode } 317#define MS { OP_MS, v_mode } 318#define XS { OP_XS, v_mode } 319#define EMC { OP_EMC, v_mode } 320#define MXC { OP_MXC, 0 } 321#define VM { OP_VMX, q_mode } 322#define VM2 { OP_VMX2, q_mode } 323#define OPSUF { OP_3DNowSuffix, 0 } 324#define OPSIMD { OP_SIMD_Suffix, 0 } 325#define XMM0 { XMM_Fixup, 0 } 326 327/* Used handle "rep" prefix for string instructions. */ 328#define Xbr { REP_Fixup, eSI_reg } 329#define Xvr { REP_Fixup, eSI_reg } 330#define Ybr { REP_Fixup, eDI_reg } 331#define Yvr { REP_Fixup, eDI_reg } 332#define Yzr { REP_Fixup, eDI_reg } 333#define indirDXr { REP_Fixup, indir_dx_reg } 334#define ALr { REP_Fixup, al_reg } 335#define eAXr { REP_Fixup, eAX_reg } 336 337#define cond_jump_flag { NULL, cond_jump_mode } 338#define loop_jcxz_flag { NULL, loop_jcxz_mode } 339 340/* bits in sizeflag */ 341#define SUFFIX_ALWAYS 4 342#define AFLAG 2 343#define DFLAG 1 344 345#define b_mode 1 /* byte operand */ 346#define v_mode 2 /* operand size depends on prefixes */ 347#define w_mode 3 /* word operand */ 348#define d_mode 4 /* double word operand */ 349#define q_mode 5 /* quad word operand */ 350#define t_mode 6 /* ten-byte operand */ 351#define x_mode 7 /* 16-byte XMM operand */ 352#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */ 353#define cond_jump_mode 9 354#define loop_jcxz_mode 10 355#define dq_mode 11 /* operand size depends on REX prefixes. */ 356#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */ 357#define f_mode 13 /* 4- or 6-byte pointer operand */ 358#define const_1_mode 14 359#define stack_v_mode 15 /* v_mode for stack-related opcodes. */ 360#define z_mode 16 /* non-quad operand size depends on prefixes */ 361#define o_mode 17 /* 16-byte operand */ 362#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */ 363#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */ 364 365#define es_reg 100 366#define cs_reg 101 367#define ss_reg 102 368#define ds_reg 103 369#define fs_reg 104 370#define gs_reg 105 371 372#define eAX_reg 108 373#define eCX_reg 109 374#define eDX_reg 110 375#define eBX_reg 111 376#define eSP_reg 112 377#define eBP_reg 113 378#define eSI_reg 114 379#define eDI_reg 115 380 381#define al_reg 116 382#define cl_reg 117 383#define dl_reg 118 384#define bl_reg 119 385#define ah_reg 120 386#define ch_reg 121 387#define dh_reg 122 388#define bh_reg 123 389 390#define ax_reg 124 391#define cx_reg 125 392#define dx_reg 126 393#define bx_reg 127 394#define sp_reg 128 395#define bp_reg 129 396#define si_reg 130 397#define di_reg 131 398 399#define rAX_reg 132 400#define rCX_reg 133 401#define rDX_reg 134 402#define rBX_reg 135 403#define rSP_reg 136 404#define rBP_reg 137 405#define rSI_reg 138 406#define rDI_reg 139 407 408#define z_mode_ax_reg 149 409#define indir_dx_reg 150 410 411#define FLOATCODE 1 412#define USE_GROUPS 2 413#define USE_PREFIX_USER_TABLE 3 414#define X86_64_SPECIAL 4 415#define IS_3BYTE_OPCODE 5 416 417#define FLOAT NULL, { { NULL, FLOATCODE } } 418 419#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } } 420#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } } 421#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } } 422#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } } 423#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } } 424#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } } 425#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } } 426#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } } 427#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } } 428#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } } 429#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } } 430#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } } 431#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } } 432#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } } 433#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } } 434#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } } 435#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } } 436#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } } 437#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } } 438#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } } 439#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } } 440#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } } 441#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } } 442#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } } 443#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } } 444#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } } 445#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } } 446#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } } 447 448#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } } 449#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } } 450#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } } 451#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } } 452#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } } 453#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } } 454#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } } 455#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } } 456#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } } 457#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } } 458#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } } 459#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } } 460#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } } 461#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } } 462#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } } 463#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } } 464#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } } 465#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } } 466#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } } 467#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } } 468#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } } 469#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } } 470#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } } 471#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } } 472#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } } 473#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } } 474#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } } 475#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } } 476#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } } 477#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } } 478#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } } 479#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } } 480#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } } 481#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } } 482#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } } 483#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } } 484#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } } 485#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } } 486#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } } 487#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } } 488#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } } 489#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } } 490#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } } 491#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } } 492#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } } 493#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } } 494#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } } 495#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } } 496#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } } 497#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } } 498#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } } 499#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } } 500#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } } 501#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } } 502#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } } 503#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } } 504#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } } 505#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } } 506#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } } 507#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } } 508#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } } 509#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } } 510#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } } 511#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } } 512#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } } 513#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } } 514#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } } 515#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } } 516#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } } 517#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } } 518#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } } 519#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } } 520#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } } 521#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } } 522#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } } 523#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } } 524#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } } 525#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } } 526#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } } 527#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } } 528#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } } 529#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } } 530#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } } 531#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } } 532#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } } 533#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } } 534#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } } 535#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } } 536#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } } 537#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } } 538#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } } 539#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } } 540#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } } 541#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } } 542#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } } 543#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } } 544#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } } 545#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } } 546#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } } 547#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } } 548#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } } 549#define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } } 550#define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } } 551#define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } } 552#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } } 553#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } } 554#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } } 555#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } } 556 557 558#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } } 559#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } } 560#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } } 561#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } } 562 563#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } } 564#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } } 565 566typedef void (*op_rtn) (int bytemode, int sizeflag); 567 568struct dis386 { 569 const char *name; 570 struct 571 { 572 op_rtn rtn; 573 int bytemode; 574 } op[MAX_OPERANDS]; 575}; 576 577/* Upper case letters in the instruction names here are macros. 578 'A' => print 'b' if no register operands or suffix_always is true 579 'B' => print 'b' if suffix_always is true 580 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand 581 . size prefix 582 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if 583 . suffix_always is true 584 'E' => print 'e' if 32-bit form of jcxz 585 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 586 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns) 587 'H' => print ",pt" or ",pn" branch hint 588 'I' => honor following macro letter even in Intel mode (implemented only 589 . for some of the macro letters) 590 'J' => print 'l' 591 'K' => print 'd' or 'q' if rex prefix is present. 592 'L' => print 'l' if suffix_always is true 593 'N' => print 'n' if instruction has no wait "prefix" 594 'O' => print 'd' or 'o' (or 'q' in Intel mode) 595 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 596 . or suffix_always is true. print 'q' if rex prefix is present. 597 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always 598 . is true 599 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode) 600 'S' => print 'w', 'l' or 'q' if suffix_always is true 601 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 602 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 603 'V' => print 'q' in 64bit mode and behave as 'S' otherwise 604 'W' => print 'b', 'w' or 'l' ('d' in Intel mode) 605 'X' => print 's', 'd' depending on data16 prefix (for XMM) 606 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 607 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise 608 609 Many of the above letters print nothing in Intel mode. See "putop" 610 for the details. 611 612 Braces '{' and '}', and vertical bars '|', indicate alternative 613 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 614 modes. In cases where there are only two alternatives, the X86_64 615 instruction is reserved, and "(bad)" is printed. 616*/ 617 618static const struct dis386 dis386[] = { 619 /* 00 */ 620 { "addB", { Eb, Gb } }, 621 { "addS", { Ev, Gv } }, 622 { "addB", { Gb, Eb } }, 623 { "addS", { Gv, Ev } }, 624 { "addB", { AL, Ib } }, 625 { "addS", { eAX, Iv } }, 626 { "push{T|}", { es } }, 627 { "pop{T|}", { es } }, 628 /* 08 */ 629 { "orB", { Eb, Gb } }, 630 { "orS", { Ev, Gv } }, 631 { "orB", { Gb, Eb } }, 632 { "orS", { Gv, Ev } }, 633 { "orB", { AL, Ib } }, 634 { "orS", { eAX, Iv } }, 635 { "push{T|}", { cs } }, 636 { "(bad)", { XX } }, /* 0x0f extended opcode escape */ 637 /* 10 */ 638 { "adcB", { Eb, Gb } }, 639 { "adcS", { Ev, Gv } }, 640 { "adcB", { Gb, Eb } }, 641 { "adcS", { Gv, Ev } }, 642 { "adcB", { AL, Ib } }, 643 { "adcS", { eAX, Iv } }, 644 { "push{T|}", { ss } }, 645 { "pop{T|}", { ss } }, 646 /* 18 */ 647 { "sbbB", { Eb, Gb } }, 648 { "sbbS", { Ev, Gv } }, 649 { "sbbB", { Gb, Eb } }, 650 { "sbbS", { Gv, Ev } }, 651 { "sbbB", { AL, Ib } }, 652 { "sbbS", { eAX, Iv } }, 653 { "push{T|}", { ds } }, 654 { "pop{T|}", { ds } }, 655 /* 20 */ 656 { "andB", { Eb, Gb } }, 657 { "andS", { Ev, Gv } }, 658 { "andB", { Gb, Eb } }, 659 { "andS", { Gv, Ev } }, 660 { "andB", { AL, Ib } }, 661 { "andS", { eAX, Iv } }, 662 { "(bad)", { XX } }, /* SEG ES prefix */ 663 { "daa{|}", { XX } }, 664 /* 28 */ 665 { "subB", { Eb, Gb } }, 666 { "subS", { Ev, Gv } }, 667 { "subB", { Gb, Eb } }, 668 { "subS", { Gv, Ev } }, 669 { "subB", { AL, Ib } }, 670 { "subS", { eAX, Iv } }, 671 { "(bad)", { XX } }, /* SEG CS prefix */ 672 { "das{|}", { XX } }, 673 /* 30 */ 674 { "xorB", { Eb, Gb } }, 675 { "xorS", { Ev, Gv } }, 676 { "xorB", { Gb, Eb } }, 677 { "xorS", { Gv, Ev } }, 678 { "xorB", { AL, Ib } }, 679 { "xorS", { eAX, Iv } }, 680 { "(bad)", { XX } }, /* SEG SS prefix */ 681 { "aaa{|}", { XX } }, 682 /* 38 */ 683 { "cmpB", { Eb, Gb } }, 684 { "cmpS", { Ev, Gv } }, 685 { "cmpB", { Gb, Eb } }, 686 { "cmpS", { Gv, Ev } }, 687 { "cmpB", { AL, Ib } }, 688 { "cmpS", { eAX, Iv } }, 689 { "(bad)", { XX } }, /* SEG DS prefix */ 690 { "aas{|}", { XX } }, 691 /* 40 */ 692 { "inc{S|}", { RMeAX } }, 693 { "inc{S|}", { RMeCX } }, 694 { "inc{S|}", { RMeDX } }, 695 { "inc{S|}", { RMeBX } }, 696 { "inc{S|}", { RMeSP } }, 697 { "inc{S|}", { RMeBP } }, 698 { "inc{S|}", { RMeSI } }, 699 { "inc{S|}", { RMeDI } }, 700 /* 48 */ 701 { "dec{S|}", { RMeAX } }, 702 { "dec{S|}", { RMeCX } }, 703 { "dec{S|}", { RMeDX } }, 704 { "dec{S|}", { RMeBX } }, 705 { "dec{S|}", { RMeSP } }, 706 { "dec{S|}", { RMeBP } }, 707 { "dec{S|}", { RMeSI } }, 708 { "dec{S|}", { RMeDI } }, 709 /* 50 */ 710 { "pushV", { RMrAX } }, 711 { "pushV", { RMrCX } }, 712 { "pushV", { RMrDX } }, 713 { "pushV", { RMrBX } }, 714 { "pushV", { RMrSP } }, 715 { "pushV", { RMrBP } }, 716 { "pushV", { RMrSI } }, 717 { "pushV", { RMrDI } }, 718 /* 58 */ 719 { "popV", { RMrAX } }, 720 { "popV", { RMrCX } }, 721 { "popV", { RMrDX } }, 722 { "popV", { RMrBX } }, 723 { "popV", { RMrSP } }, 724 { "popV", { RMrBP } }, 725 { "popV", { RMrSI } }, 726 { "popV", { RMrDI } }, 727 /* 60 */ 728 { X86_64_0 }, 729 { X86_64_1 }, 730 { X86_64_2 }, 731 { X86_64_3 }, 732 { "(bad)", { XX } }, /* seg fs */ 733 { "(bad)", { XX } }, /* seg gs */ 734 { "(bad)", { XX } }, /* op size prefix */ 735 { "(bad)", { XX } }, /* adr size prefix */ 736 /* 68 */ 737 { "pushT", { Iq } }, 738 { "imulS", { Gv, Ev, Iv } }, 739 { "pushT", { sIb } }, 740 { "imulS", { Gv, Ev, sIb } }, 741 { "ins{b||b|}", { Ybr, indirDX } }, 742 { "ins{R||G|}", { Yzr, indirDX } }, 743 { "outs{b||b|}", { indirDXr, Xb } }, 744 { "outs{R||G|}", { indirDXr, Xz } }, 745 /* 70 */ 746 { "joH", { Jb, XX, cond_jump_flag } }, 747 { "jnoH", { Jb, XX, cond_jump_flag } }, 748 { "jbH", { Jb, XX, cond_jump_flag } }, 749 { "jaeH", { Jb, XX, cond_jump_flag } }, 750 { "jeH", { Jb, XX, cond_jump_flag } }, 751 { "jneH", { Jb, XX, cond_jump_flag } }, 752 { "jbeH", { Jb, XX, cond_jump_flag } }, 753 { "jaH", { Jb, XX, cond_jump_flag } }, 754 /* 78 */ 755 { "jsH", { Jb, XX, cond_jump_flag } }, 756 { "jnsH", { Jb, XX, cond_jump_flag } }, 757 { "jpH", { Jb, XX, cond_jump_flag } }, 758 { "jnpH", { Jb, XX, cond_jump_flag } }, 759 { "jlH", { Jb, XX, cond_jump_flag } }, 760 { "jgeH", { Jb, XX, cond_jump_flag } }, 761 { "jleH", { Jb, XX, cond_jump_flag } }, 762 { "jgH", { Jb, XX, cond_jump_flag } }, 763 /* 80 */ 764 { GRP1b }, 765 { GRP1S }, 766 { "(bad)", { XX } }, 767 { GRP1Ss }, 768 { "testB", { Eb, Gb } }, 769 { "testS", { Ev, Gv } }, 770 { "xchgB", { Eb, Gb } }, 771 { "xchgS", { Ev, Gv } }, 772 /* 88 */ 773 { "movB", { Eb, Gb } }, 774 { "movS", { Ev, Gv } }, 775 { "movB", { Gb, Eb } }, 776 { "movS", { Gv, Ev } }, 777 { "movD", { Sv, Sw } }, 778 { "leaS", { Gv, M } }, 779 { "movD", { Sw, Sv } }, 780 { GRP1a }, 781 /* 90 */ 782 { PREGRP38 }, 783 { "xchgS", { RMeCX, eAX } }, 784 { "xchgS", { RMeDX, eAX } }, 785 { "xchgS", { RMeBX, eAX } }, 786 { "xchgS", { RMeSP, eAX } }, 787 { "xchgS", { RMeBP, eAX } }, 788 { "xchgS", { RMeSI, eAX } }, 789 { "xchgS", { RMeDI, eAX } }, 790 /* 98 */ 791 { "cW{t||t|}R", { XX } }, 792 { "cR{t||t|}O", { XX } }, 793 { "Jcall{T|}", { Ap } }, 794 { "(bad)", { XX } }, /* fwait */ 795 { "pushfT", { XX } }, 796 { "popfT", { XX } }, 797 { "sahf{|}", { XX } }, 798 { "lahf{|}", { XX } }, 799 /* a0 */ 800 { "movB", { AL, Ob } }, 801 { "movS", { eAX, Ov } }, 802 { "movB", { Ob, AL } }, 803 { "movS", { Ov, eAX } }, 804 { "movs{b||b|}", { Ybr, Xb } }, 805 { "movs{R||R|}", { Yvr, Xv } }, 806 { "cmps{b||b|}", { Xb, Yb } }, 807 { "cmps{R||R|}", { Xv, Yv } }, 808 /* a8 */ 809 { "testB", { AL, Ib } }, 810 { "testS", { eAX, Iv } }, 811 { "stosB", { Ybr, AL } }, 812 { "stosS", { Yvr, eAX } }, 813 { "lodsB", { ALr, Xb } }, 814 { "lodsS", { eAXr, Xv } }, 815 { "scasB", { AL, Yb } }, 816 { "scasS", { eAX, Yv } }, 817 /* b0 */ 818 { "movB", { RMAL, Ib } }, 819 { "movB", { RMCL, Ib } }, 820 { "movB", { RMDL, Ib } }, 821 { "movB", { RMBL, Ib } }, 822 { "movB", { RMAH, Ib } }, 823 { "movB", { RMCH, Ib } }, 824 { "movB", { RMDH, Ib } }, 825 { "movB", { RMBH, Ib } }, 826 /* b8 */ 827 { "movS", { RMeAX, Iv64 } }, 828 { "movS", { RMeCX, Iv64 } }, 829 { "movS", { RMeDX, Iv64 } }, 830 { "movS", { RMeBX, Iv64 } }, 831 { "movS", { RMeSP, Iv64 } }, 832 { "movS", { RMeBP, Iv64 } }, 833 { "movS", { RMeSI, Iv64 } }, 834 { "movS", { RMeDI, Iv64 } }, 835 /* c0 */ 836 { GRP2b }, 837 { GRP2S }, 838 { "retT", { Iw } }, 839 { "retT", { XX } }, 840 { "les{S|}", { Gv, Mp } }, 841 { "ldsS", { Gv, Mp } }, 842 { GRP11_C6 }, 843 { GRP11_C7 }, 844 /* c8 */ 845 { "enterT", { Iw, Ib } }, 846 { "leaveT", { XX } }, 847 { "lretP", { Iw } }, 848 { "lretP", { XX } }, 849 { "int3", { XX } }, 850 { "int", { Ib } }, 851 { "into{|}", { XX } }, 852 { "iretP", { XX } }, 853 /* d0 */ 854 { GRP2b_one }, 855 { GRP2S_one }, 856 { GRP2b_cl }, 857 { GRP2S_cl }, 858 { "aam{|}", { sIb } }, 859 { "aad{|}", { sIb } }, 860 { "(bad)", { XX } }, 861 { "xlat", { DSBX } }, 862 /* d8 */ 863 { FLOAT }, 864 { FLOAT }, 865 { FLOAT }, 866 { FLOAT }, 867 { FLOAT }, 868 { FLOAT }, 869 { FLOAT }, 870 { FLOAT }, 871 /* e0 */ 872 { "loopneFH", { Jb, XX, loop_jcxz_flag } }, 873 { "loopeFH", { Jb, XX, loop_jcxz_flag } }, 874 { "loopFH", { Jb, XX, loop_jcxz_flag } }, 875 { "jEcxzH", { Jb, XX, loop_jcxz_flag } }, 876 { "inB", { AL, Ib } }, 877 { "inG", { zAX, Ib } }, 878 { "outB", { Ib, AL } }, 879 { "outG", { Ib, zAX } }, 880 /* e8 */ 881 { "callT", { Jv } }, 882 { "jmpT", { Jv } }, 883 { "Jjmp{T|}", { Ap } }, 884 { "jmp", { Jb } }, 885 { "inB", { AL, indirDX } }, 886 { "inG", { zAX, indirDX } }, 887 { "outB", { indirDX, AL } }, 888 { "outG", { indirDX, zAX } }, 889 /* f0 */ 890 { "(bad)", { XX } }, /* lock prefix */ 891 { "icebp", { XX } }, 892 { "(bad)", { XX } }, /* repne */ 893 { "(bad)", { XX } }, /* repz */ 894 { "hlt", { XX } }, 895 { "cmc", { XX } }, 896 { GRP3b }, 897 { GRP3S }, 898 /* f8 */ 899 { "clc", { XX } }, 900 { "stc", { XX } }, 901 { "cli", { XX } }, 902 { "sti", { XX } }, 903 { "cld", { XX } }, 904 { "std", { XX } }, 905 { GRP4 }, 906 { GRP5 }, 907}; 908 909static const struct dis386 dis386_twobyte[] = { 910 /* 00 */ 911 { GRP6 }, 912 { GRP7 }, 913 { "larS", { Gv, Ew } }, 914 { "lslS", { Gv, Ew } }, 915 { "(bad)", { XX } }, 916 { "syscall", { XX } }, 917 { "clts", { XX } }, 918 { "sysretP", { XX } }, 919 /* 08 */ 920 { "invd", { XX } }, 921 { "wbinvd", { XX } }, 922 { "(bad)", { XX } }, 923 { "ud2a", { XX } }, 924 { "(bad)", { XX } }, 925 { GRPAMD }, 926 { "femms", { XX } }, 927 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */ 928 /* 10 */ 929 { PREGRP8 }, 930 { PREGRP9 }, 931 { PREGRP30 }, 932 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } }, 933 { "unpcklpX", { XM, EXq } }, 934 { "unpckhpX", { XM, EXq } }, 935 { PREGRP31 }, 936 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } }, 937 /* 18 */ 938 { GRP16 }, 939 { "(bad)", { XX } }, 940 { "(bad)", { XX } }, 941 { "(bad)", { XX } }, 942 { "(bad)", { XX } }, 943 { "(bad)", { XX } }, 944 { "(bad)", { XX } }, 945 { "nopQ", { Ev } }, 946 /* 20 */ 947 { "movZ", { Rm, Cm } }, 948 { "movZ", { Rm, Dm } }, 949 { "movZ", { Cm, Rm } }, 950 { "movZ", { Dm, Rm } }, 951 { "movL", { Rd, Td } }, 952 { "(bad)", { XX } }, 953 { "movL", { Td, Rd } }, 954 { "(bad)", { XX } }, 955 /* 28 */ 956 { "movapX", { XM, EXx } }, 957 { "movapX", { EXx, XM } }, 958 { PREGRP2 }, 959 { PREGRP33 }, 960 { PREGRP4 }, 961 { PREGRP3 }, 962 { PREGRP93 }, 963 { PREGRP94 }, 964 /* 30 */ 965 { "wrmsr", { XX } }, 966 { "rdtsc", { XX } }, 967 { "rdmsr", { XX } }, 968 { "rdpmc", { XX } }, 969 { "sysenter", { XX } }, 970 { "sysexit", { XX } }, 971 { "(bad)", { XX } }, 972 { "(bad)", { XX } }, 973 /* 38 */ 974 { THREE_BYTE_0 }, 975 { "(bad)", { XX } }, 976 { THREE_BYTE_1 }, 977 { "(bad)", { XX } }, 978 { "(bad)", { XX } }, 979 { "(bad)", { XX } }, 980 { "(bad)", { XX } }, 981 { "(bad)", { XX } }, 982 /* 40 */ 983 { "cmovo", { Gv, Ev } }, 984 { "cmovno", { Gv, Ev } }, 985 { "cmovb", { Gv, Ev } }, 986 { "cmovae", { Gv, Ev } }, 987 { "cmove", { Gv, Ev } }, 988 { "cmovne", { Gv, Ev } }, 989 { "cmovbe", { Gv, Ev } }, 990 { "cmova", { Gv, Ev } }, 991 /* 48 */ 992 { "cmovs", { Gv, Ev } }, 993 { "cmovns", { Gv, Ev } }, 994 { "cmovp", { Gv, Ev } }, 995 { "cmovnp", { Gv, Ev } }, 996 { "cmovl", { Gv, Ev } }, 997 { "cmovge", { Gv, Ev } }, 998 { "cmovle", { Gv, Ev } }, 999 { "cmovg", { Gv, Ev } }, 1000 /* 50 */ 1001 { "movmskpX", { Gdq, XS } }, 1002 { PREGRP13 }, 1003 { PREGRP12 }, 1004 { PREGRP11 }, 1005 { "andpX", { XM, EXx } }, 1006 { "andnpX", { XM, EXx } }, 1007 { "orpX", { XM, EXx } }, 1008 { "xorpX", { XM, EXx } }, 1009 /* 58 */ 1010 { PREGRP0 }, 1011 { PREGRP10 }, 1012 { PREGRP17 }, 1013 { PREGRP16 }, 1014 { PREGRP14 }, 1015 { PREGRP7 }, 1016 { PREGRP5 }, 1017 { PREGRP6 }, 1018 /* 60 */ 1019 { PREGRP95 }, 1020 { PREGRP96 }, 1021 { PREGRP97 }, 1022 { "packsswb", { MX, EM } }, 1023 { "pcmpgtb", { MX, EM } }, 1024 { "pcmpgtw", { MX, EM } }, 1025 { "pcmpgtd", { MX, EM } }, 1026 { "packuswb", { MX, EM } }, 1027 /* 68 */ 1028 { "punpckhbw", { MX, EM } }, 1029 { "punpckhwd", { MX, EM } }, 1030 { "punpckhdq", { MX, EM } }, 1031 { "packssdw", { MX, EM } }, 1032 { PREGRP26 }, 1033 { PREGRP24 }, 1034 { "movd", { MX, Edq } }, 1035 { PREGRP19 }, 1036 /* 70 */ 1037 { PREGRP22 }, 1038 { GRP12 }, 1039 { GRP13 }, 1040 { GRP14 }, 1041 { "pcmpeqb", { MX, EM } }, 1042 { "pcmpeqw", { MX, EM } }, 1043 { "pcmpeqd", { MX, EM } }, 1044 { "emms", { XX } }, 1045 /* 78 */ 1046 { PREGRP34 }, 1047 { PREGRP35 }, 1048 { "(bad)", { XX } }, 1049 { "(bad)", { XX } }, 1050 { PREGRP28 }, 1051 { PREGRP29 }, 1052 { PREGRP23 }, 1053 { PREGRP20 }, 1054 /* 80 */ 1055 { "joH", { Jv, XX, cond_jump_flag } }, 1056 { "jnoH", { Jv, XX, cond_jump_flag } }, 1057 { "jbH", { Jv, XX, cond_jump_flag } }, 1058 { "jaeH", { Jv, XX, cond_jump_flag } }, 1059 { "jeH", { Jv, XX, cond_jump_flag } }, 1060 { "jneH", { Jv, XX, cond_jump_flag } }, 1061 { "jbeH", { Jv, XX, cond_jump_flag } }, 1062 { "jaH", { Jv, XX, cond_jump_flag } }, 1063 /* 88 */ 1064 { "jsH", { Jv, XX, cond_jump_flag } }, 1065 { "jnsH", { Jv, XX, cond_jump_flag } }, 1066 { "jpH", { Jv, XX, cond_jump_flag } }, 1067 { "jnpH", { Jv, XX, cond_jump_flag } }, 1068 { "jlH", { Jv, XX, cond_jump_flag } }, 1069 { "jgeH", { Jv, XX, cond_jump_flag } }, 1070 { "jleH", { Jv, XX, cond_jump_flag } }, 1071 { "jgH", { Jv, XX, cond_jump_flag } }, 1072 /* 90 */ 1073 { "seto", { Eb } }, 1074 { "setno", { Eb } }, 1075 { "setb", { Eb } }, 1076 { "setae", { Eb } }, 1077 { "sete", { Eb } }, 1078 { "setne", { Eb } }, 1079 { "setbe", { Eb } }, 1080 { "seta", { Eb } }, 1081 /* 98 */ 1082 { "sets", { Eb } }, 1083 { "setns", { Eb } }, 1084 { "setp", { Eb } }, 1085 { "setnp", { Eb } }, 1086 { "setl", { Eb } }, 1087 { "setge", { Eb } }, 1088 { "setle", { Eb } }, 1089 { "setg", { Eb } }, 1090 /* a0 */ 1091 { "pushT", { fs } }, 1092 { "popT", { fs } }, 1093 { "cpuid", { XX } }, 1094 { "btS", { Ev, Gv } }, 1095 { "shldS", { Ev, Gv, Ib } }, 1096 { "shldS", { Ev, Gv, CL } }, 1097 { GRPPADLCK2 }, 1098 { GRPPADLCK1 }, 1099 /* a8 */ 1100 { "pushT", { gs } }, 1101 { "popT", { gs } }, 1102 { "rsm", { XX } }, 1103 { "btsS", { Ev, Gv } }, 1104 { "shrdS", { Ev, Gv, Ib } }, 1105 { "shrdS", { Ev, Gv, CL } }, 1106 { GRP15 }, 1107 { "imulS", { Gv, Ev } }, 1108 /* b0 */ 1109 { "cmpxchgB", { Eb, Gb } }, 1110 { "cmpxchgS", { Ev, Gv } }, 1111 { "lssS", { Gv, Mp } }, 1112 { "btrS", { Ev, Gv } }, 1113 { "lfsS", { Gv, Mp } }, 1114 { "lgsS", { Gv, Mp } }, 1115 { "movz{bR|x|bR|x}", { Gv, Eb } }, 1116 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */ 1117 /* b8 */ 1118 { PREGRP37 }, 1119 { "ud2b", { XX } }, 1120 { GRP8 }, 1121 { "btcS", { Ev, Gv } }, 1122 { "bsfS", { Gv, Ev } }, 1123 { PREGRP36 }, 1124 { "movs{bR|x|bR|x}", { Gv, Eb } }, 1125 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */ 1126 /* c0 */ 1127 { "xaddB", { Eb, Gb } }, 1128 { "xaddS", { Ev, Gv } }, 1129 { PREGRP1 }, 1130 { "movntiS", { Ev, Gv } }, 1131 { "pinsrw", { MX, Edqw, Ib } }, 1132 { "pextrw", { Gdq, MS, Ib } }, 1133 { "shufpX", { XM, EXx, Ib } }, 1134 { GRP9 }, 1135 /* c8 */ 1136 { "bswap", { RMeAX } }, 1137 { "bswap", { RMeCX } }, 1138 { "bswap", { RMeDX } }, 1139 { "bswap", { RMeBX } }, 1140 { "bswap", { RMeSP } }, 1141 { "bswap", { RMeBP } }, 1142 { "bswap", { RMeSI } }, 1143 { "bswap", { RMeDI } }, 1144 /* d0 */ 1145 { PREGRP27 }, 1146 { "psrlw", { MX, EM } }, 1147 { "psrld", { MX, EM } }, 1148 { "psrlq", { MX, EM } }, 1149 { "paddq", { MX, EM } }, 1150 { "pmullw", { MX, EM } }, 1151 { PREGRP21 }, 1152 { "pmovmskb", { Gdq, MS } }, 1153 /* d8 */ 1154 { "psubusb", { MX, EM } }, 1155 { "psubusw", { MX, EM } }, 1156 { "pminub", { MX, EM } }, 1157 { "pand", { MX, EM } }, 1158 { "paddusb", { MX, EM } }, 1159 { "paddusw", { MX, EM } }, 1160 { "pmaxub", { MX, EM } }, 1161 { "pandn", { MX, EM } }, 1162 /* e0 */ 1163 { "pavgb", { MX, EM } }, 1164 { "psraw", { MX, EM } }, 1165 { "psrad", { MX, EM } }, 1166 { "pavgw", { MX, EM } }, 1167 { "pmulhuw", { MX, EM } }, 1168 { "pmulhw", { MX, EM } }, 1169 { PREGRP15 }, 1170 { PREGRP25 }, 1171 /* e8 */ 1172 { "psubsb", { MX, EM } }, 1173 { "psubsw", { MX, EM } }, 1174 { "pminsw", { MX, EM } }, 1175 { "por", { MX, EM } }, 1176 { "paddsb", { MX, EM } }, 1177 { "paddsw", { MX, EM } }, 1178 { "pmaxsw", { MX, EM } }, 1179 { "pxor", { MX, EM } }, 1180 /* f0 */ 1181 { PREGRP32 }, 1182 { "psllw", { MX, EM } }, 1183 { "pslld", { MX, EM } }, 1184 { "psllq", { MX, EM } }, 1185 { "pmuludq", { MX, EM } }, 1186 { "pmaddwd", { MX, EM } }, 1187 { "psadbw", { MX, EM } }, 1188 { PREGRP18 }, 1189 /* f8 */ 1190 { "psubb", { MX, EM } }, 1191 { "psubw", { MX, EM } }, 1192 { "psubd", { MX, EM } }, 1193 { "psubq", { MX, EM } }, 1194 { "paddb", { MX, EM } }, 1195 { "paddw", { MX, EM } }, 1196 { "paddd", { MX, EM } }, 1197 { "(bad)", { XX } }, 1198}; 1199 1200static const unsigned char onebyte_has_modrm[256] = { 1201 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1202 /* ------------------------------- */ 1203 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1204 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1205 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1206 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1207 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1208 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1209 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1210 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1211 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1212 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1213 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1214 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1215 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1216 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1217 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1218 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1219 /* ------------------------------- */ 1220 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1221}; 1222 1223static const unsigned char twobyte_has_modrm[256] = { 1224 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1225 /* ------------------------------- */ 1226 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1227 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */ 1228 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1229 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1230 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1231 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1232 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1233 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */ 1234 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1235 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1236 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ 1237 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */ 1238 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1239 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1240 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1241 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1242 /* ------------------------------- */ 1243 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1244}; 1245 1246static const unsigned char twobyte_uses_DATA_prefix[256] = { 1247 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1248 /* ------------------------------- */ 1249 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1250 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1251 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1252 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1253 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1254 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1255 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1256 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */ 1257 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1258 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1259 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1260 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1261 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1262 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1263 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1264 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1265 /* ------------------------------- */ 1266 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1267}; 1268 1269static const unsigned char twobyte_uses_REPNZ_prefix[256] = { 1270 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1271 /* ------------------------------- */ 1272 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1273 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1274 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1275 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1276 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1277 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */ 1278 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1279 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */ 1280 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1281 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1282 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1283 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1284 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1285 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1286 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1287 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1288 /* ------------------------------- */ 1289 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1290}; 1291 1292static const unsigned char twobyte_uses_REPZ_prefix[256] = { 1293 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1294 /* ------------------------------- */ 1295 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1296 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1297 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1298 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1299 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1300 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1301 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */ 1302 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ 1303 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1304 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1305 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0, /* af */ 1306 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */ 1307 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1308 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1309 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1310 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1311 /* ------------------------------- */ 1312 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1313}; 1314 1315/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */ 1316static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = { 1317 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1318 /* ------------------------------- */ 1319 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */ 1320 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */ 1321 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */ 1322 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */ 1323 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1324 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1325 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1326 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1327 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1328 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1329 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1330 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1331 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1332 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */ 1333 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1334 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1335 /* ------------------------------- */ 1336 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1337}; 1338 1339/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */ 1340static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = { 1341 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1342 /* ------------------------------- */ 1343 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1344 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1345 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1346 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1347 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1348 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1349 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1350 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1351 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1352 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1353 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1354 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1355 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1356 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1357 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1358 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1359 /* ------------------------------- */ 1360 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1361}; 1362 1363/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */ 1364static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = { 1365 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1366 /* ------------------------------- */ 1367 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1368 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1369 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1370 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1371 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1372 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1373 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1374 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1375 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1376 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1377 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1378 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1379 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1380 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1381 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1382 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1383 /* ------------------------------- */ 1384 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1385}; 1386 1387/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */ 1388static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = { 1389 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1390 /* ------------------------------- */ 1391 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */ 1392 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */ 1393 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1394 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1395 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1396 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1397 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1398 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1399 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1400 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1401 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1402 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1403 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1404 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */ 1405 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1406 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1407 /* ------------------------------- */ 1408 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1409}; 1410 1411/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */ 1412static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = { 1413 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1414 /* ------------------------------- */ 1415 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1416 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1417 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1418 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1419 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1420 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1421 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1422 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1423 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1424 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1425 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1426 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1427 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1428 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1429 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1430 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1431 /* ------------------------------- */ 1432 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1433}; 1434 1435/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */ 1436static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = { 1437 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1438 /* ------------------------------- */ 1439 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1440 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1441 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1442 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1443 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1444 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1445 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1446 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1447 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1448 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1449 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1450 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1451 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1452 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1453 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1454 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1455 /* ------------------------------- */ 1456 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1457}; 1458 1459static char obuf[100]; 1460static char *obufp; 1461static char scratchbuf[100]; 1462static unsigned char *start_codep; 1463static unsigned char *insn_codep; 1464static unsigned char *codep; 1465static disassemble_info *the_info; 1466static struct 1467 { 1468 int mod; 1469 int reg; 1470 int rm; 1471 } 1472modrm; 1473static unsigned char need_modrm; 1474 1475/* If we are accessing mod/rm/reg without need_modrm set, then the 1476 values are stale. Hitting this abort likely indicates that you 1477 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1478#define MODRM_CHECK if (!need_modrm) abort () 1479 1480static const char **names64; 1481static const char **names32; 1482static const char **names16; 1483static const char **names8; 1484static const char **names8rex; 1485static const char **names_seg; 1486static const char **index16; 1487 1488static const char *intel_names64[] = { 1489 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1490 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1491}; 1492static const char *intel_names32[] = { 1493 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1494 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1495}; 1496static const char *intel_names16[] = { 1497 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1498 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1499}; 1500static const char *intel_names8[] = { 1501 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1502}; 1503static const char *intel_names8rex[] = { 1504 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1505 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1506}; 1507static const char *intel_names_seg[] = { 1508 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1509}; 1510static const char *intel_index16[] = { 1511 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1512}; 1513 1514static const char *att_names64[] = { 1515 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1516 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1517}; 1518static const char *att_names32[] = { 1519 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1520 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1521}; 1522static const char *att_names16[] = { 1523 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1524 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1525}; 1526static const char *att_names8[] = { 1527 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1528}; 1529static const char *att_names8rex[] = { 1530 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1531 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1532}; 1533static const char *att_names_seg[] = { 1534 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1535}; 1536static const char *att_index16[] = { 1537 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1538}; 1539 1540static const struct dis386 grps[][8] = { 1541 /* GRP1a */ 1542 { 1543 { "popU", { stackEv } }, 1544 { "(bad)", { XX } }, 1545 { "(bad)", { XX } }, 1546 { "(bad)", { XX } }, 1547 { "(bad)", { XX } }, 1548 { "(bad)", { XX } }, 1549 { "(bad)", { XX } }, 1550 { "(bad)", { XX } }, 1551 }, 1552 /* GRP1b */ 1553 { 1554 { "addA", { Eb, Ib } }, 1555 { "orA", { Eb, Ib } }, 1556 { "adcA", { Eb, Ib } }, 1557 { "sbbA", { Eb, Ib } }, 1558 { "andA", { Eb, Ib } }, 1559 { "subA", { Eb, Ib } }, 1560 { "xorA", { Eb, Ib } }, 1561 { "cmpA", { Eb, Ib } }, 1562 }, 1563 /* GRP1S */ 1564 { 1565 { "addQ", { Ev, Iv } }, 1566 { "orQ", { Ev, Iv } }, 1567 { "adcQ", { Ev, Iv } }, 1568 { "sbbQ", { Ev, Iv } }, 1569 { "andQ", { Ev, Iv } }, 1570 { "subQ", { Ev, Iv } }, 1571 { "xorQ", { Ev, Iv } }, 1572 { "cmpQ", { Ev, Iv } }, 1573 }, 1574 /* GRP1Ss */ 1575 { 1576 { "addQ", { Ev, sIb } }, 1577 { "orQ", { Ev, sIb } }, 1578 { "adcQ", { Ev, sIb } }, 1579 { "sbbQ", { Ev, sIb } }, 1580 { "andQ", { Ev, sIb } }, 1581 { "subQ", { Ev, sIb } }, 1582 { "xorQ", { Ev, sIb } }, 1583 { "cmpQ", { Ev, sIb } }, 1584 }, 1585 /* GRP2b */ 1586 { 1587 { "rolA", { Eb, Ib } }, 1588 { "rorA", { Eb, Ib } }, 1589 { "rclA", { Eb, Ib } }, 1590 { "rcrA", { Eb, Ib } }, 1591 { "shlA", { Eb, Ib } }, 1592 { "shrA", { Eb, Ib } }, 1593 { "(bad)", { XX } }, 1594 { "sarA", { Eb, Ib } }, 1595 }, 1596 /* GRP2S */ 1597 { 1598 { "rolQ", { Ev, Ib } }, 1599 { "rorQ", { Ev, Ib } }, 1600 { "rclQ", { Ev, Ib } }, 1601 { "rcrQ", { Ev, Ib } }, 1602 { "shlQ", { Ev, Ib } }, 1603 { "shrQ", { Ev, Ib } }, 1604 { "(bad)", { XX } }, 1605 { "sarQ", { Ev, Ib } }, 1606 }, 1607 /* GRP2b_one */ 1608 { 1609 { "rolA", { Eb, I1 } }, 1610 { "rorA", { Eb, I1 } }, 1611 { "rclA", { Eb, I1 } }, 1612 { "rcrA", { Eb, I1 } }, 1613 { "shlA", { Eb, I1 } }, 1614 { "shrA", { Eb, I1 } }, 1615 { "(bad)", { XX } }, 1616 { "sarA", { Eb, I1 } }, 1617 }, 1618 /* GRP2S_one */ 1619 { 1620 { "rolQ", { Ev, I1 } }, 1621 { "rorQ", { Ev, I1 } }, 1622 { "rclQ", { Ev, I1 } }, 1623 { "rcrQ", { Ev, I1 } }, 1624 { "shlQ", { Ev, I1 } }, 1625 { "shrQ", { Ev, I1 } }, 1626 { "(bad)", { XX } }, 1627 { "sarQ", { Ev, I1 } }, 1628 }, 1629 /* GRP2b_cl */ 1630 { 1631 { "rolA", { Eb, CL } }, 1632 { "rorA", { Eb, CL } }, 1633 { "rclA", { Eb, CL } }, 1634 { "rcrA", { Eb, CL } }, 1635 { "shlA", { Eb, CL } }, 1636 { "shrA", { Eb, CL } }, 1637 { "(bad)", { XX } }, 1638 { "sarA", { Eb, CL } }, 1639 }, 1640 /* GRP2S_cl */ 1641 { 1642 { "rolQ", { Ev, CL } }, 1643 { "rorQ", { Ev, CL } }, 1644 { "rclQ", { Ev, CL } }, 1645 { "rcrQ", { Ev, CL } }, 1646 { "shlQ", { Ev, CL } }, 1647 { "shrQ", { Ev, CL } }, 1648 { "(bad)", { XX } }, 1649 { "sarQ", { Ev, CL } }, 1650 }, 1651 /* GRP3b */ 1652 { 1653 { "testA", { Eb, Ib } }, 1654 { "(bad)", { Eb } }, 1655 { "notA", { Eb } }, 1656 { "negA", { Eb } }, 1657 { "mulA", { Eb } }, /* Don't print the implicit %al register, */ 1658 { "imulA", { Eb } }, /* to distinguish these opcodes from other */ 1659 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */ 1660 { "idivA", { Eb } }, /* and idiv for consistency. */ 1661 }, 1662 /* GRP3S */ 1663 { 1664 { "testQ", { Ev, Iv } }, 1665 { "(bad)", { XX } }, 1666 { "notQ", { Ev } }, 1667 { "negQ", { Ev } }, 1668 { "mulQ", { Ev } }, /* Don't print the implicit register. */ 1669 { "imulQ", { Ev } }, 1670 { "divQ", { Ev } }, 1671 { "idivQ", { Ev } }, 1672 }, 1673 /* GRP4 */ 1674 { 1675 { "incA", { Eb } }, 1676 { "decA", { Eb } }, 1677 { "(bad)", { XX } }, 1678 { "(bad)", { XX } }, 1679 { "(bad)", { XX } }, 1680 { "(bad)", { XX } }, 1681 { "(bad)", { XX } }, 1682 { "(bad)", { XX } }, 1683 }, 1684 /* GRP5 */ 1685 { 1686 { "incQ", { Ev } }, 1687 { "decQ", { Ev } }, 1688 { "callT", { indirEv } }, 1689 { "JcallT", { indirEp } }, 1690 { "jmpT", { indirEv } }, 1691 { "JjmpT", { indirEp } }, 1692 { "pushU", { stackEv } }, 1693 { "(bad)", { XX } }, 1694 }, 1695 /* GRP6 */ 1696 { 1697 { "sldtD", { Sv } }, 1698 { "strD", { Sv } }, 1699 { "lldt", { Ew } }, 1700 { "ltr", { Ew } }, 1701 { "verr", { Ew } }, 1702 { "verw", { Ew } }, 1703 { "(bad)", { XX } }, 1704 { "(bad)", { XX } }, 1705 }, 1706 /* GRP7 */ 1707 { 1708 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } }, 1709 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } }, 1710 { "lgdt{Q|Q||}", { { XCR_Fixup, 0 } } }, 1711 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } }, 1712 { "smswD", { Sv } }, 1713 { "(bad)", { XX } }, 1714 { "lmsw", { Ew } }, 1715 { "invlpg", { { INVLPG_Fixup, w_mode } } }, 1716 }, 1717 /* GRP8 */ 1718 { 1719 { "(bad)", { XX } }, 1720 { "(bad)", { XX } }, 1721 { "(bad)", { XX } }, 1722 { "(bad)", { XX } }, 1723 { "btQ", { Ev, Ib } }, 1724 { "btsQ", { Ev, Ib } }, 1725 { "btrQ", { Ev, Ib } }, 1726 { "btcQ", { Ev, Ib } }, 1727 }, 1728 /* GRP9 */ 1729 { 1730 { "(bad)", { XX } }, 1731 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } }, 1732 { "(bad)", { XX } }, 1733 { "(bad)", { XX } }, 1734 { "(bad)", { XX } }, 1735 { "(bad)", { XX } }, 1736 { "", { VM } }, /* See OP_VMX. */ 1737 { "", { VM2 } }, /* See OP_VMX2. */ 1738 }, 1739 /* GRP11_C6 */ 1740 { 1741 { "movA", { Eb, Ib } }, 1742 { "(bad)", { XX } }, 1743 { "(bad)", { XX } }, 1744 { "(bad)", { XX } }, 1745 { "(bad)", { XX } }, 1746 { "(bad)", { XX } }, 1747 { "(bad)", { XX } }, 1748 { "(bad)", { XX } }, 1749 }, 1750 /* GRP11_C7 */ 1751 { 1752 { "movQ", { Ev, Iv } }, 1753 { "(bad)", { XX } }, 1754 { "(bad)", { XX } }, 1755 { "(bad)", { XX } }, 1756 { "(bad)", { XX } }, 1757 { "(bad)", { XX } }, 1758 { "(bad)", { XX } }, 1759 { "(bad)", { XX } }, 1760 }, 1761 /* GRP12 */ 1762 { 1763 { "(bad)", { XX } }, 1764 { "(bad)", { XX } }, 1765 { "psrlw", { MS, Ib } }, 1766 { "(bad)", { XX } }, 1767 { "psraw", { MS, Ib } }, 1768 { "(bad)", { XX } }, 1769 { "psllw", { MS, Ib } }, 1770 { "(bad)", { XX } }, 1771 }, 1772 /* GRP13 */ 1773 { 1774 { "(bad)", { XX } }, 1775 { "(bad)", { XX } }, 1776 { "psrld", { MS, Ib } }, 1777 { "(bad)", { XX } }, 1778 { "psrad", { MS, Ib } }, 1779 { "(bad)", { XX } }, 1780 { "pslld", { MS, Ib } }, 1781 { "(bad)", { XX } }, 1782 }, 1783 /* GRP14 */ 1784 { 1785 { "(bad)", { XX } }, 1786 { "(bad)", { XX } }, 1787 { "psrlq", { MS, Ib } }, 1788 { "psrldq", { MS, Ib } }, 1789 { "(bad)", { XX } }, 1790 { "(bad)", { XX } }, 1791 { "psllq", { MS, Ib } }, 1792 { "pslldq", { MS, Ib } }, 1793 }, 1794 /* GRP15 */ 1795 { 1796 { "fxsave", { { OP_0fae, v_mode } } }, 1797 { "fxrstor", { { OP_0fae, v_mode } } }, 1798 { "ldmxcsr", { { OP_0fae, v_mode } } }, 1799 { "stmxcsr", { { OP_0fae, v_mode } } }, 1800 { "xsave", { Ev } }, 1801 { "xrstor", { { OP_0fae, v_mode } } }, 1802 { "xsaveopt", { { OP_0fae, v_mode } } }, 1803 { "clflush", { { OP_0fae, 0 } } }, 1804 }, 1805 /* GRP16 */ 1806 { 1807 { "prefetchnta", { Ev } }, 1808 { "prefetcht0", { Ev } }, 1809 { "prefetcht1", { Ev } }, 1810 { "prefetcht2", { Ev } }, 1811 { "(bad)", { XX } }, 1812 { "(bad)", { XX } }, 1813 { "(bad)", { XX } }, 1814 { "(bad)", { XX } }, 1815 }, 1816 /* GRPAMD */ 1817 { 1818 { "prefetch", { Eb } }, 1819 { "prefetchw", { Eb } }, 1820 { "(bad)", { XX } }, 1821 { "(bad)", { XX } }, 1822 { "(bad)", { XX } }, 1823 { "(bad)", { XX } }, 1824 { "(bad)", { XX } }, 1825 { "(bad)", { XX } }, 1826 }, 1827 /* GRPPADLCK1 */ 1828 { 1829 { "xstore-rng", { { OP_0f07, 0 } } }, 1830 { "xcrypt-ecb", { { OP_0f07, 0 } } }, 1831 { "xcrypt-cbc", { { OP_0f07, 0 } } }, 1832 { "xcrypt-ctr", { { OP_0f07, 0 } } }, 1833 { "xcrypt-cfb", { { OP_0f07, 0 } } }, 1834 { "xcrypt-ofb", { { OP_0f07, 0 } } }, 1835 { "(bad)", { { OP_0f07, 0 } } }, 1836 { "(bad)", { { OP_0f07, 0 } } }, 1837 }, 1838 /* GRPPADLCK2 */ 1839 { 1840 { "montmul", { { OP_0f07, 0 } } }, 1841 { "xsha1", { { OP_0f07, 0 } } }, 1842 { "xsha256", { { OP_0f07, 0 } } }, 1843 { "(bad)", { { OP_0f07, 0 } } }, 1844 { "(bad)", { { OP_0f07, 0 } } }, 1845 { "(bad)", { { OP_0f07, 0 } } }, 1846 { "(bad)", { { OP_0f07, 0 } } }, 1847 { "(bad)", { { OP_0f07, 0 } } }, 1848 } 1849}; 1850 1851static const struct dis386 prefix_user_table[][4] = { 1852 /* PREGRP0 */ 1853 { 1854 { "addps", { XM, EXx } }, 1855 { "addss", { XM, EXd } }, 1856 { "addpd", { XM, EXx } }, 1857 { "addsd", { XM, EXq } }, 1858 }, 1859 /* PREGRP1 */ 1860 { 1861 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */ 1862 { "", { XM, EXx, OPSIMD } }, 1863 { "", { XM, EXx, OPSIMD } }, 1864 { "", { XM, EXx, OPSIMD } }, 1865 }, 1866 /* PREGRP2 */ 1867 { 1868 { "cvtpi2ps", { XM, EMC } }, 1869 { "cvtsi2ssY", { XM, Ev } }, 1870 { "cvtpi2pd", { XM, EMC } }, 1871 { "cvtsi2sdY", { XM, Ev } }, 1872 }, 1873 /* PREGRP3 */ 1874 { 1875 { "cvtps2pi", { MXC, EXx } }, 1876 { "cvtss2siY", { Gv, EXx } }, 1877 { "cvtpd2pi", { MXC, EXx } }, 1878 { "cvtsd2siY", { Gv, EXx } }, 1879 }, 1880 /* PREGRP4 */ 1881 { 1882 { "cvttps2pi", { MXC, EXx } }, 1883 { "cvttss2siY", { Gv, EXx } }, 1884 { "cvttpd2pi", { MXC, EXx } }, 1885 { "cvttsd2siY", { Gv, EXx } }, 1886 }, 1887 /* PREGRP5 */ 1888 { 1889 { "divps", { XM, EXx } }, 1890 { "divss", { XM, EXx } }, 1891 { "divpd", { XM, EXx } }, 1892 { "divsd", { XM, EXx } }, 1893 }, 1894 /* PREGRP6 */ 1895 { 1896 { "maxps", { XM, EXx } }, 1897 { "maxss", { XM, EXx } }, 1898 { "maxpd", { XM, EXx } }, 1899 { "maxsd", { XM, EXx } }, 1900 }, 1901 /* PREGRP7 */ 1902 { 1903 { "minps", { XM, EXx } }, 1904 { "minss", { XM, EXx } }, 1905 { "minpd", { XM, EXx } }, 1906 { "minsd", { XM, EXx } }, 1907 }, 1908 /* PREGRP8 */ 1909 { 1910 { "movups", { XM, EXx } }, 1911 { "movss", { XM, EXx } }, 1912 { "movupd", { XM, EXx } }, 1913 { "movsd", { XM, EXx } }, 1914 }, 1915 /* PREGRP9 */ 1916 { 1917 { "movups", { EXx, XM } }, 1918 { "movss", { EXx, XM } }, 1919 { "movupd", { EXx, XM } }, 1920 { "movsd", { EXx, XM } }, 1921 }, 1922 /* PREGRP10 */ 1923 { 1924 { "mulps", { XM, EXx } }, 1925 { "mulss", { XM, EXx } }, 1926 { "mulpd", { XM, EXx } }, 1927 { "mulsd", { XM, EXx } }, 1928 }, 1929 /* PREGRP11 */ 1930 { 1931 { "rcpps", { XM, EXx } }, 1932 { "rcpss", { XM, EXx } }, 1933 { "(bad)", { XM, EXx } }, 1934 { "(bad)", { XM, EXx } }, 1935 }, 1936 /* PREGRP12 */ 1937 { 1938 { "rsqrtps",{ XM, EXx } }, 1939 { "rsqrtss",{ XM, EXx } }, 1940 { "(bad)", { XM, EXx } }, 1941 { "(bad)", { XM, EXx } }, 1942 }, 1943 /* PREGRP13 */ 1944 { 1945 { "sqrtps", { XM, EXx } }, 1946 { "sqrtss", { XM, EXx } }, 1947 { "sqrtpd", { XM, EXx } }, 1948 { "sqrtsd", { XM, EXx } }, 1949 }, 1950 /* PREGRP14 */ 1951 { 1952 { "subps", { XM, EXx } }, 1953 { "subss", { XM, EXx } }, 1954 { "subpd", { XM, EXx } }, 1955 { "subsd", { XM, EXx } }, 1956 }, 1957 /* PREGRP15 */ 1958 { 1959 { "(bad)", { XM, EXx } }, 1960 { "cvtdq2pd", { XM, EXq } }, 1961 { "cvttpd2dq", { XM, EXx } }, 1962 { "cvtpd2dq", { XM, EXx } }, 1963 }, 1964 /* PREGRP16 */ 1965 { 1966 { "cvtdq2ps", { XM, EXx } }, 1967 { "cvttps2dq", { XM, EXx } }, 1968 { "cvtps2dq", { XM, EXx } }, 1969 { "(bad)", { XM, EXx } }, 1970 }, 1971 /* PREGRP17 */ 1972 { 1973 { "cvtps2pd", { XM, EXq } }, 1974 { "cvtss2sd", { XM, EXx } }, 1975 { "cvtpd2ps", { XM, EXx } }, 1976 { "cvtsd2ss", { XM, EXx } }, 1977 }, 1978 /* PREGRP18 */ 1979 { 1980 { "maskmovq", { MX, MS } }, 1981 { "(bad)", { XM, EXx } }, 1982 { "maskmovdqu", { XM, XS } }, 1983 { "(bad)", { XM, EXx } }, 1984 }, 1985 /* PREGRP19 */ 1986 { 1987 { "movq", { MX, EM } }, 1988 { "movdqu", { XM, EXx } }, 1989 { "movdqa", { XM, EXx } }, 1990 { "(bad)", { XM, EXx } }, 1991 }, 1992 /* PREGRP20 */ 1993 { 1994 { "movq", { EM, MX } }, 1995 { "movdqu", { EXx, XM } }, 1996 { "movdqa", { EXx, XM } }, 1997 { "(bad)", { EXx, XM } }, 1998 }, 1999 /* PREGRP21 */ 2000 { 2001 { "(bad)", { EXx, XM } }, 2002 { "movq2dq",{ XM, MS } }, 2003 { "movq", { EXx, XM } }, 2004 { "movdq2q",{ MX, XS } }, 2005 }, 2006 /* PREGRP22 */ 2007 { 2008 { "pshufw", { MX, EM, Ib } }, 2009 { "pshufhw",{ XM, EXx, Ib } }, 2010 { "pshufd", { XM, EXx, Ib } }, 2011 { "pshuflw",{ XM, EXx, Ib } }, 2012 }, 2013 /* PREGRP23 */ 2014 { 2015 { "movd", { Edq, MX } }, 2016 { "movq", { XM, EXx } }, 2017 { "movd", { Edq, XM } }, 2018 { "(bad)", { Ed, XM } }, 2019 }, 2020 /* PREGRP24 */ 2021 { 2022 { "(bad)", { MX, EXx } }, 2023 { "(bad)", { XM, EXx } }, 2024 { "punpckhqdq", { XM, EXx } }, 2025 { "(bad)", { XM, EXx } }, 2026 }, 2027 /* PREGRP25 */ 2028 { 2029 { "movntq", { EM, MX } }, 2030 { "(bad)", { EM, XM } }, 2031 { "movntdq",{ EM, XM } }, 2032 { "(bad)", { EM, XM } }, 2033 }, 2034 /* PREGRP26 */ 2035 { 2036 { "(bad)", { MX, EXx } }, 2037 { "(bad)", { XM, EXx } }, 2038 { "punpcklqdq", { XM, EXx } }, 2039 { "(bad)", { XM, EXx } }, 2040 }, 2041 /* PREGRP27 */ 2042 { 2043 { "(bad)", { MX, EXx } }, 2044 { "(bad)", { XM, EXx } }, 2045 { "addsubpd", { XM, EXx } }, 2046 { "addsubps", { XM, EXx } }, 2047 }, 2048 /* PREGRP28 */ 2049 { 2050 { "(bad)", { MX, EXx } }, 2051 { "(bad)", { XM, EXx } }, 2052 { "haddpd", { XM, EXx } }, 2053 { "haddps", { XM, EXx } }, 2054 }, 2055 /* PREGRP29 */ 2056 { 2057 { "(bad)", { MX, EXx } }, 2058 { "(bad)", { XM, EXx } }, 2059 { "hsubpd", { XM, EXx } }, 2060 { "hsubps", { XM, EXx } }, 2061 }, 2062 /* PREGRP30 */ 2063 { 2064 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */ 2065 { "movsldup", { XM, EXx } }, 2066 { "movlpd", { XM, EXq } }, 2067 { "movddup", { XM, EXq } }, 2068 }, 2069 /* PREGRP31 */ 2070 { 2071 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } }, 2072 { "movshdup", { XM, EXx } }, 2073 { "movhpd", { XM, EXq } }, 2074 { "(bad)", { XM, EXq } }, 2075 }, 2076 /* PREGRP32 */ 2077 { 2078 { "(bad)", { XM, EXx } }, 2079 { "(bad)", { XM, EXx } }, 2080 { "(bad)", { XM, EXx } }, 2081 { "lddqu", { XM, M } }, 2082 }, 2083 /* PREGRP33 */ 2084 { 2085 {"movntps", { Ev, XM } }, 2086 {"movntss", { Ev, XM } }, 2087 {"movntpd", { Ev, XM } }, 2088 {"movntsd", { Ev, XM } }, 2089 }, 2090 2091 /* PREGRP34 */ 2092 { 2093 {"vmread", { Em, Gm } }, 2094 {"(bad)", { XX } }, 2095 {"extrq", { XS, Ib, Ib } }, 2096 {"insertq", { XM, XS, Ib, Ib } }, 2097 }, 2098 2099 /* PREGRP35 */ 2100 { 2101 {"vmwrite", { Gm, Em } }, 2102 {"(bad)", { XX } }, 2103 {"extrq", { XM, XS } }, 2104 {"insertq", { XM, XS } }, 2105 }, 2106 2107 /* PREGRP36 */ 2108 { 2109 { "bsrS", { Gv, Ev } }, 2110 { "lzcntS", { Gv, Ev } }, 2111 { "bsrS", { Gv, Ev } }, 2112 { "(bad)", { XX } }, 2113 }, 2114 2115 /* PREGRP37 */ 2116 { 2117 { "(bad)", { XX } }, 2118 { "popcntS", { Gv, Ev } }, 2119 { "(bad)", { XX } }, 2120 { "(bad)", { XX } }, 2121 }, 2122 2123 /* PREGRP38 */ 2124 { 2125 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2126 { "pause", { XX } }, 2127 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2128 { "(bad)", { XX } }, 2129 }, 2130 2131 /* PREGRP39 */ 2132 { 2133 { "(bad)", { XX } }, 2134 { "(bad)", { XX } }, 2135 { "pblendvb", {XM, EXx, XMM0 } }, 2136 { "(bad)", { XX } }, 2137 }, 2138 2139 /* PREGRP40 */ 2140 { 2141 { "(bad)", { XX } }, 2142 { "(bad)", { XX } }, 2143 { "blendvps", {XM, EXx, XMM0 } }, 2144 { "(bad)", { XX } }, 2145 }, 2146 2147 /* PREGRP41 */ 2148 { 2149 { "(bad)", { XX } }, 2150 { "(bad)", { XX } }, 2151 { "blendvpd", { XM, EXx, XMM0 } }, 2152 { "(bad)", { XX } }, 2153 }, 2154 2155 /* PREGRP42 */ 2156 { 2157 { "(bad)", { XX } }, 2158 { "(bad)", { XX } }, 2159 { "ptest", { XM, EXx } }, 2160 { "(bad)", { XX } }, 2161 }, 2162 2163 /* PREGRP43 */ 2164 { 2165 { "(bad)", { XX } }, 2166 { "(bad)", { XX } }, 2167 { "pmovsxbw", { XM, EXx } }, 2168 { "(bad)", { XX } }, 2169 }, 2170 2171 /* PREGRP44 */ 2172 { 2173 { "(bad)", { XX } }, 2174 { "(bad)", { XX } }, 2175 { "pmovsxbd", { XM, EXx } }, 2176 { "(bad)", { XX } }, 2177 }, 2178 2179 /* PREGRP45 */ 2180 { 2181 { "(bad)", { XX } }, 2182 { "(bad)", { XX } }, 2183 { "pmovsxbq", { XM, EXx } }, 2184 { "(bad)", { XX } }, 2185 }, 2186 2187 /* PREGRP46 */ 2188 { 2189 { "(bad)", { XX } }, 2190 { "(bad)", { XX } }, 2191 { "pmovsxwd", { XM, EXx } }, 2192 { "(bad)", { XX } }, 2193 }, 2194 2195 /* PREGRP47 */ 2196 { 2197 { "(bad)", { XX } }, 2198 { "(bad)", { XX } }, 2199 { "pmovsxwq", { XM, EXx } }, 2200 { "(bad)", { XX } }, 2201 }, 2202 2203 /* PREGRP48 */ 2204 { 2205 { "(bad)", { XX } }, 2206 { "(bad)", { XX } }, 2207 { "pmovsxdq", { XM, EXx } }, 2208 { "(bad)", { XX } }, 2209 }, 2210 2211 /* PREGRP49 */ 2212 { 2213 { "(bad)", { XX } }, 2214 { "(bad)", { XX } }, 2215 { "pmuldq", { XM, EXx } }, 2216 { "(bad)", { XX } }, 2217 }, 2218 2219 /* PREGRP50 */ 2220 { 2221 { "(bad)", { XX } }, 2222 { "(bad)", { XX } }, 2223 { "pcmpeqq", { XM, EXx } }, 2224 { "(bad)", { XX } }, 2225 }, 2226 2227 /* PREGRP51 */ 2228 { 2229 { "(bad)", { XX } }, 2230 { "(bad)", { XX } }, 2231 { "movntdqa", { XM, EM } }, 2232 { "(bad)", { XX } }, 2233 }, 2234 2235 /* PREGRP52 */ 2236 { 2237 { "(bad)", { XX } }, 2238 { "(bad)", { XX } }, 2239 { "packusdw", { XM, EXx } }, 2240 { "(bad)", { XX } }, 2241 }, 2242 2243 /* PREGRP53 */ 2244 { 2245 { "(bad)", { XX } }, 2246 { "(bad)", { XX } }, 2247 { "pmovzxbw", { XM, EXx } }, 2248 { "(bad)", { XX } }, 2249 }, 2250 2251 /* PREGRP54 */ 2252 { 2253 { "(bad)", { XX } }, 2254 { "(bad)", { XX } }, 2255 { "pmovzxbd", { XM, EXx } }, 2256 { "(bad)", { XX } }, 2257 }, 2258 2259 /* PREGRP55 */ 2260 { 2261 { "(bad)", { XX } }, 2262 { "(bad)", { XX } }, 2263 { "pmovzxbq", { XM, EXx } }, 2264 { "(bad)", { XX } }, 2265 }, 2266 2267 /* PREGRP56 */ 2268 { 2269 { "(bad)", { XX } }, 2270 { "(bad)", { XX } }, 2271 { "pmovzxwd", { XM, EXx } }, 2272 { "(bad)", { XX } }, 2273 }, 2274 2275 /* PREGRP57 */ 2276 { 2277 { "(bad)", { XX } }, 2278 { "(bad)", { XX } }, 2279 { "pmovzxwq", { XM, EXx } }, 2280 { "(bad)", { XX } }, 2281 }, 2282 2283 /* PREGRP58 */ 2284 { 2285 { "(bad)", { XX } }, 2286 { "(bad)", { XX } }, 2287 { "pmovzxdq", { XM, EXx } }, 2288 { "(bad)", { XX } }, 2289 }, 2290 2291 /* PREGRP59 */ 2292 { 2293 { "(bad)", { XX } }, 2294 { "(bad)", { XX } }, 2295 { "pminsb", { XM, EXx } }, 2296 { "(bad)", { XX } }, 2297 }, 2298 2299 /* PREGRP60 */ 2300 { 2301 { "(bad)", { XX } }, 2302 { "(bad)", { XX } }, 2303 { "pminsd", { XM, EXx } }, 2304 { "(bad)", { XX } }, 2305 }, 2306 2307 /* PREGRP61 */ 2308 { 2309 { "(bad)", { XX } }, 2310 { "(bad)", { XX } }, 2311 { "pminuw", { XM, EXx } }, 2312 { "(bad)", { XX } }, 2313 }, 2314 2315 /* PREGRP62 */ 2316 { 2317 { "(bad)", { XX } }, 2318 { "(bad)", { XX } }, 2319 { "pminud", { XM, EXx } }, 2320 { "(bad)", { XX } }, 2321 }, 2322 2323 /* PREGRP63 */ 2324 { 2325 { "(bad)", { XX } }, 2326 { "(bad)", { XX } }, 2327 { "pmaxsb", { XM, EXx } }, 2328 { "(bad)", { XX } }, 2329 }, 2330 2331 /* PREGRP64 */ 2332 { 2333 { "(bad)", { XX } }, 2334 { "(bad)", { XX } }, 2335 { "pmaxsd", { XM, EXx } }, 2336 { "(bad)", { XX } }, 2337 }, 2338 2339 /* PREGRP65 */ 2340 { 2341 { "(bad)", { XX } }, 2342 { "(bad)", { XX } }, 2343 { "pmaxuw", { XM, EXx } }, 2344 { "(bad)", { XX } }, 2345 }, 2346 2347 /* PREGRP66 */ 2348 { 2349 { "(bad)", { XX } }, 2350 { "(bad)", { XX } }, 2351 { "pmaxud", { XM, EXx } }, 2352 { "(bad)", { XX } }, 2353 }, 2354 2355 /* PREGRP67 */ 2356 { 2357 { "(bad)", { XX } }, 2358 { "(bad)", { XX } }, 2359 { "pmulld", { XM, EXx } }, 2360 { "(bad)", { XX } }, 2361 }, 2362 2363 /* PREGRP68 */ 2364 { 2365 { "(bad)", { XX } }, 2366 { "(bad)", { XX } }, 2367 { "phminposuw", { XM, EXx } }, 2368 { "(bad)", { XX } }, 2369 }, 2370 2371 /* PREGRP69 */ 2372 { 2373 { "(bad)", { XX } }, 2374 { "(bad)", { XX } }, 2375 { "roundps", { XM, EXx, Ib } }, 2376 { "(bad)", { XX } }, 2377 }, 2378 2379 /* PREGRP70 */ 2380 { 2381 { "(bad)", { XX } }, 2382 { "(bad)", { XX } }, 2383 { "roundpd", { XM, EXx, Ib } }, 2384 { "(bad)", { XX } }, 2385 }, 2386 2387 /* PREGRP71 */ 2388 { 2389 { "(bad)", { XX } }, 2390 { "(bad)", { XX } }, 2391 { "roundss", { XM, EXx, Ib } }, 2392 { "(bad)", { XX } }, 2393 }, 2394 2395 /* PREGRP72 */ 2396 { 2397 { "(bad)", { XX } }, 2398 { "(bad)", { XX } }, 2399 { "roundsd", { XM, EXx, Ib } }, 2400 { "(bad)", { XX } }, 2401 }, 2402 2403 /* PREGRP73 */ 2404 { 2405 { "(bad)", { XX } }, 2406 { "(bad)", { XX } }, 2407 { "blendps", { XM, EXx, Ib } }, 2408 { "(bad)", { XX } }, 2409 }, 2410 2411 /* PREGRP74 */ 2412 { 2413 { "(bad)", { XX } }, 2414 { "(bad)", { XX } }, 2415 { "blendpd", { XM, EXx, Ib } }, 2416 { "(bad)", { XX } }, 2417 }, 2418 2419 /* PREGRP75 */ 2420 { 2421 { "(bad)", { XX } }, 2422 { "(bad)", { XX } }, 2423 { "pblendw", { XM, EXx, Ib } }, 2424 { "(bad)", { XX } }, 2425 }, 2426 2427 /* PREGRP76 */ 2428 { 2429 { "(bad)", { XX } }, 2430 { "(bad)", { XX } }, 2431 { "pextrb", { Edqb, XM, Ib } }, 2432 { "(bad)", { XX } }, 2433 }, 2434 2435 /* PREGRP77 */ 2436 { 2437 { "(bad)", { XX } }, 2438 { "(bad)", { XX } }, 2439 { "pextrw", { Edqw, XM, Ib } }, 2440 { "(bad)", { XX } }, 2441 }, 2442 2443 /* PREGRP78 */ 2444 { 2445 { "(bad)", { XX } }, 2446 { "(bad)", { XX } }, 2447 { "pextrK", { Edq, XM, Ib } }, 2448 { "(bad)", { XX } }, 2449 }, 2450 2451 /* PREGRP79 */ 2452 { 2453 { "(bad)", { XX } }, 2454 { "(bad)", { XX } }, 2455 { "extractps", { Edqd, XM, Ib } }, 2456 { "(bad)", { XX } }, 2457 }, 2458 2459 /* PREGRP80 */ 2460 { 2461 { "(bad)", { XX } }, 2462 { "(bad)", { XX } }, 2463 { "pinsrb", { XM, Edqb, Ib } }, 2464 { "(bad)", { XX } }, 2465 }, 2466 2467 /* PREGRP81 */ 2468 { 2469 { "(bad)", { XX } }, 2470 { "(bad)", { XX } }, 2471 { "insertps", { XM, EXx, Ib } }, 2472 { "(bad)", { XX } }, 2473 }, 2474 2475 /* PREGRP82 */ 2476 { 2477 { "(bad)", { XX } }, 2478 { "(bad)", { XX } }, 2479 { "pinsrK", { XM, Edq, Ib } }, 2480 { "(bad)", { XX } }, 2481 }, 2482 2483 /* PREGRP83 */ 2484 { 2485 { "(bad)", { XX } }, 2486 { "(bad)", { XX } }, 2487 { "dpps", { XM, EXx, Ib } }, 2488 { "(bad)", { XX } }, 2489 }, 2490 2491 /* PREGRP84 */ 2492 { 2493 { "(bad)", { XX } }, 2494 { "(bad)", { XX } }, 2495 { "dppd", { XM, EXx, Ib } }, 2496 { "(bad)", { XX } }, 2497 }, 2498 2499 /* PREGRP85 */ 2500 { 2501 { "(bad)", { XX } }, 2502 { "(bad)", { XX } }, 2503 { "mpsadbw", { XM, EXx, Ib } }, 2504 { "(bad)", { XX } }, 2505 }, 2506 2507 /* PREGRP86 */ 2508 { 2509 { "(bad)", { XX } }, 2510 { "(bad)", { XX } }, 2511 { "pcmpgtq", { XM, EXx } }, 2512 { "(bad)", { XX } }, 2513 }, 2514 2515 /* PREGRP87 */ 2516 { 2517 { "(bad)", { XX } }, 2518 { "(bad)", { XX } }, 2519 { "(bad)", { XX } }, 2520 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } }, 2521 }, 2522 2523 /* PREGRP88 */ 2524 { 2525 { "(bad)", { XX } }, 2526 { "(bad)", { XX } }, 2527 { "(bad)", { XX } }, 2528 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } }, 2529 }, 2530 2531 /* PREGRP89 */ 2532 { 2533 { "(bad)", { XX } }, 2534 { "(bad)", { XX } }, 2535 { "pcmpestrm", { XM, EXx, Ib } }, 2536 { "(bad)", { XX } }, 2537 }, 2538 2539 /* PREGRP90 */ 2540 { 2541 { "(bad)", { XX } }, 2542 { "(bad)", { XX } }, 2543 { "pcmpestri", { XM, EXx, Ib } }, 2544 { "(bad)", { XX } }, 2545 }, 2546 2547 /* PREGRP91 */ 2548 { 2549 { "(bad)", { XX } }, 2550 { "(bad)", { XX } }, 2551 { "pcmpistrm", { XM, EXx, Ib } }, 2552 { "(bad)", { XX } }, 2553 }, 2554 2555 /* PREGRP92 */ 2556 { 2557 { "(bad)", { XX } }, 2558 { "(bad)", { XX } }, 2559 { "pcmpistri", { XM, EXx, Ib } }, 2560 { "(bad)", { XX } }, 2561 }, 2562 2563 /* PREGRP93 */ 2564 { 2565 { "ucomiss",{ XM, EXd } }, 2566 { "(bad)", { XX } }, 2567 { "ucomisd",{ XM, EXq } }, 2568 { "(bad)", { XX } }, 2569 }, 2570 2571 /* PREGRP94 */ 2572 { 2573 { "comiss", { XM, EXd } }, 2574 { "(bad)", { XX } }, 2575 { "comisd", { XM, EXq } }, 2576 { "(bad)", { XX } }, 2577 }, 2578 2579 /* PREGRP95 */ 2580 { 2581 { "punpcklbw",{ MX, EMd } }, 2582 { "(bad)", { XX } }, 2583 { "punpcklbw",{ MX, EMq } }, 2584 { "(bad)", { XX } }, 2585 }, 2586 2587 /* PREGRP96 */ 2588 { 2589 { "punpcklwd",{ MX, EMd } }, 2590 { "(bad)", { XX } }, 2591 { "punpcklwd",{ MX, EMq } }, 2592 { "(bad)", { XX } }, 2593 }, 2594 2595 /* PREGRP97 */ 2596 { 2597 { "punpckldq",{ MX, EMd } }, 2598 { "(bad)", { XX } }, 2599 { "punpckldq",{ MX, EMq } }, 2600 { "(bad)", { XX } }, 2601 }, 2602 2603 /* PREGRP98 */ 2604 { 2605 { "(bad)", { XX } }, 2606 { "(bad)", { XX } }, 2607 { "invept", { Gm, Mo } }, 2608 { "(bad)", { XX } }, 2609 }, 2610 2611 /* PREGRP99 */ 2612 { 2613 { "(bad)", { XX } }, 2614 { "(bad)", { XX } }, 2615 { "invvpid",{ Gm, Mo } }, 2616 { "(bad)", { XX } }, 2617 }, 2618 2619 /* PREGRP100 */ 2620 { 2621 { "(bad)", { XX } }, 2622 { "(bad)", { XX } }, 2623 { "aesimc", { XM, EXx } }, 2624 { "(bad)", { XX } }, 2625 }, 2626 2627 /* PREGRP101 */ 2628 { 2629 { "(bad)", { XX } }, 2630 { "(bad)", { XX } }, 2631 { "aesenc",{ XM, EXx } }, 2632 { "(bad)", { XX } }, 2633 }, 2634 2635 /* PREGRP102 */ 2636 { 2637 { "(bad)", { XX } }, 2638 { "(bad)", { XX } }, 2639 { "aesenclast", { XM, EXx } }, 2640 { "(bad)", { XX } }, 2641 }, 2642 2643 /* PREGRP103 */ 2644 { 2645 { "(bad)", { XX } }, 2646 { "(bad)", { XX } }, 2647 { "aesdec", { XM, EXx } }, 2648 { "(bad)", { XX } }, 2649 }, 2650 2651 /* PREGRP104 */ 2652 { 2653 { "(bad)", { XX } }, 2654 { "(bad)", { XX } }, 2655 { "aesdeclast", { XM, EXx } }, 2656 { "(bad)", { XX } }, 2657 }, 2658 2659 /* PREGRP105 */ 2660 { 2661 { "(bad)", { XX } }, 2662 { "(bad)", { XX } }, 2663 { "aeskeygenassist", { XM, EXx, Ib } }, 2664 { "(bad)", { XX } }, 2665 }, 2666 2667 /* PREGRP106 */ 2668 { 2669 { "(bad)", { XX } }, 2670 { "(bad)", { XX } }, 2671 { "pclmulqdq", { XM, EXx, Ib } }, 2672 { "(bad)", { XX } }, 2673 }, 2674 2675 /* PREGRP107 */ 2676 { 2677 { "(bad)", { XX } }, 2678 { "(bad)", { XX } }, 2679 { "invpcid",{ Gm, Mo } }, 2680 { "(bad)", { XX } }, 2681 }, 2682}; 2683 2684static const struct dis386 x86_64_table[][2] = { 2685 { 2686 { "pusha{P|}", { XX } }, 2687 { "(bad)", { XX } }, 2688 }, 2689 { 2690 { "popa{P|}", { XX } }, 2691 { "(bad)", { XX } }, 2692 }, 2693 { 2694 { "bound{S|}", { Gv, Ma } }, 2695 { "(bad)", { XX } }, 2696 }, 2697 { 2698 { "arpl", { Ew, Gw } }, 2699 { "movs{||lq|xd}", { Gv, Ed } }, 2700 }, 2701}; 2702 2703static const struct dis386 three_byte_table[][256] = { 2704 /* THREE_BYTE_0 */ 2705 { 2706 /* 00 */ 2707 { "pshufb", { MX, EM } }, 2708 { "phaddw", { MX, EM } }, 2709 { "phaddd", { MX, EM } }, 2710 { "phaddsw", { MX, EM } }, 2711 { "pmaddubsw", { MX, EM } }, 2712 { "phsubw", { MX, EM } }, 2713 { "phsubd", { MX, EM } }, 2714 { "phsubsw", { MX, EM } }, 2715 /* 08 */ 2716 { "psignb", { MX, EM } }, 2717 { "psignw", { MX, EM } }, 2718 { "psignd", { MX, EM } }, 2719 { "pmulhrsw", { MX, EM } }, 2720 { "(bad)", { XX } }, 2721 { "(bad)", { XX } }, 2722 { "(bad)", { XX } }, 2723 { "(bad)", { XX } }, 2724 /* 10 */ 2725 { PREGRP39 }, 2726 { "(bad)", { XX } }, 2727 { "(bad)", { XX } }, 2728 { "(bad)", { XX } }, 2729 { PREGRP40 }, 2730 { PREGRP41 }, 2731 { "(bad)", { XX } }, 2732 { PREGRP42 }, 2733 /* 18 */ 2734 { "(bad)", { XX } }, 2735 { "(bad)", { XX } }, 2736 { "(bad)", { XX } }, 2737 { "(bad)", { XX } }, 2738 { "pabsb", { MX, EM } }, 2739 { "pabsw", { MX, EM } }, 2740 { "pabsd", { MX, EM } }, 2741 { "(bad)", { XX } }, 2742 /* 20 */ 2743 { PREGRP43 }, 2744 { PREGRP44 }, 2745 { PREGRP45 }, 2746 { PREGRP46 }, 2747 { PREGRP47 }, 2748 { PREGRP48 }, 2749 { "(bad)", { XX } }, 2750 { "(bad)", { XX } }, 2751 /* 28 */ 2752 { PREGRP49 }, 2753 { PREGRP50 }, 2754 { PREGRP51 }, 2755 { PREGRP52 }, 2756 { "(bad)", { XX } }, 2757 { "(bad)", { XX } }, 2758 { "(bad)", { XX } }, 2759 { "(bad)", { XX } }, 2760 /* 30 */ 2761 { PREGRP53 }, 2762 { PREGRP54 }, 2763 { PREGRP55 }, 2764 { PREGRP56 }, 2765 { PREGRP57 }, 2766 { PREGRP58 }, 2767 { "(bad)", { XX } }, 2768 { PREGRP86 }, 2769 /* 38 */ 2770 { PREGRP59 }, 2771 { PREGRP60 }, 2772 { PREGRP61 }, 2773 { PREGRP62 }, 2774 { PREGRP63 }, 2775 { PREGRP64 }, 2776 { PREGRP65 }, 2777 { PREGRP66 }, 2778 /* 40 */ 2779 { PREGRP67 }, 2780 { PREGRP68 }, 2781 { "(bad)", { XX } }, 2782 { "(bad)", { XX } }, 2783 { "(bad)", { XX } }, 2784 { "(bad)", { XX } }, 2785 { "(bad)", { XX } }, 2786 { "(bad)", { XX } }, 2787 /* 48 */ 2788 { "(bad)", { XX } }, 2789 { "(bad)", { XX } }, 2790 { "(bad)", { XX } }, 2791 { "(bad)", { XX } }, 2792 { "(bad)", { XX } }, 2793 { "(bad)", { XX } }, 2794 { "(bad)", { XX } }, 2795 { "(bad)", { XX } }, 2796 /* 50 */ 2797 { "(bad)", { XX } }, 2798 { "(bad)", { XX } }, 2799 { "(bad)", { XX } }, 2800 { "(bad)", { XX } }, 2801 { "(bad)", { XX } }, 2802 { "(bad)", { XX } }, 2803 { "(bad)", { XX } }, 2804 { "(bad)", { XX } }, 2805 /* 58 */ 2806 { "(bad)", { XX } }, 2807 { "(bad)", { XX } }, 2808 { "(bad)", { XX } }, 2809 { "(bad)", { XX } }, 2810 { "(bad)", { XX } }, 2811 { "(bad)", { XX } }, 2812 { "(bad)", { XX } }, 2813 { "(bad)", { XX } }, 2814 /* 60 */ 2815 { "(bad)", { XX } }, 2816 { "(bad)", { XX } }, 2817 { "(bad)", { XX } }, 2818 { "(bad)", { XX } }, 2819 { "(bad)", { XX } }, 2820 { "(bad)", { XX } }, 2821 { "(bad)", { XX } }, 2822 { "(bad)", { XX } }, 2823 /* 68 */ 2824 { "(bad)", { XX } }, 2825 { "(bad)", { XX } }, 2826 { "(bad)", { XX } }, 2827 { "(bad)", { XX } }, 2828 { "(bad)", { XX } }, 2829 { "(bad)", { XX } }, 2830 { "(bad)", { XX } }, 2831 { "(bad)", { XX } }, 2832 /* 70 */ 2833 { "(bad)", { XX } }, 2834 { "(bad)", { XX } }, 2835 { "(bad)", { XX } }, 2836 { "(bad)", { XX } }, 2837 { "(bad)", { XX } }, 2838 { "(bad)", { XX } }, 2839 { "(bad)", { XX } }, 2840 { "(bad)", { XX } }, 2841 /* 78 */ 2842 { "(bad)", { XX } }, 2843 { "(bad)", { XX } }, 2844 { "(bad)", { XX } }, 2845 { "(bad)", { XX } }, 2846 { "(bad)", { XX } }, 2847 { "(bad)", { XX } }, 2848 { "(bad)", { XX } }, 2849 { "(bad)", { XX } }, 2850 /* 80 */ 2851 { PREGRP98 }, 2852 { PREGRP99 }, 2853 { PREGRP107 }, 2854 { "(bad)", { XX } }, 2855 { "(bad)", { XX } }, 2856 { "(bad)", { XX } }, 2857 { "(bad)", { XX } }, 2858 { "(bad)", { XX } }, 2859 /* 88 */ 2860 { "(bad)", { XX } }, 2861 { "(bad)", { XX } }, 2862 { "(bad)", { XX } }, 2863 { "(bad)", { XX } }, 2864 { "(bad)", { XX } }, 2865 { "(bad)", { XX } }, 2866 { "(bad)", { XX } }, 2867 { "(bad)", { XX } }, 2868 /* 90 */ 2869 { "(bad)", { XX } }, 2870 { "(bad)", { XX } }, 2871 { "(bad)", { XX } }, 2872 { "(bad)", { XX } }, 2873 { "(bad)", { XX } }, 2874 { "(bad)", { XX } }, 2875 { "(bad)", { XX } }, 2876 { "(bad)", { XX } }, 2877 /* 98 */ 2878 { "(bad)", { XX } }, 2879 { "(bad)", { XX } }, 2880 { "(bad)", { XX } }, 2881 { "(bad)", { XX } }, 2882 { "(bad)", { XX } }, 2883 { "(bad)", { XX } }, 2884 { "(bad)", { XX } }, 2885 { "(bad)", { XX } }, 2886 /* a0 */ 2887 { "(bad)", { XX } }, 2888 { "(bad)", { XX } }, 2889 { "(bad)", { XX } }, 2890 { "(bad)", { XX } }, 2891 { "(bad)", { XX } }, 2892 { "(bad)", { XX } }, 2893 { "(bad)", { XX } }, 2894 { "(bad)", { XX } }, 2895 /* a8 */ 2896 { "(bad)", { XX } }, 2897 { "(bad)", { XX } }, 2898 { "(bad)", { XX } }, 2899 { "(bad)", { XX } }, 2900 { "(bad)", { XX } }, 2901 { "(bad)", { XX } }, 2902 { "(bad)", { XX } }, 2903 { "(bad)", { XX } }, 2904 /* b0 */ 2905 { "(bad)", { XX } }, 2906 { "(bad)", { XX } }, 2907 { "(bad)", { XX } }, 2908 { "(bad)", { XX } }, 2909 { "(bad)", { XX } }, 2910 { "(bad)", { XX } }, 2911 { "(bad)", { XX } }, 2912 { "(bad)", { XX } }, 2913 /* b8 */ 2914 { "(bad)", { XX } }, 2915 { "(bad)", { XX } }, 2916 { "(bad)", { XX } }, 2917 { "(bad)", { XX } }, 2918 { "(bad)", { XX } }, 2919 { "(bad)", { XX } }, 2920 { "(bad)", { XX } }, 2921 { "(bad)", { XX } }, 2922 /* c0 */ 2923 { "(bad)", { XX } }, 2924 { "(bad)", { XX } }, 2925 { "(bad)", { XX } }, 2926 { "(bad)", { XX } }, 2927 { "(bad)", { XX } }, 2928 { "(bad)", { XX } }, 2929 { "(bad)", { XX } }, 2930 { "(bad)", { XX } }, 2931 /* c8 */ 2932 { "(bad)", { XX } }, 2933 { "(bad)", { XX } }, 2934 { "(bad)", { XX } }, 2935 { "(bad)", { XX } }, 2936 { "(bad)", { XX } }, 2937 { "(bad)", { XX } }, 2938 { "(bad)", { XX } }, 2939 { "(bad)", { XX } }, 2940 /* d0 */ 2941 { "(bad)", { XX } }, 2942 { "(bad)", { XX } }, 2943 { "(bad)", { XX } }, 2944 { "(bad)", { XX } }, 2945 { "(bad)", { XX } }, 2946 { "(bad)", { XX } }, 2947 { "(bad)", { XX } }, 2948 { "(bad)", { XX } }, 2949 /* d8 */ 2950 { "(bad)", { XX } }, 2951 { "(bad)", { XX } }, 2952 { "(bad)", { XX } }, 2953 { PREGRP100 }, 2954 { PREGRP101 }, 2955 { PREGRP102 }, 2956 { PREGRP103 }, 2957 { PREGRP104 }, 2958 /* e0 */ 2959 { "(bad)", { XX } }, 2960 { "(bad)", { XX } }, 2961 { "(bad)", { XX } }, 2962 { "(bad)", { XX } }, 2963 { "(bad)", { XX } }, 2964 { "(bad)", { XX } }, 2965 { "(bad)", { XX } }, 2966 { "(bad)", { XX } }, 2967 /* e8 */ 2968 { "(bad)", { XX } }, 2969 { "(bad)", { XX } }, 2970 { "(bad)", { XX } }, 2971 { "(bad)", { XX } }, 2972 { "(bad)", { XX } }, 2973 { "(bad)", { XX } }, 2974 { "(bad)", { XX } }, 2975 { "(bad)", { XX } }, 2976 /* f0 */ 2977 { PREGRP87 }, 2978 { PREGRP88 }, 2979 { "(bad)", { XX } }, 2980 { "(bad)", { XX } }, 2981 { "(bad)", { XX } }, 2982 { "(bad)", { XX } }, 2983 { "(bad)", { XX } }, 2984 { "(bad)", { XX } }, 2985 /* f8 */ 2986 { "(bad)", { XX } }, 2987 { "(bad)", { XX } }, 2988 { "(bad)", { XX } }, 2989 { "(bad)", { XX } }, 2990 { "(bad)", { XX } }, 2991 { "(bad)", { XX } }, 2992 { "(bad)", { XX } }, 2993 { "(bad)", { XX } }, 2994 }, 2995 /* THREE_BYTE_1 */ 2996 { 2997 /* 00 */ 2998 { "(bad)", { XX } }, 2999 { "(bad)", { XX } }, 3000 { "(bad)", { XX } }, 3001 { "(bad)", { XX } }, 3002 { "(bad)", { XX } }, 3003 { "(bad)", { XX } }, 3004 { "(bad)", { XX } }, 3005 { "(bad)", { XX } }, 3006 /* 08 */ 3007 { PREGRP69 }, 3008 { PREGRP70 }, 3009 { PREGRP71 }, 3010 { PREGRP72 }, 3011 { PREGRP73 }, 3012 { PREGRP74 }, 3013 { PREGRP75 }, 3014 { "palignr", { MX, EM, Ib } }, 3015 /* 10 */ 3016 { "(bad)", { XX } }, 3017 { "(bad)", { XX } }, 3018 { "(bad)", { XX } }, 3019 { "(bad)", { XX } }, 3020 { PREGRP76 }, 3021 { PREGRP77 }, 3022 { PREGRP78 }, 3023 { PREGRP79 }, 3024 /* 18 */ 3025 { "(bad)", { XX } }, 3026 { "(bad)", { XX } }, 3027 { "(bad)", { XX } }, 3028 { "(bad)", { XX } }, 3029 { "(bad)", { XX } }, 3030 { "(bad)", { XX } }, 3031 { "(bad)", { XX } }, 3032 { "(bad)", { XX } }, 3033 /* 20 */ 3034 { PREGRP80 }, 3035 { PREGRP81 }, 3036 { PREGRP82 }, 3037 { "(bad)", { XX } }, 3038 { "(bad)", { XX } }, 3039 { "(bad)", { XX } }, 3040 { "(bad)", { XX } }, 3041 { "(bad)", { XX } }, 3042 /* 28 */ 3043 { "(bad)", { XX } }, 3044 { "(bad)", { XX } }, 3045 { "(bad)", { XX } }, 3046 { "(bad)", { XX } }, 3047 { "(bad)", { XX } }, 3048 { "(bad)", { XX } }, 3049 { "(bad)", { XX } }, 3050 { "(bad)", { XX } }, 3051 /* 30 */ 3052 { "(bad)", { XX } }, 3053 { "(bad)", { XX } }, 3054 { "(bad)", { XX } }, 3055 { "(bad)", { XX } }, 3056 { "(bad)", { XX } }, 3057 { "(bad)", { XX } }, 3058 { "(bad)", { XX } }, 3059 { "(bad)", { XX } }, 3060 /* 38 */ 3061 { "(bad)", { XX } }, 3062 { "(bad)", { XX } }, 3063 { "(bad)", { XX } }, 3064 { "(bad)", { XX } }, 3065 { "(bad)", { XX } }, 3066 { "(bad)", { XX } }, 3067 { "(bad)", { XX } }, 3068 { "(bad)", { XX } }, 3069 /* 40 */ 3070 { PREGRP83 }, 3071 { PREGRP84 }, 3072 { PREGRP85 }, 3073 { "(bad)", { XX } }, 3074 { PREGRP106 }, 3075 { "(bad)", { XX } }, 3076 { "(bad)", { XX } }, 3077 { "(bad)", { XX } }, 3078 /* 48 */ 3079 { "(bad)", { XX } }, 3080 { "(bad)", { XX } }, 3081 { "(bad)", { XX } }, 3082 { "(bad)", { XX } }, 3083 { "(bad)", { XX } }, 3084 { "(bad)", { XX } }, 3085 { "(bad)", { XX } }, 3086 { "(bad)", { XX } }, 3087 /* 50 */ 3088 { "(bad)", { XX } }, 3089 { "(bad)", { XX } }, 3090 { "(bad)", { XX } }, 3091 { "(bad)", { XX } }, 3092 { "(bad)", { XX } }, 3093 { "(bad)", { XX } }, 3094 { "(bad)", { XX } }, 3095 { "(bad)", { XX } }, 3096 /* 58 */ 3097 { "(bad)", { XX } }, 3098 { "(bad)", { XX } }, 3099 { "(bad)", { XX } }, 3100 { "(bad)", { XX } }, 3101 { "(bad)", { XX } }, 3102 { "(bad)", { XX } }, 3103 { "(bad)", { XX } }, 3104 { "(bad)", { XX } }, 3105 /* 60 */ 3106 { PREGRP89 }, 3107 { PREGRP90 }, 3108 { PREGRP91 }, 3109 { PREGRP92 }, 3110 { "(bad)", { XX } }, 3111 { "(bad)", { XX } }, 3112 { "(bad)", { XX } }, 3113 { "(bad)", { XX } }, 3114 /* 68 */ 3115 { "(bad)", { XX } }, 3116 { "(bad)", { XX } }, 3117 { "(bad)", { XX } }, 3118 { "(bad)", { XX } }, 3119 { "(bad)", { XX } }, 3120 { "(bad)", { XX } }, 3121 { "(bad)", { XX } }, 3122 { "(bad)", { XX } }, 3123 /* 70 */ 3124 { "(bad)", { XX } }, 3125 { "(bad)", { XX } }, 3126 { "(bad)", { XX } }, 3127 { "(bad)", { XX } }, 3128 { "(bad)", { XX } }, 3129 { "(bad)", { XX } }, 3130 { "(bad)", { XX } }, 3131 { "(bad)", { XX } }, 3132 /* 78 */ 3133 { "(bad)", { XX } }, 3134 { "(bad)", { XX } }, 3135 { "(bad)", { XX } }, 3136 { "(bad)", { XX } }, 3137 { "(bad)", { XX } }, 3138 { "(bad)", { XX } }, 3139 { "(bad)", { XX } }, 3140 { "(bad)", { XX } }, 3141 /* 80 */ 3142 { "(bad)", { XX } }, 3143 { "(bad)", { XX } }, 3144 { "(bad)", { XX } }, 3145 { "(bad)", { XX } }, 3146 { "(bad)", { XX } }, 3147 { "(bad)", { XX } }, 3148 { "(bad)", { XX } }, 3149 { "(bad)", { XX } }, 3150 /* 88 */ 3151 { "(bad)", { XX } }, 3152 { "(bad)", { XX } }, 3153 { "(bad)", { XX } }, 3154 { "(bad)", { XX } }, 3155 { "(bad)", { XX } }, 3156 { "(bad)", { XX } }, 3157 { "(bad)", { XX } }, 3158 { "(bad)", { XX } }, 3159 /* 90 */ 3160 { "(bad)", { XX } }, 3161 { "(bad)", { XX } }, 3162 { "(bad)", { XX } }, 3163 { "(bad)", { XX } }, 3164 { "(bad)", { XX } }, 3165 { "(bad)", { XX } }, 3166 { "(bad)", { XX } }, 3167 { "(bad)", { XX } }, 3168 /* 98 */ 3169 { "(bad)", { XX } }, 3170 { "(bad)", { XX } }, 3171 { "(bad)", { XX } }, 3172 { "(bad)", { XX } }, 3173 { "(bad)", { XX } }, 3174 { "(bad)", { XX } }, 3175 { "(bad)", { XX } }, 3176 { "(bad)", { XX } }, 3177 /* a0 */ 3178 { "(bad)", { XX } }, 3179 { "(bad)", { XX } }, 3180 { "(bad)", { XX } }, 3181 { "(bad)", { XX } }, 3182 { "(bad)", { XX } }, 3183 { "(bad)", { XX } }, 3184 { "(bad)", { XX } }, 3185 { "(bad)", { XX } }, 3186 /* a8 */ 3187 { "(bad)", { XX } }, 3188 { "(bad)", { XX } }, 3189 { "(bad)", { XX } }, 3190 { "(bad)", { XX } }, 3191 { "(bad)", { XX } }, 3192 { "(bad)", { XX } }, 3193 { "(bad)", { XX } }, 3194 { "(bad)", { XX } }, 3195 /* b0 */ 3196 { "(bad)", { XX } }, 3197 { "(bad)", { XX } }, 3198 { "(bad)", { XX } }, 3199 { "(bad)", { XX } }, 3200 { "(bad)", { XX } }, 3201 { "(bad)", { XX } }, 3202 { "(bad)", { XX } }, 3203 { "(bad)", { XX } }, 3204 /* b8 */ 3205 { "(bad)", { XX } }, 3206 { "(bad)", { XX } }, 3207 { "(bad)", { XX } }, 3208 { "(bad)", { XX } }, 3209 { "(bad)", { XX } }, 3210 { "(bad)", { XX } }, 3211 { "(bad)", { XX } }, 3212 { "(bad)", { XX } }, 3213 /* c0 */ 3214 { "(bad)", { XX } }, 3215 { "(bad)", { XX } }, 3216 { "(bad)", { XX } }, 3217 { "(bad)", { XX } }, 3218 { "(bad)", { XX } }, 3219 { "(bad)", { XX } }, 3220 { "(bad)", { XX } }, 3221 { "(bad)", { XX } }, 3222 /* c8 */ 3223 { "(bad)", { XX } }, 3224 { "(bad)", { XX } }, 3225 { "(bad)", { XX } }, 3226 { "(bad)", { XX } }, 3227 { "(bad)", { XX } }, 3228 { "(bad)", { XX } }, 3229 { "(bad)", { XX } }, 3230 { "(bad)", { XX } }, 3231 /* d0 */ 3232 { "(bad)", { XX } }, 3233 { "(bad)", { XX } }, 3234 { "(bad)", { XX } }, 3235 { "(bad)", { XX } }, 3236 { "(bad)", { XX } }, 3237 { "(bad)", { XX } }, 3238 { "(bad)", { XX } }, 3239 { "(bad)", { XX } }, 3240 /* d8 */ 3241 { "(bad)", { XX } }, 3242 { "(bad)", { XX } }, 3243 { "(bad)", { XX } }, 3244 { "(bad)", { XX } }, 3245 { "(bad)", { XX } }, 3246 { "(bad)", { XX } }, 3247 { "(bad)", { XX } }, 3248 { PREGRP105 }, 3249 /* e0 */ 3250 { "(bad)", { XX } }, 3251 { "(bad)", { XX } }, 3252 { "(bad)", { XX } }, 3253 { "(bad)", { XX } }, 3254 { "(bad)", { XX } }, 3255 { "(bad)", { XX } }, 3256 { "(bad)", { XX } }, 3257 { "(bad)", { XX } }, 3258 /* e8 */ 3259 { "(bad)", { XX } }, 3260 { "(bad)", { XX } }, 3261 { "(bad)", { XX } }, 3262 { "(bad)", { XX } }, 3263 { "(bad)", { XX } }, 3264 { "(bad)", { XX } }, 3265 { "(bad)", { XX } }, 3266 { "(bad)", { XX } }, 3267 /* f0 */ 3268 { "(bad)", { XX } }, 3269 { "(bad)", { XX } }, 3270 { "(bad)", { XX } }, 3271 { "(bad)", { XX } }, 3272 { "(bad)", { XX } }, 3273 { "(bad)", { XX } }, 3274 { "(bad)", { XX } }, 3275 { "(bad)", { XX } }, 3276 /* f8 */ 3277 { "(bad)", { XX } }, 3278 { "(bad)", { XX } }, 3279 { "(bad)", { XX } }, 3280 { "(bad)", { XX } }, 3281 { "(bad)", { XX } }, 3282 { "(bad)", { XX } }, 3283 { "(bad)", { XX } }, 3284 { "(bad)", { XX } }, 3285 } 3286}; 3287 3288#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 3289 3290static void 3291ckprefix (void) 3292{ 3293 int newrex; 3294 rex = 0; 3295 prefixes = 0; 3296 used_prefixes = 0; 3297 rex_used = 0; 3298 while (1) 3299 { 3300 (void) FETCH_DATA (the_info, codep + 1); 3301 newrex = 0; 3302 switch (*codep) 3303 { 3304 /* REX prefixes family. */ 3305 case 0x40: 3306 case 0x41: 3307 case 0x42: 3308 case 0x43: 3309 case 0x44: 3310 case 0x45: 3311 case 0x46: 3312 case 0x47: 3313 case 0x48: 3314 case 0x49: 3315 case 0x4a: 3316 case 0x4b: 3317 case 0x4c: 3318 case 0x4d: 3319 case 0x4e: 3320 case 0x4f: 3321 if (address_mode == mode_64bit) 3322 newrex = *codep; 3323 else 3324 return; 3325 break; 3326 case 0xf3: 3327 prefixes |= PREFIX_REPZ; 3328 break; 3329 case 0xf2: 3330 prefixes |= PREFIX_REPNZ; 3331 break; 3332 case 0xf0: 3333 prefixes |= PREFIX_LOCK; 3334 break; 3335 case 0x2e: 3336 prefixes |= PREFIX_CS; 3337 break; 3338 case 0x36: 3339 prefixes |= PREFIX_SS; 3340 break; 3341 case 0x3e: 3342 prefixes |= PREFIX_DS; 3343 break; 3344 case 0x26: 3345 prefixes |= PREFIX_ES; 3346 break; 3347 case 0x64: 3348 prefixes |= PREFIX_FS; 3349 break; 3350 case 0x65: 3351 prefixes |= PREFIX_GS; 3352 break; 3353 case 0x66: 3354 prefixes |= PREFIX_DATA; 3355 break; 3356 case 0x67: 3357 prefixes |= PREFIX_ADDR; 3358 break; 3359 case FWAIT_OPCODE: 3360 /* fwait is really an instruction. If there are prefixes 3361 before the fwait, they belong to the fwait, *not* to the 3362 following instruction. */ 3363 if (prefixes || rex) 3364 { 3365 prefixes |= PREFIX_FWAIT; 3366 codep++; 3367 return; 3368 } 3369 prefixes = PREFIX_FWAIT; 3370 break; 3371 default: 3372 return; 3373 } 3374 /* Rex is ignored when followed by another prefix. */ 3375 if (rex) 3376 { 3377 rex_used = rex; 3378 return; 3379 } 3380 rex = newrex; 3381 codep++; 3382 } 3383} 3384 3385/* Return the name of the prefix byte PREF, or NULL if PREF is not a 3386 prefix byte. */ 3387 3388static const char * 3389prefix_name (int pref, int sizeflag) 3390{ 3391 static const char *rexes [16] = 3392 { 3393 "rex", /* 0x40 */ 3394 "rex.B", /* 0x41 */ 3395 "rex.X", /* 0x42 */ 3396 "rex.XB", /* 0x43 */ 3397 "rex.R", /* 0x44 */ 3398 "rex.RB", /* 0x45 */ 3399 "rex.RX", /* 0x46 */ 3400 "rex.RXB", /* 0x47 */ 3401 "rex.W", /* 0x48 */ 3402 "rex.WB", /* 0x49 */ 3403 "rex.WX", /* 0x4a */ 3404 "rex.WXB", /* 0x4b */ 3405 "rex.WR", /* 0x4c */ 3406 "rex.WRB", /* 0x4d */ 3407 "rex.WRX", /* 0x4e */ 3408 "rex.WRXB", /* 0x4f */ 3409 }; 3410 3411 switch (pref) 3412 { 3413 /* REX prefixes family. */ 3414 case 0x40: 3415 case 0x41: 3416 case 0x42: 3417 case 0x43: 3418 case 0x44: 3419 case 0x45: 3420 case 0x46: 3421 case 0x47: 3422 case 0x48: 3423 case 0x49: 3424 case 0x4a: 3425 case 0x4b: 3426 case 0x4c: 3427 case 0x4d: 3428 case 0x4e: 3429 case 0x4f: 3430 return rexes [pref - 0x40]; 3431 case 0xf3: 3432 return "repz"; 3433 case 0xf2: 3434 return "repnz"; 3435 case 0xf0: 3436 return "lock"; 3437 case 0x2e: 3438 return "cs"; 3439 case 0x36: 3440 return "ss"; 3441 case 0x3e: 3442 return "ds"; 3443 case 0x26: 3444 return "es"; 3445 case 0x64: 3446 return "fs"; 3447 case 0x65: 3448 return "gs"; 3449 case 0x66: 3450 return (sizeflag & DFLAG) ? "data16" : "data32"; 3451 case 0x67: 3452 if (address_mode == mode_64bit) 3453 return (sizeflag & AFLAG) ? "addr32" : "addr64"; 3454 else 3455 return (sizeflag & AFLAG) ? "addr16" : "addr32"; 3456 case FWAIT_OPCODE: 3457 return "fwait"; 3458 default: 3459 return NULL; 3460 } 3461} 3462 3463static char op_out[MAX_OPERANDS][100]; 3464static int op_ad, op_index[MAX_OPERANDS]; 3465static int two_source_ops; 3466static bfd_vma op_address[MAX_OPERANDS]; 3467static bfd_vma op_riprel[MAX_OPERANDS]; 3468static bfd_vma start_pc; 3469 3470/* 3471 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 3472 * (see topic "Redundant prefixes" in the "Differences from 8086" 3473 * section of the "Virtual 8086 Mode" chapter.) 3474 * 'pc' should be the address of this instruction, it will 3475 * be used to print the target address if this is a relative jump or call 3476 * The function returns the length of this instruction in bytes. 3477 */ 3478 3479static int intel_syntax; 3480static char open_char; 3481static char close_char; 3482static char separator_char; 3483static char scale_char; 3484 3485/* Here for backwards compatibility. When gdb stops using 3486 print_insn_i386_att and print_insn_i386_intel these functions can 3487 disappear, and print_insn_i386 be merged into print_insn. */ 3488int 3489print_insn_i386_att (bfd_vma pc, disassemble_info *info) 3490{ 3491 intel_syntax = 0; 3492 3493 return print_insn (pc, info); 3494} 3495 3496int 3497print_insn_i386_intel (bfd_vma pc, disassemble_info *info) 3498{ 3499 intel_syntax = 1; 3500 3501 return print_insn (pc, info); 3502} 3503 3504int 3505print_insn_i386 (bfd_vma pc, disassemble_info *info) 3506{ 3507 intel_syntax = -1; 3508 3509 return print_insn (pc, info); 3510} 3511 3512void 3513print_i386_disassembler_options (FILE *stream) 3514{ 3515 fprintf (stream, _("\n\ 3516The following i386/x86-64 specific disassembler options are supported for use\n\ 3517with the -M switch (multiple options should be separated by commas):\n")); 3518 3519 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n")); 3520 fprintf (stream, _(" i386 Disassemble in 32bit mode\n")); 3521 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n")); 3522 fprintf (stream, _(" att Display instruction in AT&T syntax\n")); 3523 fprintf (stream, _(" intel Display instruction in Intel syntax\n")); 3524 fprintf (stream, _(" addr64 Assume 64bit address size\n")); 3525 fprintf (stream, _(" addr32 Assume 32bit address size\n")); 3526 fprintf (stream, _(" addr16 Assume 16bit address size\n")); 3527 fprintf (stream, _(" data32 Assume 32bit data size\n")); 3528 fprintf (stream, _(" data16 Assume 16bit data size\n")); 3529 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n")); 3530} 3531 3532static int 3533print_insn (bfd_vma pc, disassemble_info *info) 3534{ 3535 const struct dis386 *dp; 3536 int i; 3537 char *op_txt[MAX_OPERANDS]; 3538 int needcomma; 3539 unsigned char uses_DATA_prefix, uses_LOCK_prefix; 3540 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix; 3541 int sizeflag; 3542 const char *p; 3543 struct dis_private priv; 3544 unsigned char op; 3545 3546 if (info->mach == bfd_mach_x86_64_intel_syntax 3547 || info->mach == bfd_mach_x86_64) 3548 address_mode = mode_64bit; 3549 else 3550 address_mode = mode_32bit; 3551 3552 if (intel_syntax == -1) 3553 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax 3554 || info->mach == bfd_mach_x86_64_intel_syntax); 3555 3556 if (info->mach == bfd_mach_i386_i386 3557 || info->mach == bfd_mach_x86_64 3558 || info->mach == bfd_mach_i386_i386_intel_syntax 3559 || info->mach == bfd_mach_x86_64_intel_syntax) 3560 priv.orig_sizeflag = AFLAG | DFLAG; 3561 else if (info->mach == bfd_mach_i386_i8086) 3562 priv.orig_sizeflag = 0; 3563 else 3564 abort (); 3565 3566 for (p = info->disassembler_options; p != NULL; ) 3567 { 3568 if (CONST_STRNEQ (p, "x86-64")) 3569 { 3570 address_mode = mode_64bit; 3571 priv.orig_sizeflag = AFLAG | DFLAG; 3572 } 3573 else if (CONST_STRNEQ (p, "i386")) 3574 { 3575 address_mode = mode_32bit; 3576 priv.orig_sizeflag = AFLAG | DFLAG; 3577 } 3578 else if (CONST_STRNEQ (p, "i8086")) 3579 { 3580 address_mode = mode_16bit; 3581 priv.orig_sizeflag = 0; 3582 } 3583 else if (CONST_STRNEQ (p, "intel")) 3584 { 3585 intel_syntax = 1; 3586 } 3587 else if (CONST_STRNEQ (p, "att")) 3588 { 3589 intel_syntax = 0; 3590 } 3591 else if (CONST_STRNEQ (p, "addr")) 3592 { 3593 if (address_mode == mode_64bit) 3594 { 3595 if (p[4] == '3' && p[5] == '2') 3596 priv.orig_sizeflag &= ~AFLAG; 3597 else if (p[4] == '6' && p[5] == '4') 3598 priv.orig_sizeflag |= AFLAG; 3599 } 3600 else 3601 { 3602 if (p[4] == '1' && p[5] == '6') 3603 priv.orig_sizeflag &= ~AFLAG; 3604 else if (p[4] == '3' && p[5] == '2') 3605 priv.orig_sizeflag |= AFLAG; 3606 } 3607 } 3608 else if (CONST_STRNEQ (p, "data")) 3609 { 3610 if (p[4] == '1' && p[5] == '6') 3611 priv.orig_sizeflag &= ~DFLAG; 3612 else if (p[4] == '3' && p[5] == '2') 3613 priv.orig_sizeflag |= DFLAG; 3614 } 3615 else if (CONST_STRNEQ (p, "suffix")) 3616 priv.orig_sizeflag |= SUFFIX_ALWAYS; 3617 3618 p = strchr (p, ','); 3619 if (p != NULL) 3620 p++; 3621 } 3622 3623 if (intel_syntax) 3624 { 3625 names64 = intel_names64; 3626 names32 = intel_names32; 3627 names16 = intel_names16; 3628 names8 = intel_names8; 3629 names8rex = intel_names8rex; 3630 names_seg = intel_names_seg; 3631 index16 = intel_index16; 3632 open_char = '['; 3633 close_char = ']'; 3634 separator_char = '+'; 3635 scale_char = '*'; 3636 } 3637 else 3638 { 3639 names64 = att_names64; 3640 names32 = att_names32; 3641 names16 = att_names16; 3642 names8 = att_names8; 3643 names8rex = att_names8rex; 3644 names_seg = att_names_seg; 3645 index16 = att_index16; 3646 open_char = '('; 3647 close_char = ')'; 3648 separator_char = ','; 3649 scale_char = ','; 3650 } 3651 3652 /* The output looks better if we put 7 bytes on a line, since that 3653 puts most long word instructions on a single line. */ 3654 info->bytes_per_line = 7; 3655 3656 info->private_data = &priv; 3657 priv.max_fetched = priv.the_buffer; 3658 priv.insn_start = pc; 3659 3660 obuf[0] = 0; 3661 for (i = 0; i < MAX_OPERANDS; ++i) 3662 { 3663 op_out[i][0] = 0; 3664 op_index[i] = -1; 3665 } 3666 3667 the_info = info; 3668 start_pc = pc; 3669 start_codep = priv.the_buffer; 3670 codep = priv.the_buffer; 3671 3672 if (setjmp (priv.bailout) != 0) 3673 { 3674 const char *name; 3675 3676 /* Getting here means we tried for data but didn't get it. That 3677 means we have an incomplete instruction of some sort. Just 3678 print the first byte as a prefix or a .byte pseudo-op. */ 3679 if (codep > priv.the_buffer) 3680 { 3681 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3682 if (name != NULL) 3683 (*info->fprintf_func) (info->stream, "%s", name); 3684 else 3685 { 3686 /* Just print the first byte as a .byte instruction. */ 3687 (*info->fprintf_func) (info->stream, ".byte 0x%x", 3688 (unsigned int) priv.the_buffer[0]); 3689 } 3690 3691 return 1; 3692 } 3693 3694 return -1; 3695 } 3696 3697 obufp = obuf; 3698 ckprefix (); 3699 3700 insn_codep = codep; 3701 sizeflag = priv.orig_sizeflag; 3702 3703 (void) FETCH_DATA (info, codep + 1); 3704 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 3705 3706 if (((prefixes & PREFIX_FWAIT) 3707 && ((*codep < 0xd8) || (*codep > 0xdf))) 3708 || (rex && rex_used)) 3709 { 3710 const char *name; 3711 3712 /* fwait not followed by floating point instruction, or rex followed 3713 by other prefixes. Print the first prefix. */ 3714 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3715 if (name == NULL) 3716 name = INTERNAL_DISASSEMBLER_ERROR; 3717 (*info->fprintf_func) (info->stream, "%s", name); 3718 return 1; 3719 } 3720 3721 op = 0; 3722 if (*codep == 0x0f) 3723 { 3724 unsigned char threebyte; 3725 (void) FETCH_DATA (info, codep + 2); 3726 threebyte = *++codep; 3727 dp = &dis386_twobyte[threebyte]; 3728 need_modrm = twobyte_has_modrm[*codep]; 3729 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep]; 3730 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep]; 3731 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep]; 3732 uses_LOCK_prefix = (*codep & ~0x02) == 0x20; 3733 codep++; 3734 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3735 { 3736 (void) FETCH_DATA (info, codep + 2); 3737 op = *codep++; 3738 switch (threebyte) 3739 { 3740 case 0x38: 3741 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op]; 3742 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op]; 3743 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op]; 3744 break; 3745 case 0x3a: 3746 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op]; 3747 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op]; 3748 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op]; 3749 break; 3750 default: 3751 break; 3752 } 3753 } 3754 } 3755 else 3756 { 3757 dp = &dis386[*codep]; 3758 need_modrm = onebyte_has_modrm[*codep]; 3759 uses_DATA_prefix = 0; 3760 uses_REPNZ_prefix = 0; 3761 /* pause is 0xf3 0x90. */ 3762 uses_REPZ_prefix = *codep == 0x90; 3763 uses_LOCK_prefix = 0; 3764 codep++; 3765 } 3766 3767 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ)) 3768 { 3769 oappend ("repz "); 3770 used_prefixes |= PREFIX_REPZ; 3771 } 3772 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ)) 3773 { 3774 oappend ("repnz "); 3775 used_prefixes |= PREFIX_REPNZ; 3776 } 3777 3778 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK)) 3779 { 3780 oappend ("lock "); 3781 used_prefixes |= PREFIX_LOCK; 3782 } 3783 3784 if (prefixes & PREFIX_ADDR) 3785 { 3786 sizeflag ^= AFLAG; 3787 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax) 3788 { 3789 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 3790 oappend ("addr32 "); 3791 else 3792 oappend ("addr16 "); 3793 used_prefixes |= PREFIX_ADDR; 3794 } 3795 } 3796 3797 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA)) 3798 { 3799 sizeflag ^= DFLAG; 3800 if (dp->op[2].bytemode == cond_jump_mode 3801 && dp->op[0].bytemode == v_mode 3802 && !intel_syntax) 3803 { 3804 if (sizeflag & DFLAG) 3805 oappend ("data32 "); 3806 else 3807 oappend ("data16 "); 3808 used_prefixes |= PREFIX_DATA; 3809 } 3810 } 3811 3812 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3813 { 3814 dp = &three_byte_table[dp->op[1].bytemode][op]; 3815 modrm.mod = (*codep >> 6) & 3; 3816 modrm.reg = (*codep >> 3) & 7; 3817 modrm.rm = *codep & 7; 3818 } 3819 else if (need_modrm) 3820 { 3821 (void) FETCH_DATA (info, codep + 1); 3822 modrm.mod = (*codep >> 6) & 3; 3823 modrm.reg = (*codep >> 3) & 7; 3824 modrm.rm = *codep & 7; 3825 } 3826 3827 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE) 3828 { 3829 dofloat (sizeflag); 3830 } 3831 else 3832 { 3833 int index; 3834 if (dp->name == NULL) 3835 { 3836 switch (dp->op[0].bytemode) 3837 { 3838 case USE_GROUPS: 3839 dp = &grps[dp->op[1].bytemode][modrm.reg]; 3840 break; 3841 3842 case USE_PREFIX_USER_TABLE: 3843 index = 0; 3844 used_prefixes |= (prefixes & PREFIX_REPZ); 3845 if (prefixes & PREFIX_REPZ) 3846 index = 1; 3847 else 3848 { 3849 /* We should check PREFIX_REPNZ and PREFIX_REPZ 3850 before PREFIX_DATA. */ 3851 used_prefixes |= (prefixes & PREFIX_REPNZ); 3852 if (prefixes & PREFIX_REPNZ) 3853 index = 3; 3854 else 3855 { 3856 used_prefixes |= (prefixes & PREFIX_DATA); 3857 if (prefixes & PREFIX_DATA) 3858 index = 2; 3859 } 3860 } 3861 dp = &prefix_user_table[dp->op[1].bytemode][index]; 3862 break; 3863 3864 case X86_64_SPECIAL: 3865 index = address_mode == mode_64bit ? 1 : 0; 3866 dp = &x86_64_table[dp->op[1].bytemode][index]; 3867 break; 3868 3869 default: 3870 oappend (INTERNAL_DISASSEMBLER_ERROR); 3871 break; 3872 } 3873 } 3874 3875 if (putop (dp->name, sizeflag) == 0) 3876 { 3877 for (i = 0; i < MAX_OPERANDS; ++i) 3878 { 3879 obufp = op_out[i]; 3880 op_ad = MAX_OPERANDS - 1 - i; 3881 if (dp->op[i].rtn) 3882 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag); 3883 } 3884 } 3885 } 3886 3887 /* See if any prefixes were not used. If so, print the first one 3888 separately. If we don't do this, we'll wind up printing an 3889 instruction stream which does not precisely correspond to the 3890 bytes we are disassembling. */ 3891 if ((prefixes & ~used_prefixes) != 0) 3892 { 3893 const char *name; 3894 3895 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3896 if (name == NULL) 3897 name = INTERNAL_DISASSEMBLER_ERROR; 3898 (*info->fprintf_func) (info->stream, "%s", name); 3899 return 1; 3900 } 3901 if (rex & ~rex_used) 3902 { 3903 const char *name; 3904 name = prefix_name (rex | 0x40, priv.orig_sizeflag); 3905 if (name == NULL) 3906 name = INTERNAL_DISASSEMBLER_ERROR; 3907 (*info->fprintf_func) (info->stream, "%s ", name); 3908 } 3909 3910 obufp = obuf + strlen (obuf); 3911 for (i = strlen (obuf); i < 6; i++) 3912 oappend (" "); 3913 oappend (" "); 3914 (*info->fprintf_func) (info->stream, "%s", obuf); 3915 3916 /* The enter and bound instructions are printed with operands in the same 3917 order as the intel book; everything else is printed in reverse order. */ 3918 if (intel_syntax || two_source_ops) 3919 { 3920 bfd_vma riprel; 3921 3922 for (i = 0; i < MAX_OPERANDS; ++i) 3923 op_txt[i] = op_out[i]; 3924 3925 for (i = 0; i < (MAX_OPERANDS >> 1); ++i) 3926 { 3927 op_ad = op_index[i]; 3928 op_index[i] = op_index[MAX_OPERANDS - 1 - i]; 3929 op_index[MAX_OPERANDS - 1 - i] = op_ad; 3930 riprel = op_riprel[i]; 3931 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i]; 3932 op_riprel[MAX_OPERANDS - 1 - i] = riprel; 3933 } 3934 } 3935 else 3936 { 3937 for (i = 0; i < MAX_OPERANDS; ++i) 3938 op_txt[MAX_OPERANDS - 1 - i] = op_out[i]; 3939 } 3940 3941 needcomma = 0; 3942 for (i = 0; i < MAX_OPERANDS; ++i) 3943 if (*op_txt[i]) 3944 { 3945 if (needcomma) 3946 (*info->fprintf_func) (info->stream, ","); 3947 if (op_index[i] != -1 && !op_riprel[i]) 3948 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info); 3949 else 3950 (*info->fprintf_func) (info->stream, "%s", op_txt[i]); 3951 needcomma = 1; 3952 } 3953 3954 for (i = 0; i < MAX_OPERANDS; i++) 3955 if (op_index[i] != -1 && op_riprel[i]) 3956 { 3957 (*info->fprintf_func) (info->stream, " # "); 3958 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 3959 + op_address[op_index[i]]), info); 3960 break; 3961 } 3962 return codep - priv.the_buffer; 3963} 3964 3965static const char *float_mem[] = { 3966 /* d8 */ 3967 "fadd{s||s|}", 3968 "fmul{s||s|}", 3969 "fcom{s||s|}", 3970 "fcomp{s||s|}", 3971 "fsub{s||s|}", 3972 "fsubr{s||s|}", 3973 "fdiv{s||s|}", 3974 "fdivr{s||s|}", 3975 /* d9 */ 3976 "fld{s||s|}", 3977 "(bad)", 3978 "fst{s||s|}", 3979 "fstp{s||s|}", 3980 "fldenvIC", 3981 "fldcw", 3982 "fNstenvIC", 3983 "fNstcw", 3984 /* da */ 3985 "fiadd{l||l|}", 3986 "fimul{l||l|}", 3987 "ficom{l||l|}", 3988 "ficomp{l||l|}", 3989 "fisub{l||l|}", 3990 "fisubr{l||l|}", 3991 "fidiv{l||l|}", 3992 "fidivr{l||l|}", 3993 /* db */ 3994 "fild{l||l|}", 3995 "fisttp{l||l|}", 3996 "fist{l||l|}", 3997 "fistp{l||l|}", 3998 "(bad)", 3999 "fld{t||t|}", 4000 "(bad)", 4001 "fstp{t||t|}", 4002 /* dc */ 4003 "fadd{l||l|}", 4004 "fmul{l||l|}", 4005 "fcom{l||l|}", 4006 "fcomp{l||l|}", 4007 "fsub{l||l|}", 4008 "fsubr{l||l|}", 4009 "fdiv{l||l|}", 4010 "fdivr{l||l|}", 4011 /* dd */ 4012 "fld{l||l|}", 4013 "fisttp{ll||ll|}", 4014 "fst{l||l|}", 4015 "fstp{l||l|}", 4016 "frstorIC", 4017 "(bad)", 4018 "fNsaveIC", 4019 "fNstsw", 4020 /* de */ 4021 "fiadd", 4022 "fimul", 4023 "ficom", 4024 "ficomp", 4025 "fisub", 4026 "fisubr", 4027 "fidiv", 4028 "fidivr", 4029 /* df */ 4030 "fild", 4031 "fisttp", 4032 "fist", 4033 "fistp", 4034 "fbld", 4035 "fild{ll||ll|}", 4036 "fbstp", 4037 "fistp{ll||ll|}", 4038}; 4039 4040static const unsigned char float_mem_mode[] = { 4041 /* d8 */ 4042 d_mode, 4043 d_mode, 4044 d_mode, 4045 d_mode, 4046 d_mode, 4047 d_mode, 4048 d_mode, 4049 d_mode, 4050 /* d9 */ 4051 d_mode, 4052 0, 4053 d_mode, 4054 d_mode, 4055 0, 4056 w_mode, 4057 0, 4058 w_mode, 4059 /* da */ 4060 d_mode, 4061 d_mode, 4062 d_mode, 4063 d_mode, 4064 d_mode, 4065 d_mode, 4066 d_mode, 4067 d_mode, 4068 /* db */ 4069 d_mode, 4070 d_mode, 4071 d_mode, 4072 d_mode, 4073 0, 4074 t_mode, 4075 0, 4076 t_mode, 4077 /* dc */ 4078 q_mode, 4079 q_mode, 4080 q_mode, 4081 q_mode, 4082 q_mode, 4083 q_mode, 4084 q_mode, 4085 q_mode, 4086 /* dd */ 4087 q_mode, 4088 q_mode, 4089 q_mode, 4090 q_mode, 4091 0, 4092 0, 4093 0, 4094 w_mode, 4095 /* de */ 4096 w_mode, 4097 w_mode, 4098 w_mode, 4099 w_mode, 4100 w_mode, 4101 w_mode, 4102 w_mode, 4103 w_mode, 4104 /* df */ 4105 w_mode, 4106 w_mode, 4107 w_mode, 4108 w_mode, 4109 t_mode, 4110 q_mode, 4111 t_mode, 4112 q_mode 4113}; 4114 4115#define ST { OP_ST, 0 } 4116#define STi { OP_STi, 0 } 4117 4118#define FGRPd9_2 NULL, { { NULL, 0 } } 4119#define FGRPd9_4 NULL, { { NULL, 1 } } 4120#define FGRPd9_5 NULL, { { NULL, 2 } } 4121#define FGRPd9_6 NULL, { { NULL, 3 } } 4122#define FGRPd9_7 NULL, { { NULL, 4 } } 4123#define FGRPda_5 NULL, { { NULL, 5 } } 4124#define FGRPdb_4 NULL, { { NULL, 6 } } 4125#define FGRPde_3 NULL, { { NULL, 7 } } 4126#define FGRPdf_4 NULL, { { NULL, 8 } } 4127 4128static const struct dis386 float_reg[][8] = { 4129 /* d8 */ 4130 { 4131 { "fadd", { ST, STi } }, 4132 { "fmul", { ST, STi } }, 4133 { "fcom", { STi } }, 4134 { "fcomp", { STi } }, 4135 { "fsub", { ST, STi } }, 4136 { "fsubr", { ST, STi } }, 4137 { "fdiv", { ST, STi } }, 4138 { "fdivr", { ST, STi } }, 4139 }, 4140 /* d9 */ 4141 { 4142 { "fld", { STi } }, 4143 { "fxch", { STi } }, 4144 { FGRPd9_2 }, 4145 { "(bad)", { XX } }, 4146 { FGRPd9_4 }, 4147 { FGRPd9_5 }, 4148 { FGRPd9_6 }, 4149 { FGRPd9_7 }, 4150 }, 4151 /* da */ 4152 { 4153 { "fcmovb", { ST, STi } }, 4154 { "fcmove", { ST, STi } }, 4155 { "fcmovbe",{ ST, STi } }, 4156 { "fcmovu", { ST, STi } }, 4157 { "(bad)", { XX } }, 4158 { FGRPda_5 }, 4159 { "(bad)", { XX } }, 4160 { "(bad)", { XX } }, 4161 }, 4162 /* db */ 4163 { 4164 { "fcmovnb",{ ST, STi } }, 4165 { "fcmovne",{ ST, STi } }, 4166 { "fcmovnbe",{ ST, STi } }, 4167 { "fcmovnu",{ ST, STi } }, 4168 { FGRPdb_4 }, 4169 { "fucomi", { ST, STi } }, 4170 { "fcomi", { ST, STi } }, 4171 { "(bad)", { XX } }, 4172 }, 4173 /* dc */ 4174 { 4175 { "fadd", { STi, ST } }, 4176 { "fmul", { STi, ST } }, 4177 { "(bad)", { XX } }, 4178 { "(bad)", { XX } }, 4179#if SYSV386_COMPAT 4180 { "fsub", { STi, ST } }, 4181 { "fsubr", { STi, ST } }, 4182 { "fdiv", { STi, ST } }, 4183 { "fdivr", { STi, ST } }, 4184#else 4185 { "fsubr", { STi, ST } }, 4186 { "fsub", { STi, ST } }, 4187 { "fdivr", { STi, ST } }, 4188 { "fdiv", { STi, ST } }, 4189#endif 4190 }, 4191 /* dd */ 4192 { 4193 { "ffree", { STi } }, 4194 { "(bad)", { XX } }, 4195 { "fst", { STi } }, 4196 { "fstp", { STi } }, 4197 { "fucom", { STi } }, 4198 { "fucomp", { STi } }, 4199 { "(bad)", { XX } }, 4200 { "(bad)", { XX } }, 4201 }, 4202 /* de */ 4203 { 4204 { "faddp", { STi, ST } }, 4205 { "fmulp", { STi, ST } }, 4206 { "(bad)", { XX } }, 4207 { FGRPde_3 }, 4208#if SYSV386_COMPAT 4209 { "fsubp", { STi, ST } }, 4210 { "fsubrp", { STi, ST } }, 4211 { "fdivp", { STi, ST } }, 4212 { "fdivrp", { STi, ST } }, 4213#else 4214 { "fsubrp", { STi, ST } }, 4215 { "fsubp", { STi, ST } }, 4216 { "fdivrp", { STi, ST } }, 4217 { "fdivp", { STi, ST } }, 4218#endif 4219 }, 4220 /* df */ 4221 { 4222 { "ffreep", { STi } }, 4223 { "(bad)", { XX } }, 4224 { "(bad)", { XX } }, 4225 { "(bad)", { XX } }, 4226 { FGRPdf_4 }, 4227 { "fucomip", { ST, STi } }, 4228 { "fcomip", { ST, STi } }, 4229 { "(bad)", { XX } }, 4230 }, 4231}; 4232 4233static char *fgrps[][8] = { 4234 /* d9_2 0 */ 4235 { 4236 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4237 }, 4238 4239 /* d9_4 1 */ 4240 { 4241 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 4242 }, 4243 4244 /* d9_5 2 */ 4245 { 4246 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 4247 }, 4248 4249 /* d9_6 3 */ 4250 { 4251 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 4252 }, 4253 4254 /* d9_7 4 */ 4255 { 4256 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 4257 }, 4258 4259 /* da_5 5 */ 4260 { 4261 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4262 }, 4263 4264 /* db_4 6 */ 4265 { 4266 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 4267 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 4268 }, 4269 4270 /* de_3 7 */ 4271 { 4272 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4273 }, 4274 4275 /* df_4 8 */ 4276 { 4277 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4278 }, 4279}; 4280 4281static void 4282dofloat (int sizeflag) 4283{ 4284 const struct dis386 *dp; 4285 unsigned char floatop; 4286 4287 floatop = codep[-1]; 4288 4289 if (modrm.mod != 3) 4290 { 4291 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg; 4292 4293 putop (float_mem[fp_indx], sizeflag); 4294 obufp = op_out[0]; 4295 op_ad = 2; 4296 OP_E (float_mem_mode[fp_indx], sizeflag); 4297 return; 4298 } 4299 /* Skip mod/rm byte. */ 4300 MODRM_CHECK; 4301 codep++; 4302 4303 dp = &float_reg[floatop - 0xd8][modrm.reg]; 4304 if (dp->name == NULL) 4305 { 4306 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag); 4307 4308 /* Instruction fnstsw is only one with strange arg. */ 4309 if (floatop == 0xdf && codep[-1] == 0xe0) 4310 strcpy (op_out[0], names16[0]); 4311 } 4312 else 4313 { 4314 putop (dp->name, sizeflag); 4315 4316 obufp = op_out[0]; 4317 op_ad = 2; 4318 if (dp->op[0].rtn) 4319 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag); 4320 4321 obufp = op_out[1]; 4322 op_ad = 1; 4323 if (dp->op[1].rtn) 4324 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag); 4325 } 4326} 4327 4328static void 4329OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4330{ 4331 oappend (&"%st"[intel_syntax]); 4332} 4333 4334static void 4335OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4336{ 4337 sprintf (scratchbuf, "%%st(%d)", modrm.rm); 4338 oappend (scratchbuf + intel_syntax); 4339} 4340 4341/* Capital letters in template are macros. */ 4342static int 4343putop (const char *template, int sizeflag) 4344{ 4345 const char *p; 4346 int alt = 0; 4347 4348 for (p = template; *p; p++) 4349 { 4350 switch (*p) 4351 { 4352 default: 4353 *obufp++ = *p; 4354 break; 4355 case '{': 4356 alt = 0; 4357 if (intel_syntax) 4358 alt += 1; 4359 if (address_mode == mode_64bit) 4360 alt += 2; 4361 while (alt != 0) 4362 { 4363 while (*++p != '|') 4364 { 4365 if (*p == '}') 4366 { 4367 /* Alternative not valid. */ 4368 strcpy (obuf, "(bad)"); 4369 obufp = obuf + 5; 4370 return 1; 4371 } 4372 else if (*p == '\0') 4373 abort (); 4374 } 4375 alt--; 4376 } 4377 /* Fall through. */ 4378 case 'I': 4379 alt = 1; 4380 continue; 4381 case '|': 4382 while (*++p != '}') 4383 { 4384 if (*p == '\0') 4385 abort (); 4386 } 4387 break; 4388 case '}': 4389 break; 4390 case 'A': 4391 if (intel_syntax) 4392 break; 4393 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4394 *obufp++ = 'b'; 4395 break; 4396 case 'B': 4397 if (intel_syntax) 4398 break; 4399 if (sizeflag & SUFFIX_ALWAYS) 4400 *obufp++ = 'b'; 4401 break; 4402 case 'C': 4403 if (intel_syntax && !alt) 4404 break; 4405 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS)) 4406 { 4407 if (sizeflag & DFLAG) 4408 *obufp++ = intel_syntax ? 'd' : 'l'; 4409 else 4410 *obufp++ = intel_syntax ? 'w' : 's'; 4411 used_prefixes |= (prefixes & PREFIX_DATA); 4412 } 4413 break; 4414 case 'D': 4415 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS)) 4416 break; 4417 USED_REX (REX_W); 4418 if (modrm.mod == 3) 4419 { 4420 if (rex & REX_W) 4421 *obufp++ = 'q'; 4422 else if (sizeflag & DFLAG) 4423 *obufp++ = intel_syntax ? 'd' : 'l'; 4424 else 4425 *obufp++ = 'w'; 4426 used_prefixes |= (prefixes & PREFIX_DATA); 4427 } 4428 else 4429 *obufp++ = 'w'; 4430 break; 4431 case 'E': /* For jcxz/jecxz */ 4432 if (address_mode == mode_64bit) 4433 { 4434 if (sizeflag & AFLAG) 4435 *obufp++ = 'r'; 4436 else 4437 *obufp++ = 'e'; 4438 } 4439 else 4440 if (sizeflag & AFLAG) 4441 *obufp++ = 'e'; 4442 used_prefixes |= (prefixes & PREFIX_ADDR); 4443 break; 4444 case 'F': 4445 if (intel_syntax) 4446 break; 4447 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS)) 4448 { 4449 if (sizeflag & AFLAG) 4450 *obufp++ = address_mode == mode_64bit ? 'q' : 'l'; 4451 else 4452 *obufp++ = address_mode == mode_64bit ? 'l' : 'w'; 4453 used_prefixes |= (prefixes & PREFIX_ADDR); 4454 } 4455 break; 4456 case 'G': 4457 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS))) 4458 break; 4459 if ((rex & REX_W) || (sizeflag & DFLAG)) 4460 *obufp++ = 'l'; 4461 else 4462 *obufp++ = 'w'; 4463 if (!(rex & REX_W)) 4464 used_prefixes |= (prefixes & PREFIX_DATA); 4465 break; 4466 case 'H': 4467 if (intel_syntax) 4468 break; 4469 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 4470 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 4471 { 4472 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 4473 *obufp++ = ','; 4474 *obufp++ = 'p'; 4475 if (prefixes & PREFIX_DS) 4476 *obufp++ = 't'; 4477 else 4478 *obufp++ = 'n'; 4479 } 4480 break; 4481 case 'J': 4482 if (intel_syntax) 4483 break; 4484 *obufp++ = 'l'; 4485 break; 4486 case 'K': 4487 USED_REX (REX_W); 4488 if (rex & REX_W) 4489 *obufp++ = 'q'; 4490 else 4491 *obufp++ = 'd'; 4492 break; 4493 case 'Z': 4494 if (intel_syntax) 4495 break; 4496 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS)) 4497 { 4498 *obufp++ = 'q'; 4499 break; 4500 } 4501 /* Fall through. */ 4502 case 'L': 4503 if (intel_syntax) 4504 break; 4505 if (sizeflag & SUFFIX_ALWAYS) 4506 *obufp++ = 'l'; 4507 break; 4508 case 'N': 4509 if ((prefixes & PREFIX_FWAIT) == 0) 4510 *obufp++ = 'n'; 4511 else 4512 used_prefixes |= PREFIX_FWAIT; 4513 break; 4514 case 'O': 4515 USED_REX (REX_W); 4516 if (rex & REX_W) 4517 *obufp++ = 'o'; 4518 else if (intel_syntax && (sizeflag & DFLAG)) 4519 *obufp++ = 'q'; 4520 else 4521 *obufp++ = 'd'; 4522 if (!(rex & REX_W)) 4523 used_prefixes |= (prefixes & PREFIX_DATA); 4524 break; 4525 case 'T': 4526 if (intel_syntax) 4527 break; 4528 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4529 { 4530 *obufp++ = 'q'; 4531 break; 4532 } 4533 /* Fall through. */ 4534 case 'P': 4535 if (intel_syntax) 4536 break; 4537 if ((prefixes & PREFIX_DATA) 4538 || (rex & REX_W) 4539 || (sizeflag & SUFFIX_ALWAYS)) 4540 { 4541 USED_REX (REX_W); 4542 if (rex & REX_W) 4543 *obufp++ = 'q'; 4544 else 4545 { 4546 if (sizeflag & DFLAG) 4547 *obufp++ = 'l'; 4548 else 4549 *obufp++ = 'w'; 4550 } 4551 used_prefixes |= (prefixes & PREFIX_DATA); 4552 } 4553 break; 4554 case 'U': 4555 if (intel_syntax) 4556 break; 4557 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4558 { 4559 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4560 *obufp++ = 'q'; 4561 break; 4562 } 4563 /* Fall through. */ 4564 case 'Q': 4565 if (intel_syntax && !alt) 4566 break; 4567 USED_REX (REX_W); 4568 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4569 { 4570 if (rex & REX_W) 4571 *obufp++ = 'q'; 4572 else 4573 { 4574 if (sizeflag & DFLAG) 4575 *obufp++ = intel_syntax ? 'd' : 'l'; 4576 else 4577 *obufp++ = 'w'; 4578 } 4579 used_prefixes |= (prefixes & PREFIX_DATA); 4580 } 4581 break; 4582 case 'R': 4583 USED_REX (REX_W); 4584 if (rex & REX_W) 4585 *obufp++ = 'q'; 4586 else if (sizeflag & DFLAG) 4587 { 4588 if (intel_syntax) 4589 *obufp++ = 'd'; 4590 else 4591 *obufp++ = 'l'; 4592 } 4593 else 4594 *obufp++ = 'w'; 4595 if (intel_syntax && !p[1] 4596 && ((rex & REX_W) || (sizeflag & DFLAG))) 4597 *obufp++ = 'e'; 4598 if (!(rex & REX_W)) 4599 used_prefixes |= (prefixes & PREFIX_DATA); 4600 break; 4601 case 'V': 4602 if (intel_syntax) 4603 break; 4604 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4605 { 4606 if (sizeflag & SUFFIX_ALWAYS) 4607 *obufp++ = 'q'; 4608 break; 4609 } 4610 /* Fall through. */ 4611 case 'S': 4612 if (intel_syntax) 4613 break; 4614 if (sizeflag & SUFFIX_ALWAYS) 4615 { 4616 if (rex & REX_W) 4617 *obufp++ = 'q'; 4618 else 4619 { 4620 if (sizeflag & DFLAG) 4621 *obufp++ = 'l'; 4622 else 4623 *obufp++ = 'w'; 4624 used_prefixes |= (prefixes & PREFIX_DATA); 4625 } 4626 } 4627 break; 4628 case 'X': 4629 if (prefixes & PREFIX_DATA) 4630 *obufp++ = 'd'; 4631 else 4632 *obufp++ = 's'; 4633 used_prefixes |= (prefixes & PREFIX_DATA); 4634 break; 4635 case 'Y': 4636 if (intel_syntax) 4637 break; 4638 if (rex & REX_W) 4639 { 4640 USED_REX (REX_W); 4641 *obufp++ = 'q'; 4642 } 4643 break; 4644 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 4645 case 'W': 4646 /* operand size flag for cwtl, cbtw */ 4647 USED_REX (REX_W); 4648 if (rex & REX_W) 4649 { 4650 if (intel_syntax) 4651 *obufp++ = 'd'; 4652 else 4653 *obufp++ = 'l'; 4654 } 4655 else if (sizeflag & DFLAG) 4656 *obufp++ = 'w'; 4657 else 4658 *obufp++ = 'b'; 4659 if (!(rex & REX_W)) 4660 used_prefixes |= (prefixes & PREFIX_DATA); 4661 break; 4662 } 4663 alt = 0; 4664 } 4665 *obufp = 0; 4666 return 0; 4667} 4668 4669static void 4670oappend (const char *s) 4671{ 4672 strcpy (obufp, s); 4673 obufp += strlen (s); 4674} 4675 4676static void 4677append_seg (void) 4678{ 4679 if (prefixes & PREFIX_CS) 4680 { 4681 used_prefixes |= PREFIX_CS; 4682 oappend (&"%cs:"[intel_syntax]); 4683 } 4684 if (prefixes & PREFIX_DS) 4685 { 4686 used_prefixes |= PREFIX_DS; 4687 oappend (&"%ds:"[intel_syntax]); 4688 } 4689 if (prefixes & PREFIX_SS) 4690 { 4691 used_prefixes |= PREFIX_SS; 4692 oappend (&"%ss:"[intel_syntax]); 4693 } 4694 if (prefixes & PREFIX_ES) 4695 { 4696 used_prefixes |= PREFIX_ES; 4697 oappend (&"%es:"[intel_syntax]); 4698 } 4699 if (prefixes & PREFIX_FS) 4700 { 4701 used_prefixes |= PREFIX_FS; 4702 oappend (&"%fs:"[intel_syntax]); 4703 } 4704 if (prefixes & PREFIX_GS) 4705 { 4706 used_prefixes |= PREFIX_GS; 4707 oappend (&"%gs:"[intel_syntax]); 4708 } 4709} 4710 4711static void 4712OP_indirE (int bytemode, int sizeflag) 4713{ 4714 if (!intel_syntax) 4715 oappend ("*"); 4716 OP_E (bytemode, sizeflag); 4717} 4718 4719static void 4720print_operand_value (char *buf, int hex, bfd_vma disp) 4721{ 4722 if (address_mode == mode_64bit) 4723 { 4724 if (hex) 4725 { 4726 char tmp[30]; 4727 int i; 4728 buf[0] = '0'; 4729 buf[1] = 'x'; 4730 sprintf_vma (tmp, disp); 4731 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); 4732 strcpy (buf + 2, tmp + i); 4733 } 4734 else 4735 { 4736 bfd_signed_vma v = disp; 4737 char tmp[30]; 4738 int i; 4739 if (v < 0) 4740 { 4741 *(buf++) = '-'; 4742 v = -disp; 4743 /* Check for possible overflow on 0x8000000000000000. */ 4744 if (v < 0) 4745 { 4746 strcpy (buf, "9223372036854775808"); 4747 return; 4748 } 4749 } 4750 if (!v) 4751 { 4752 strcpy (buf, "0"); 4753 return; 4754 } 4755 4756 i = 0; 4757 tmp[29] = 0; 4758 while (v) 4759 { 4760 tmp[28 - i] = (v % 10) + '0'; 4761 v /= 10; 4762 i++; 4763 } 4764 strcpy (buf, tmp + 29 - i); 4765 } 4766 } 4767 else 4768 { 4769 if (hex) 4770 sprintf (buf, "0x%x", (unsigned int) disp); 4771 else 4772 sprintf (buf, "%d", (int) disp); 4773 } 4774} 4775 4776/* Put DISP in BUF as signed hex number. */ 4777 4778static void 4779print_displacement (char *buf, bfd_vma disp) 4780{ 4781 bfd_signed_vma val = disp; 4782 char tmp[30]; 4783 int i, j = 0; 4784 4785 if (val < 0) 4786 { 4787 buf[j++] = '-'; 4788 val = -disp; 4789 4790 /* Check for possible overflow. */ 4791 if (val < 0) 4792 { 4793 switch (address_mode) 4794 { 4795 case mode_64bit: 4796 strcpy (buf + j, "0x8000000000000000"); 4797 break; 4798 case mode_32bit: 4799 strcpy (buf + j, "0x80000000"); 4800 break; 4801 case mode_16bit: 4802 strcpy (buf + j, "0x8000"); 4803 break; 4804 } 4805 return; 4806 } 4807 } 4808 4809 buf[j++] = '0'; 4810 buf[j++] = 'x'; 4811 4812 sprintf_vma (tmp, val); 4813 for (i = 0; tmp[i] == '0'; i++) 4814 continue; 4815 if (tmp[i] == '\0') 4816 i--; 4817 strcpy (buf + j, tmp + i); 4818} 4819 4820static void 4821intel_operand_size (int bytemode, int sizeflag) 4822{ 4823 switch (bytemode) 4824 { 4825 case b_mode: 4826 case dqb_mode: 4827 oappend ("BYTE PTR "); 4828 break; 4829 case w_mode: 4830 case dqw_mode: 4831 oappend ("WORD PTR "); 4832 break; 4833 case stack_v_mode: 4834 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4835 { 4836 oappend ("QWORD PTR "); 4837 used_prefixes |= (prefixes & PREFIX_DATA); 4838 break; 4839 } 4840 /* FALLTHRU */ 4841 case v_mode: 4842 case dq_mode: 4843 USED_REX (REX_W); 4844 if (rex & REX_W) 4845 oappend ("QWORD PTR "); 4846 else if ((sizeflag & DFLAG) || bytemode == dq_mode) 4847 oappend ("DWORD PTR "); 4848 else 4849 oappend ("WORD PTR "); 4850 used_prefixes |= (prefixes & PREFIX_DATA); 4851 break; 4852 case z_mode: 4853 if ((rex & REX_W) || (sizeflag & DFLAG)) 4854 *obufp++ = 'D'; 4855 oappend ("WORD PTR "); 4856 if (!(rex & REX_W)) 4857 used_prefixes |= (prefixes & PREFIX_DATA); 4858 break; 4859 case d_mode: 4860 case dqd_mode: 4861 oappend ("DWORD PTR "); 4862 break; 4863 case q_mode: 4864 oappend ("QWORD PTR "); 4865 break; 4866 case m_mode: 4867 if (address_mode == mode_64bit) 4868 oappend ("QWORD PTR "); 4869 else 4870 oappend ("DWORD PTR "); 4871 break; 4872 case f_mode: 4873 if (sizeflag & DFLAG) 4874 oappend ("FWORD PTR "); 4875 else 4876 oappend ("DWORD PTR "); 4877 used_prefixes |= (prefixes & PREFIX_DATA); 4878 break; 4879 case t_mode: 4880 oappend ("TBYTE PTR "); 4881 break; 4882 case x_mode: 4883 oappend ("XMMWORD PTR "); 4884 break; 4885 case o_mode: 4886 oappend ("OWORD PTR "); 4887 break; 4888 default: 4889 break; 4890 } 4891} 4892 4893static void 4894OP_E (int bytemode, int sizeflag) 4895{ 4896 bfd_vma disp; 4897 int add = 0; 4898 int riprel = 0; 4899 USED_REX (REX_B); 4900 if (rex & REX_B) 4901 add += 8; 4902 4903 /* Skip mod/rm byte. */ 4904 MODRM_CHECK; 4905 codep++; 4906 4907 if (modrm.mod == 3) 4908 { 4909 switch (bytemode) 4910 { 4911 case b_mode: 4912 USED_REX (0); 4913 if (rex) 4914 oappend (names8rex[modrm.rm + add]); 4915 else 4916 oappend (names8[modrm.rm + add]); 4917 break; 4918 case w_mode: 4919 oappend (names16[modrm.rm + add]); 4920 break; 4921 case d_mode: 4922 oappend (names32[modrm.rm + add]); 4923 break; 4924 case q_mode: 4925 oappend (names64[modrm.rm + add]); 4926 break; 4927 case m_mode: 4928 if (address_mode == mode_64bit) 4929 oappend (names64[modrm.rm + add]); 4930 else 4931 oappend (names32[modrm.rm + add]); 4932 break; 4933 case stack_v_mode: 4934 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4935 { 4936 oappend (names64[modrm.rm + add]); 4937 used_prefixes |= (prefixes & PREFIX_DATA); 4938 break; 4939 } 4940 bytemode = v_mode; 4941 /* FALLTHRU */ 4942 case v_mode: 4943 case dq_mode: 4944 case dqb_mode: 4945 case dqd_mode: 4946 case dqw_mode: 4947 USED_REX (REX_W); 4948 if (rex & REX_W) 4949 oappend (names64[modrm.rm + add]); 4950 else if ((sizeflag & DFLAG) || bytemode != v_mode) 4951 oappend (names32[modrm.rm + add]); 4952 else 4953 oappend (names16[modrm.rm + add]); 4954 used_prefixes |= (prefixes & PREFIX_DATA); 4955 break; 4956 case 0: 4957 break; 4958 default: 4959 oappend (INTERNAL_DISASSEMBLER_ERROR); 4960 break; 4961 } 4962 return; 4963 } 4964 4965 disp = 0; 4966 if (intel_syntax) 4967 intel_operand_size (bytemode, sizeflag); 4968 append_seg (); 4969 4970 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 4971 { 4972 /* 32/64 bit address mode */ 4973 int havedisp; 4974 int havesib; 4975 int havebase; 4976 int base; 4977 int index = 0; 4978 int scale = 0; 4979 4980 havesib = 0; 4981 havebase = 1; 4982 base = modrm.rm; 4983 4984 if (base == 4) 4985 { 4986 havesib = 1; 4987 (void) FETCH_DATA (the_info, codep + 1); 4988 index = (*codep >> 3) & 7; 4989 if (address_mode == mode_64bit || index != 0x4) 4990 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */ 4991 scale = (*codep >> 6) & 3; 4992 base = *codep & 7; 4993 USED_REX (REX_X); 4994 if (rex & REX_X) 4995 index += 8; 4996 codep++; 4997 } 4998 base += add; 4999 5000 switch (modrm.mod) 5001 { 5002 case 0: 5003 if ((base & 7) == 5) 5004 { 5005 havebase = 0; 5006 if (address_mode == mode_64bit && !havesib) 5007 riprel = 1; 5008 disp = get32s (); 5009 } 5010 break; 5011 case 1: 5012 FETCH_DATA (the_info, codep + 1); 5013 disp = *codep++; 5014 if ((disp & 0x80) != 0) 5015 disp -= 0x100; 5016 break; 5017 case 2: 5018 disp = get32s (); 5019 break; 5020 } 5021 5022 havedisp = havebase || (havesib && (index != 4 || scale != 0)); 5023 5024 if (!intel_syntax) 5025 if (modrm.mod != 0 || (base & 7) == 5) 5026 { 5027 if (havedisp || riprel) 5028 print_displacement (scratchbuf, disp); 5029 else 5030 print_operand_value (scratchbuf, 1, disp); 5031 oappend (scratchbuf); 5032 if (riprel) 5033 { 5034 set_op (disp, 1); 5035 oappend ("(%rip)"); 5036 } 5037 } 5038 5039 if (havedisp || (intel_syntax && riprel)) 5040 { 5041 *obufp++ = open_char; 5042 if (intel_syntax && riprel) 5043 { 5044 set_op (disp, 1); 5045 oappend ("rip"); 5046 } 5047 *obufp = '\0'; 5048 if (havebase) 5049 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5050 ? names64[base] : names32[base]); 5051 if (havesib) 5052 { 5053 if (index != 4) 5054 { 5055 if (!intel_syntax || havebase) 5056 { 5057 *obufp++ = separator_char; 5058 *obufp = '\0'; 5059 } 5060 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5061 ? names64[index] : names32[index]); 5062 } 5063 if (scale != 0 || (!intel_syntax && index != 4)) 5064 { 5065 *obufp++ = scale_char; 5066 *obufp = '\0'; 5067 sprintf (scratchbuf, "%d", 1 << scale); 5068 oappend (scratchbuf); 5069 } 5070 } 5071 if (intel_syntax 5072 && (disp || modrm.mod != 0 || (base & 7) == 5)) 5073 { 5074 if ((bfd_signed_vma) disp >= 0) 5075 { 5076 *obufp++ = '+'; 5077 *obufp = '\0'; 5078 } 5079 else if (modrm.mod != 1) 5080 { 5081 *obufp++ = '-'; 5082 *obufp = '\0'; 5083 disp = - (bfd_signed_vma) disp; 5084 } 5085 5086 print_displacement (scratchbuf, disp); 5087 oappend (scratchbuf); 5088 } 5089 5090 *obufp++ = close_char; 5091 *obufp = '\0'; 5092 } 5093 else if (intel_syntax) 5094 { 5095 if (modrm.mod != 0 || (base & 7) == 5) 5096 { 5097 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5098 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5099 ; 5100 else 5101 { 5102 oappend (names_seg[ds_reg - es_reg]); 5103 oappend (":"); 5104 } 5105 print_operand_value (scratchbuf, 1, disp); 5106 oappend (scratchbuf); 5107 } 5108 } 5109 } 5110 else 5111 { /* 16 bit address mode */ 5112 switch (modrm.mod) 5113 { 5114 case 0: 5115 if (modrm.rm == 6) 5116 { 5117 disp = get16 (); 5118 if ((disp & 0x8000) != 0) 5119 disp -= 0x10000; 5120 } 5121 break; 5122 case 1: 5123 FETCH_DATA (the_info, codep + 1); 5124 disp = *codep++; 5125 if ((disp & 0x80) != 0) 5126 disp -= 0x100; 5127 break; 5128 case 2: 5129 disp = get16 (); 5130 if ((disp & 0x8000) != 0) 5131 disp -= 0x10000; 5132 break; 5133 } 5134 5135 if (!intel_syntax) 5136 if (modrm.mod != 0 || modrm.rm == 6) 5137 { 5138 print_displacement (scratchbuf, disp); 5139 oappend (scratchbuf); 5140 } 5141 5142 if (modrm.mod != 0 || modrm.rm != 6) 5143 { 5144 *obufp++ = open_char; 5145 *obufp = '\0'; 5146 oappend (index16[modrm.rm]); 5147 if (intel_syntax 5148 && (disp || modrm.mod != 0 || modrm.rm == 6)) 5149 { 5150 if ((bfd_signed_vma) disp >= 0) 5151 { 5152 *obufp++ = '+'; 5153 *obufp = '\0'; 5154 } 5155 else if (modrm.mod != 1) 5156 { 5157 *obufp++ = '-'; 5158 *obufp = '\0'; 5159 disp = - (bfd_signed_vma) disp; 5160 } 5161 5162 print_displacement (scratchbuf, disp); 5163 oappend (scratchbuf); 5164 } 5165 5166 *obufp++ = close_char; 5167 *obufp = '\0'; 5168 } 5169 else if (intel_syntax) 5170 { 5171 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5172 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5173 ; 5174 else 5175 { 5176 oappend (names_seg[ds_reg - es_reg]); 5177 oappend (":"); 5178 } 5179 print_operand_value (scratchbuf, 1, disp & 0xffff); 5180 oappend (scratchbuf); 5181 } 5182 } 5183} 5184 5185static void 5186OP_G (int bytemode, int sizeflag) 5187{ 5188 int add = 0; 5189 USED_REX (REX_R); 5190 if (rex & REX_R) 5191 add += 8; 5192 switch (bytemode) 5193 { 5194 case b_mode: 5195 USED_REX (0); 5196 if (rex) 5197 oappend (names8rex[modrm.reg + add]); 5198 else 5199 oappend (names8[modrm.reg + add]); 5200 break; 5201 case w_mode: 5202 oappend (names16[modrm.reg + add]); 5203 break; 5204 case d_mode: 5205 oappend (names32[modrm.reg + add]); 5206 break; 5207 case q_mode: 5208 oappend (names64[modrm.reg + add]); 5209 break; 5210 case v_mode: 5211 case dq_mode: 5212 case dqb_mode: 5213 case dqd_mode: 5214 case dqw_mode: 5215 USED_REX (REX_W); 5216 if (rex & REX_W) 5217 oappend (names64[modrm.reg + add]); 5218 else if ((sizeflag & DFLAG) || bytemode != v_mode) 5219 oappend (names32[modrm.reg + add]); 5220 else 5221 oappend (names16[modrm.reg + add]); 5222 used_prefixes |= (prefixes & PREFIX_DATA); 5223 break; 5224 case m_mode: 5225 if (address_mode == mode_64bit) 5226 oappend (names64[modrm.reg + add]); 5227 else 5228 oappend (names32[modrm.reg + add]); 5229 break; 5230 default: 5231 oappend (INTERNAL_DISASSEMBLER_ERROR); 5232 break; 5233 } 5234} 5235 5236static bfd_vma 5237get64 (void) 5238{ 5239 bfd_vma x; 5240#ifdef BFD64 5241 unsigned int a; 5242 unsigned int b; 5243 5244 (void) FETCH_DATA (the_info, codep + 8); 5245 a = *codep++ & 0xff; 5246 a |= (*codep++ & 0xff) << 8; 5247 a |= (*codep++ & 0xff) << 16; 5248 a |= (*codep++ & 0xff) << 24; 5249 b = *codep++ & 0xff; 5250 b |= (*codep++ & 0xff) << 8; 5251 b |= (*codep++ & 0xff) << 16; 5252 b |= (*codep++ & 0xff) << 24; 5253 x = a + ((bfd_vma) b << 32); 5254#else 5255 abort (); 5256 x = 0; 5257#endif 5258 return x; 5259} 5260 5261static bfd_signed_vma 5262get32 (void) 5263{ 5264 bfd_signed_vma x = 0; 5265 5266 (void) FETCH_DATA (the_info, codep + 4); 5267 x = *codep++ & (bfd_signed_vma) 0xff; 5268 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5269 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5270 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5271 return x; 5272} 5273 5274static bfd_signed_vma 5275get32s (void) 5276{ 5277 bfd_signed_vma x = 0; 5278 5279 (void) FETCH_DATA (the_info, codep + 4); 5280 x = *codep++ & (bfd_signed_vma) 0xff; 5281 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5282 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5283 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5284 5285 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 5286 5287 return x; 5288} 5289 5290static int 5291get16 (void) 5292{ 5293 int x = 0; 5294 5295 (void) FETCH_DATA (the_info, codep + 2); 5296 x = *codep++ & 0xff; 5297 x |= (*codep++ & 0xff) << 8; 5298 return x; 5299} 5300 5301static void 5302set_op (bfd_vma op, int riprel) 5303{ 5304 op_index[op_ad] = op_ad; 5305 if (address_mode == mode_64bit) 5306 { 5307 op_address[op_ad] = op; 5308 op_riprel[op_ad] = riprel; 5309 } 5310 else 5311 { 5312 /* Mask to get a 32-bit address. */ 5313 op_address[op_ad] = op & 0xffffffff; 5314 op_riprel[op_ad] = riprel & 0xffffffff; 5315 } 5316} 5317 5318static void 5319OP_REG (int code, int sizeflag) 5320{ 5321 const char *s; 5322 int add = 0; 5323 USED_REX (REX_B); 5324 if (rex & REX_B) 5325 add = 8; 5326 5327 switch (code) 5328 { 5329 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5330 case sp_reg: case bp_reg: case si_reg: case di_reg: 5331 s = names16[code - ax_reg + add]; 5332 break; 5333 case es_reg: case ss_reg: case cs_reg: 5334 case ds_reg: case fs_reg: case gs_reg: 5335 s = names_seg[code - es_reg + add]; 5336 break; 5337 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5338 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5339 USED_REX (0); 5340 if (rex) 5341 s = names8rex[code - al_reg + add]; 5342 else 5343 s = names8[code - al_reg]; 5344 break; 5345 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 5346 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 5347 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 5348 { 5349 s = names64[code - rAX_reg + add]; 5350 break; 5351 } 5352 code += eAX_reg - rAX_reg; 5353 /* Fall through. */ 5354 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5355 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5356 USED_REX (REX_W); 5357 if (rex & REX_W) 5358 s = names64[code - eAX_reg + add]; 5359 else if (sizeflag & DFLAG) 5360 s = names32[code - eAX_reg + add]; 5361 else 5362 s = names16[code - eAX_reg + add]; 5363 used_prefixes |= (prefixes & PREFIX_DATA); 5364 break; 5365 default: 5366 s = INTERNAL_DISASSEMBLER_ERROR; 5367 break; 5368 } 5369 oappend (s); 5370} 5371 5372static void 5373OP_IMREG (int code, int sizeflag) 5374{ 5375 const char *s; 5376 5377 switch (code) 5378 { 5379 case indir_dx_reg: 5380 if (intel_syntax) 5381 s = "dx"; 5382 else 5383 s = "(%dx)"; 5384 break; 5385 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5386 case sp_reg: case bp_reg: case si_reg: case di_reg: 5387 s = names16[code - ax_reg]; 5388 break; 5389 case es_reg: case ss_reg: case cs_reg: 5390 case ds_reg: case fs_reg: case gs_reg: 5391 s = names_seg[code - es_reg]; 5392 break; 5393 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5394 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5395 USED_REX (0); 5396 if (rex) 5397 s = names8rex[code - al_reg]; 5398 else 5399 s = names8[code - al_reg]; 5400 break; 5401 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5402 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5403 USED_REX (REX_W); 5404 if (rex & REX_W) 5405 s = names64[code - eAX_reg]; 5406 else if (sizeflag & DFLAG) 5407 s = names32[code - eAX_reg]; 5408 else 5409 s = names16[code - eAX_reg]; 5410 used_prefixes |= (prefixes & PREFIX_DATA); 5411 break; 5412 case z_mode_ax_reg: 5413 if ((rex & REX_W) || (sizeflag & DFLAG)) 5414 s = *names32; 5415 else 5416 s = *names16; 5417 if (!(rex & REX_W)) 5418 used_prefixes |= (prefixes & PREFIX_DATA); 5419 break; 5420 default: 5421 s = INTERNAL_DISASSEMBLER_ERROR; 5422 break; 5423 } 5424 oappend (s); 5425} 5426 5427static void 5428OP_I (int bytemode, int sizeflag) 5429{ 5430 bfd_signed_vma op; 5431 bfd_signed_vma mask = -1; 5432 5433 switch (bytemode) 5434 { 5435 case b_mode: 5436 FETCH_DATA (the_info, codep + 1); 5437 op = *codep++; 5438 mask = 0xff; 5439 break; 5440 case q_mode: 5441 if (address_mode == mode_64bit) 5442 { 5443 op = get32s (); 5444 break; 5445 } 5446 /* Fall through. */ 5447 case v_mode: 5448 USED_REX (REX_W); 5449 if (rex & REX_W) 5450 op = get32s (); 5451 else if (sizeflag & DFLAG) 5452 { 5453 op = get32 (); 5454 mask = 0xffffffff; 5455 } 5456 else 5457 { 5458 op = get16 (); 5459 mask = 0xfffff; 5460 } 5461 used_prefixes |= (prefixes & PREFIX_DATA); 5462 break; 5463 case w_mode: 5464 mask = 0xfffff; 5465 op = get16 (); 5466 break; 5467 case const_1_mode: 5468 if (intel_syntax) 5469 oappend ("1"); 5470 return; 5471 default: 5472 oappend (INTERNAL_DISASSEMBLER_ERROR); 5473 return; 5474 } 5475 5476 op &= mask; 5477 scratchbuf[0] = '$'; 5478 print_operand_value (scratchbuf + 1, 1, op); 5479 oappend (&scratchbuf[intel_syntax]); 5480 scratchbuf[0] = '\0'; 5481} 5482 5483static void 5484OP_I64 (int bytemode, int sizeflag) 5485{ 5486 bfd_signed_vma op; 5487 bfd_signed_vma mask = -1; 5488 5489 if (address_mode != mode_64bit) 5490 { 5491 OP_I (bytemode, sizeflag); 5492 return; 5493 } 5494 5495 switch (bytemode) 5496 { 5497 case b_mode: 5498 FETCH_DATA (the_info, codep + 1); 5499 op = *codep++; 5500 mask = 0xff; 5501 break; 5502 case v_mode: 5503 USED_REX (REX_W); 5504 if (rex & REX_W) 5505 op = get64 (); 5506 else if (sizeflag & DFLAG) 5507 { 5508 op = get32 (); 5509 mask = 0xffffffff; 5510 } 5511 else 5512 { 5513 op = get16 (); 5514 mask = 0xfffff; 5515 } 5516 used_prefixes |= (prefixes & PREFIX_DATA); 5517 break; 5518 case w_mode: 5519 mask = 0xfffff; 5520 op = get16 (); 5521 break; 5522 default: 5523 oappend (INTERNAL_DISASSEMBLER_ERROR); 5524 return; 5525 } 5526 5527 op &= mask; 5528 scratchbuf[0] = '$'; 5529 print_operand_value (scratchbuf + 1, 1, op); 5530 oappend (&scratchbuf[intel_syntax]); 5531 scratchbuf[0] = '\0'; 5532} 5533 5534static void 5535OP_sI (int bytemode, int sizeflag) 5536{ 5537 bfd_signed_vma op; 5538 bfd_signed_vma mask = -1; 5539 5540 switch (bytemode) 5541 { 5542 case b_mode: 5543 FETCH_DATA (the_info, codep + 1); 5544 op = *codep++; 5545 if ((op & 0x80) != 0) 5546 op -= 0x100; 5547 mask = 0xffffffff; 5548 break; 5549 case v_mode: 5550 USED_REX (REX_W); 5551 if (rex & REX_W) 5552 op = get32s (); 5553 else if (sizeflag & DFLAG) 5554 { 5555 op = get32s (); 5556 mask = 0xffffffff; 5557 } 5558 else 5559 { 5560 mask = 0xffffffff; 5561 op = get16 (); 5562 if ((op & 0x8000) != 0) 5563 op -= 0x10000; 5564 } 5565 used_prefixes |= (prefixes & PREFIX_DATA); 5566 break; 5567 case w_mode: 5568 op = get16 (); 5569 mask = 0xffffffff; 5570 if ((op & 0x8000) != 0) 5571 op -= 0x10000; 5572 break; 5573 default: 5574 oappend (INTERNAL_DISASSEMBLER_ERROR); 5575 return; 5576 } 5577 5578 scratchbuf[0] = '$'; 5579 print_operand_value (scratchbuf + 1, 1, op); 5580 oappend (&scratchbuf[intel_syntax]); 5581} 5582 5583static void 5584OP_J (int bytemode, int sizeflag) 5585{ 5586 bfd_vma disp; 5587 bfd_vma mask = -1; 5588 bfd_vma segment = 0; 5589 5590 switch (bytemode) 5591 { 5592 case b_mode: 5593 FETCH_DATA (the_info, codep + 1); 5594 disp = *codep++; 5595 if ((disp & 0x80) != 0) 5596 disp -= 0x100; 5597 break; 5598 case v_mode: 5599 if ((sizeflag & DFLAG) || (rex & REX_W)) 5600 disp = get32s (); 5601 else 5602 { 5603 disp = get16 (); 5604 if ((disp & 0x8000) != 0) 5605 disp -= 0x10000; 5606 /* In 16bit mode, address is wrapped around at 64k within 5607 the same segment. Otherwise, a data16 prefix on a jump 5608 instruction means that the pc is masked to 16 bits after 5609 the displacement is added! */ 5610 mask = 0xffff; 5611 if ((prefixes & PREFIX_DATA) == 0) 5612 segment = ((start_pc + codep - start_codep) 5613 & ~((bfd_vma) 0xffff)); 5614 } 5615 used_prefixes |= (prefixes & PREFIX_DATA); 5616 break; 5617 default: 5618 oappend (INTERNAL_DISASSEMBLER_ERROR); 5619 return; 5620 } 5621 disp = ((start_pc + codep - start_codep + disp) & mask) | segment; 5622 set_op (disp, 0); 5623 print_operand_value (scratchbuf, 1, disp); 5624 oappend (scratchbuf); 5625} 5626 5627static void 5628OP_SEG (int bytemode, int sizeflag) 5629{ 5630 if (bytemode == w_mode) 5631 oappend (names_seg[modrm.reg]); 5632 else 5633 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag); 5634} 5635 5636static void 5637OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) 5638{ 5639 int seg, offset; 5640 5641 if (sizeflag & DFLAG) 5642 { 5643 offset = get32 (); 5644 seg = get16 (); 5645 } 5646 else 5647 { 5648 offset = get16 (); 5649 seg = get16 (); 5650 } 5651 used_prefixes |= (prefixes & PREFIX_DATA); 5652 if (intel_syntax) 5653 sprintf (scratchbuf, "0x%x:0x%x", seg, offset); 5654 else 5655 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); 5656 oappend (scratchbuf); 5657} 5658 5659static void 5660OP_OFF (int bytemode, int sizeflag) 5661{ 5662 bfd_vma off; 5663 5664 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5665 intel_operand_size (bytemode, sizeflag); 5666 append_seg (); 5667 5668 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 5669 off = get32 (); 5670 else 5671 off = get16 (); 5672 5673 if (intel_syntax) 5674 { 5675 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5676 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5677 { 5678 oappend (names_seg[ds_reg - es_reg]); 5679 oappend (":"); 5680 } 5681 } 5682 print_operand_value (scratchbuf, 1, off); 5683 oappend (scratchbuf); 5684} 5685 5686static void 5687OP_OFF64 (int bytemode, int sizeflag) 5688{ 5689 bfd_vma off; 5690 5691 if (address_mode != mode_64bit 5692 || (prefixes & PREFIX_ADDR)) 5693 { 5694 OP_OFF (bytemode, sizeflag); 5695 return; 5696 } 5697 5698 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5699 intel_operand_size (bytemode, sizeflag); 5700 append_seg (); 5701 5702 off = get64 (); 5703 5704 if (intel_syntax) 5705 { 5706 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5707 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5708 { 5709 oappend (names_seg[ds_reg - es_reg]); 5710 oappend (":"); 5711 } 5712 } 5713 print_operand_value (scratchbuf, 1, off); 5714 oappend (scratchbuf); 5715} 5716 5717static void 5718ptr_reg (int code, int sizeflag) 5719{ 5720 const char *s; 5721 5722 *obufp++ = open_char; 5723 used_prefixes |= (prefixes & PREFIX_ADDR); 5724 if (address_mode == mode_64bit) 5725 { 5726 if (!(sizeflag & AFLAG)) 5727 s = names32[code - eAX_reg]; 5728 else 5729 s = names64[code - eAX_reg]; 5730 } 5731 else if (sizeflag & AFLAG) 5732 s = names32[code - eAX_reg]; 5733 else 5734 s = names16[code - eAX_reg]; 5735 oappend (s); 5736 *obufp++ = close_char; 5737 *obufp = 0; 5738} 5739 5740static void 5741OP_ESreg (int code, int sizeflag) 5742{ 5743 if (intel_syntax) 5744 { 5745 switch (codep[-1]) 5746 { 5747 case 0x6d: /* insw/insl */ 5748 intel_operand_size (z_mode, sizeflag); 5749 break; 5750 case 0xa5: /* movsw/movsl/movsq */ 5751 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5752 case 0xab: /* stosw/stosl */ 5753 case 0xaf: /* scasw/scasl */ 5754 intel_operand_size (v_mode, sizeflag); 5755 break; 5756 default: 5757 intel_operand_size (b_mode, sizeflag); 5758 } 5759 } 5760 oappend (&"%es:"[intel_syntax]); 5761 ptr_reg (code, sizeflag); 5762} 5763 5764static void 5765OP_DSreg (int code, int sizeflag) 5766{ 5767 if (intel_syntax) 5768 { 5769 switch (codep[-1]) 5770 { 5771 case 0x6f: /* outsw/outsl */ 5772 intel_operand_size (z_mode, sizeflag); 5773 break; 5774 case 0xa5: /* movsw/movsl/movsq */ 5775 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5776 case 0xad: /* lodsw/lodsl/lodsq */ 5777 intel_operand_size (v_mode, sizeflag); 5778 break; 5779 default: 5780 intel_operand_size (b_mode, sizeflag); 5781 } 5782 } 5783 if ((prefixes 5784 & (PREFIX_CS 5785 | PREFIX_DS 5786 | PREFIX_SS 5787 | PREFIX_ES 5788 | PREFIX_FS 5789 | PREFIX_GS)) == 0) 5790 prefixes |= PREFIX_DS; 5791 append_seg (); 5792 ptr_reg (code, sizeflag); 5793} 5794 5795static void 5796OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5797{ 5798 int add = 0; 5799 if (rex & REX_R) 5800 { 5801 USED_REX (REX_R); 5802 add = 8; 5803 } 5804 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK)) 5805 { 5806 used_prefixes |= PREFIX_LOCK; 5807 add = 8; 5808 } 5809 sprintf (scratchbuf, "%%cr%d", modrm.reg + add); 5810 oappend (&scratchbuf[intel_syntax]); 5811} 5812 5813static void 5814OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5815{ 5816 int add = 0; 5817 USED_REX (REX_R); 5818 if (rex & REX_R) 5819 add = 8; 5820 if (intel_syntax) 5821 sprintf (scratchbuf, "db%d", modrm.reg + add); 5822 else 5823 sprintf (scratchbuf, "%%db%d", modrm.reg + add); 5824 oappend (scratchbuf); 5825} 5826 5827static void 5828OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5829{ 5830 sprintf (scratchbuf, "%%tr%d", modrm.reg); 5831 oappend (&scratchbuf[intel_syntax]); 5832} 5833 5834static void 5835OP_R (int bytemode, int sizeflag) 5836{ 5837 if (modrm.mod == 3) 5838 OP_E (bytemode, sizeflag); 5839 else 5840 BadOp (); 5841} 5842 5843static void 5844OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5845{ 5846 used_prefixes |= (prefixes & PREFIX_DATA); 5847 if (prefixes & PREFIX_DATA) 5848 { 5849 int add = 0; 5850 USED_REX (REX_R); 5851 if (rex & REX_R) 5852 add = 8; 5853 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add); 5854 } 5855 else 5856 sprintf (scratchbuf, "%%mm%d", modrm.reg); 5857 oappend (&scratchbuf[intel_syntax]); 5858} 5859 5860static void 5861OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5862{ 5863 int add = 0; 5864 USED_REX (REX_R); 5865 if (rex & REX_R) 5866 add = 8; 5867 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add); 5868 oappend (&scratchbuf[intel_syntax]); 5869} 5870 5871static void 5872OP_EM (int bytemode, int sizeflag) 5873{ 5874 if (modrm.mod != 3) 5875 { 5876 if (intel_syntax && bytemode == v_mode) 5877 { 5878 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5879 used_prefixes |= (prefixes & PREFIX_DATA); 5880 } 5881 OP_E (bytemode, sizeflag); 5882 return; 5883 } 5884 5885 /* Skip mod/rm byte. */ 5886 MODRM_CHECK; 5887 codep++; 5888 used_prefixes |= (prefixes & PREFIX_DATA); 5889 if (prefixes & PREFIX_DATA) 5890 { 5891 int add = 0; 5892 5893 USED_REX (REX_B); 5894 if (rex & REX_B) 5895 add = 8; 5896 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add); 5897 } 5898 else 5899 sprintf (scratchbuf, "%%mm%d", modrm.rm); 5900 oappend (&scratchbuf[intel_syntax]); 5901} 5902 5903/* cvt* are the only instructions in sse2 which have 5904 both SSE and MMX operands and also have 0x66 prefix 5905 in their opcode. 0x66 was originally used to differentiate 5906 between SSE and MMX instruction(operands). So we have to handle the 5907 cvt* separately using OP_EMC and OP_MXC */ 5908static void 5909OP_EMC (int bytemode, int sizeflag) 5910{ 5911 if (modrm.mod != 3) 5912 { 5913 if (intel_syntax && bytemode == v_mode) 5914 { 5915 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5916 used_prefixes |= (prefixes & PREFIX_DATA); 5917 } 5918 OP_E (bytemode, sizeflag); 5919 return; 5920 } 5921 5922 /* Skip mod/rm byte. */ 5923 MODRM_CHECK; 5924 codep++; 5925 used_prefixes |= (prefixes & PREFIX_DATA); 5926 sprintf (scratchbuf, "%%mm%d", modrm.rm); 5927 oappend (&scratchbuf[intel_syntax]); 5928} 5929 5930static void 5931OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5932{ 5933 used_prefixes |= (prefixes & PREFIX_DATA); 5934 sprintf (scratchbuf, "%%mm%d", modrm.reg); 5935 oappend (&scratchbuf[intel_syntax]); 5936} 5937 5938static void 5939OP_EX (int bytemode, int sizeflag) 5940{ 5941 int add = 0; 5942 if (modrm.mod != 3) 5943 { 5944 OP_E (bytemode, sizeflag); 5945 return; 5946 } 5947 USED_REX (REX_B); 5948 if (rex & REX_B) 5949 add = 8; 5950 5951 /* Skip mod/rm byte. */ 5952 MODRM_CHECK; 5953 codep++; 5954 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add); 5955 oappend (&scratchbuf[intel_syntax]); 5956} 5957 5958static void 5959OP_MS (int bytemode, int sizeflag) 5960{ 5961 if (modrm.mod == 3) 5962 OP_EM (bytemode, sizeflag); 5963 else 5964 BadOp (); 5965} 5966 5967static void 5968OP_XS (int bytemode, int sizeflag) 5969{ 5970 if (modrm.mod == 3) 5971 OP_EX (bytemode, sizeflag); 5972 else 5973 BadOp (); 5974} 5975 5976static void 5977OP_M (int bytemode, int sizeflag) 5978{ 5979 if (modrm.mod == 3) 5980 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst,invept,invvpid modrm */ 5981 BadOp (); 5982 else 5983 OP_E (bytemode, sizeflag); 5984} 5985 5986static void 5987OP_0f07 (int bytemode, int sizeflag) 5988{ 5989 if (modrm.mod != 3 || modrm.rm != 0) 5990 BadOp (); 5991 else 5992 OP_E (bytemode, sizeflag); 5993} 5994 5995static void 5996OP_0fae (int bytemode, int sizeflag) 5997{ 5998 if (modrm.mod == 3) 5999 { 6000 if (modrm.reg >= 5 && modrm.reg <= 7 && modrm.rm == 0) 6001 { 6002 if (modrm.reg == 7) 6003 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); 6004 else if (modrm.reg == 6) 6005 strcpy (obuf + strlen (obuf) - sizeof ("xsaveopt") + 1, "mfence"); 6006 else if (modrm.reg == 5) 6007 strcpy (obuf + strlen (obuf) - sizeof ("xrstor") + 1, "lfence"); 6008 bytemode = 0; 6009 } 6010 else if (modrm.reg <= 3 && (prefixes & PREFIX_REPZ) != 0) 6011 { 6012 if (modrm.reg == 0) 6013 strcpy (obuf + strlen (obuf) - sizeof ("fxsave") + 1, "rdfsbase"); 6014 else if (modrm.reg == 1) 6015 strcpy (obuf + strlen (obuf) - sizeof ("fxrstor") + 1, "rdgsbase"); 6016 else if (modrm.reg == 2) 6017 strcpy (obuf + strlen (obuf) - sizeof ("ldmxcsr") + 1, "wrfsbase"); 6018 else if (modrm.reg == 3) 6019 strcpy (obuf + strlen (obuf) - sizeof ("stmxcsr") + 1, "wrgsbase"); 6020 used_prefixes |= PREFIX_REPZ; 6021 bytemode = dq_mode; 6022 } 6023 else 6024 { 6025 BadOp (); 6026 return; 6027 } 6028 } 6029 6030 OP_E (bytemode, sizeflag); 6031} 6032 6033/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in 6034 32bit mode and "xchg %rax,%rax" in 64bit mode. */ 6035 6036static void 6037NOP_Fixup1 (int bytemode, int sizeflag) 6038{ 6039 if ((prefixes & PREFIX_DATA) != 0 6040 || (rex != 0 6041 && rex != 0x48 6042 && address_mode == mode_64bit)) 6043 OP_REG (bytemode, sizeflag); 6044 else 6045 strcpy (obuf, "nop"); 6046} 6047 6048static void 6049NOP_Fixup2 (int bytemode, int sizeflag) 6050{ 6051 if ((prefixes & PREFIX_DATA) != 0 6052 || (rex != 0 6053 && rex != 0x48 6054 && address_mode == mode_64bit)) 6055 OP_IMREG (bytemode, sizeflag); 6056} 6057 6058static const char *const Suffix3DNow[] = { 6059/* 00 */ NULL, NULL, NULL, NULL, 6060/* 04 */ NULL, NULL, NULL, NULL, 6061/* 08 */ NULL, NULL, NULL, NULL, 6062/* 0C */ "pi2fw", "pi2fd", NULL, NULL, 6063/* 10 */ NULL, NULL, NULL, NULL, 6064/* 14 */ NULL, NULL, NULL, NULL, 6065/* 18 */ NULL, NULL, NULL, NULL, 6066/* 1C */ "pf2iw", "pf2id", NULL, NULL, 6067/* 20 */ NULL, NULL, NULL, NULL, 6068/* 24 */ NULL, NULL, NULL, NULL, 6069/* 28 */ NULL, NULL, NULL, NULL, 6070/* 2C */ NULL, NULL, NULL, NULL, 6071/* 30 */ NULL, NULL, NULL, NULL, 6072/* 34 */ NULL, NULL, NULL, NULL, 6073/* 38 */ NULL, NULL, NULL, NULL, 6074/* 3C */ NULL, NULL, NULL, NULL, 6075/* 40 */ NULL, NULL, NULL, NULL, 6076/* 44 */ NULL, NULL, NULL, NULL, 6077/* 48 */ NULL, NULL, NULL, NULL, 6078/* 4C */ NULL, NULL, NULL, NULL, 6079/* 50 */ NULL, NULL, NULL, NULL, 6080/* 54 */ NULL, NULL, NULL, NULL, 6081/* 58 */ NULL, NULL, NULL, NULL, 6082/* 5C */ NULL, NULL, NULL, NULL, 6083/* 60 */ NULL, NULL, NULL, NULL, 6084/* 64 */ NULL, NULL, NULL, NULL, 6085/* 68 */ NULL, NULL, NULL, NULL, 6086/* 6C */ NULL, NULL, NULL, NULL, 6087/* 70 */ NULL, NULL, NULL, NULL, 6088/* 74 */ NULL, NULL, NULL, NULL, 6089/* 78 */ NULL, NULL, NULL, NULL, 6090/* 7C */ NULL, NULL, NULL, NULL, 6091/* 80 */ NULL, NULL, NULL, NULL, 6092/* 84 */ NULL, NULL, NULL, NULL, 6093/* 88 */ NULL, NULL, "pfnacc", NULL, 6094/* 8C */ NULL, NULL, "pfpnacc", NULL, 6095/* 90 */ "pfcmpge", NULL, NULL, NULL, 6096/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 6097/* 98 */ NULL, NULL, "pfsub", NULL, 6098/* 9C */ NULL, NULL, "pfadd", NULL, 6099/* A0 */ "pfcmpgt", NULL, NULL, NULL, 6100/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 6101/* A8 */ NULL, NULL, "pfsubr", NULL, 6102/* AC */ NULL, NULL, "pfacc", NULL, 6103/* B0 */ "pfcmpeq", NULL, NULL, NULL, 6104/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw", 6105/* B8 */ NULL, NULL, NULL, "pswapd", 6106/* BC */ NULL, NULL, NULL, "pavgusb", 6107/* C0 */ NULL, NULL, NULL, NULL, 6108/* C4 */ NULL, NULL, NULL, NULL, 6109/* C8 */ NULL, NULL, NULL, NULL, 6110/* CC */ NULL, NULL, NULL, NULL, 6111/* D0 */ NULL, NULL, NULL, NULL, 6112/* D4 */ NULL, NULL, NULL, NULL, 6113/* D8 */ NULL, NULL, NULL, NULL, 6114/* DC */ NULL, NULL, NULL, NULL, 6115/* E0 */ NULL, NULL, NULL, NULL, 6116/* E4 */ NULL, NULL, NULL, NULL, 6117/* E8 */ NULL, NULL, NULL, NULL, 6118/* EC */ NULL, NULL, NULL, NULL, 6119/* F0 */ NULL, NULL, NULL, NULL, 6120/* F4 */ NULL, NULL, NULL, NULL, 6121/* F8 */ NULL, NULL, NULL, NULL, 6122/* FC */ NULL, NULL, NULL, NULL, 6123}; 6124 6125static void 6126OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6127{ 6128 const char *mnemonic; 6129 6130 (void) FETCH_DATA (the_info, codep + 1); 6131 /* AMD 3DNow! instructions are specified by an opcode suffix in the 6132 place where an 8-bit immediate would normally go. ie. the last 6133 byte of the instruction. */ 6134 obufp = obuf + strlen (obuf); 6135 mnemonic = Suffix3DNow[*codep++ & 0xff]; 6136 if (mnemonic) 6137 oappend (mnemonic); 6138 else 6139 { 6140 /* Since a variable sized modrm/sib chunk is between the start 6141 of the opcode (0x0f0f) and the opcode suffix, we need to do 6142 all the modrm processing first, and don't know until now that 6143 we have a bad opcode. This necessitates some cleaning up. */ 6144 op_out[0][0] = '\0'; 6145 op_out[1][0] = '\0'; 6146 BadOp (); 6147 } 6148} 6149 6150static const char *simd_cmp_op[] = { 6151 "eq", 6152 "lt", 6153 "le", 6154 "unord", 6155 "neq", 6156 "nlt", 6157 "nle", 6158 "ord" 6159}; 6160 6161static void 6162OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6163{ 6164 unsigned int cmp_type; 6165 6166 (void) FETCH_DATA (the_info, codep + 1); 6167 obufp = obuf + strlen (obuf); 6168 cmp_type = *codep++ & 0xff; 6169 if (cmp_type < 8) 6170 { 6171 char suffix1 = 'p', suffix2 = 's'; 6172 used_prefixes |= (prefixes & PREFIX_REPZ); 6173 if (prefixes & PREFIX_REPZ) 6174 suffix1 = 's'; 6175 else 6176 { 6177 used_prefixes |= (prefixes & PREFIX_DATA); 6178 if (prefixes & PREFIX_DATA) 6179 suffix2 = 'd'; 6180 else 6181 { 6182 used_prefixes |= (prefixes & PREFIX_REPNZ); 6183 if (prefixes & PREFIX_REPNZ) 6184 suffix1 = 's', suffix2 = 'd'; 6185 } 6186 } 6187 sprintf (scratchbuf, "cmp%s%c%c", 6188 simd_cmp_op[cmp_type], suffix1, suffix2); 6189 used_prefixes |= (prefixes & PREFIX_REPZ); 6190 oappend (scratchbuf); 6191 } 6192 else 6193 { 6194 /* We have a bad extension byte. Clean up. */ 6195 op_out[0][0] = '\0'; 6196 op_out[1][0] = '\0'; 6197 BadOp (); 6198 } 6199} 6200 6201static void 6202SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) 6203{ 6204 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 6205 forms of these instructions. */ 6206 if (modrm.mod == 3) 6207 { 6208 char *p = obuf + strlen (obuf); 6209 *(p + 1) = '\0'; 6210 *p = *(p - 1); 6211 *(p - 1) = *(p - 2); 6212 *(p - 2) = *(p - 3); 6213 *(p - 3) = extrachar; 6214 } 6215} 6216 6217static void 6218PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6219{ 6220 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1) 6221 { 6222 /* Override "sidt". */ 6223 size_t olen = strlen (obuf); 6224 char *p = obuf + olen - 4; 6225 const char **names = (address_mode == mode_64bit 6226 ? names64 : names32); 6227 6228 /* We might have a suffix when disassembling with -Msuffix. */ 6229 if (*p == 'i') 6230 --p; 6231 6232 /* Remove "addr16/addr32" if we aren't in Intel mode. */ 6233 if (!intel_syntax 6234 && (prefixes & PREFIX_ADDR) 6235 && olen >= (4 + 7) 6236 && *(p - 1) == ' ' 6237 && CONST_STRNEQ (p - 7, "addr") 6238 && (CONST_STRNEQ (p - 3, "16") 6239 || CONST_STRNEQ (p - 3, "32"))) 6240 p -= 7; 6241 6242 if (modrm.rm) 6243 { 6244 /* mwait %eax,%ecx */ 6245 strcpy (p, "mwait"); 6246 if (!intel_syntax) 6247 strcpy (op_out[0], names[0]); 6248 } 6249 else 6250 { 6251 /* monitor %eax,%ecx,%edx" */ 6252 strcpy (p, "monitor"); 6253 if (!intel_syntax) 6254 { 6255 const char **op1_names; 6256 if (!(prefixes & PREFIX_ADDR)) 6257 op1_names = (address_mode == mode_16bit 6258 ? names16 : names); 6259 else 6260 { 6261 op1_names = (address_mode != mode_32bit 6262 ? names32 : names16); 6263 used_prefixes |= PREFIX_ADDR; 6264 } 6265 strcpy (op_out[0], op1_names[0]); 6266 strcpy (op_out[2], names[2]); 6267 } 6268 } 6269 if (!intel_syntax) 6270 { 6271 strcpy (op_out[1], names[1]); 6272 two_source_ops = 1; 6273 } 6274 6275 codep++; 6276 } 6277 else if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 3) 6278 { 6279 size_t olen = strlen (obuf); 6280 char *p = obuf + olen - 4; 6281 if (*codep == 0xca) 6282 strcpy (p, "clac"); 6283 else if (*codep == 0xcb) 6284 strcpy (p, "stac"); 6285 codep++; 6286 } 6287 else 6288 OP_M (0, sizeflag); 6289} 6290 6291static void 6292XCR_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6293{ 6294 if (modrm.mod == 3 && modrm.reg == 2 && modrm.rm <= 1) 6295 { 6296 /* Override "lgdt". */ 6297 size_t olen = strlen (obuf); 6298 char *p = obuf + olen - 4; 6299 6300 /* We might have a suffix when disassembling with -Msuffix. */ 6301 if (*p == 'i') 6302 --p; 6303 6304 /* Remove "addr16/addr32" if we aren't in Intel mode. */ 6305 if (!intel_syntax 6306 && (prefixes & PREFIX_ADDR) 6307 && olen >= (4 + 7) 6308 && *(p - 1) == ' ' 6309 && CONST_STRNEQ (p - 7, "addr") 6310 && (CONST_STRNEQ (p - 3, "16") 6311 || CONST_STRNEQ (p - 3, "32"))) 6312 p -= 7; 6313 6314 if (modrm.rm) 6315 { 6316 strcpy (p, "xsetbv"); 6317 } 6318 else 6319 { 6320 strcpy (p, "xgetbv"); 6321 } 6322 6323 codep++; 6324 } 6325 else 6326 OP_M (0, sizeflag); 6327} 6328static void 6329SVME_Fixup (int bytemode, int sizeflag) 6330{ 6331 const char *alt; 6332 char *p; 6333 6334 switch (*codep) 6335 { 6336 case 0xd8: 6337 alt = "vmrun"; 6338 break; 6339 case 0xd9: 6340 alt = "vmmcall"; 6341 break; 6342 case 0xda: 6343 alt = "vmload"; 6344 break; 6345 case 0xdb: 6346 alt = "vmsave"; 6347 break; 6348 case 0xdc: 6349 alt = "stgi"; 6350 break; 6351 case 0xdd: 6352 alt = "clgi"; 6353 break; 6354 case 0xde: 6355 alt = "skinit"; 6356 break; 6357 case 0xdf: 6358 alt = "invlpga"; 6359 break; 6360 default: 6361 OP_M (bytemode, sizeflag); 6362 return; 6363 } 6364 /* Override "lidt". */ 6365 p = obuf + strlen (obuf) - 4; 6366 /* We might have a suffix. */ 6367 if (*p == 'i') 6368 --p; 6369 strcpy (p, alt); 6370 if (!(prefixes & PREFIX_ADDR)) 6371 { 6372 ++codep; 6373 return; 6374 } 6375 used_prefixes |= PREFIX_ADDR; 6376 switch (*codep++) 6377 { 6378 case 0xdf: 6379 strcpy (op_out[1], names32[1]); 6380 two_source_ops = 1; 6381 /* Fall through. */ 6382 case 0xd8: 6383 case 0xda: 6384 case 0xdb: 6385 *obufp++ = open_char; 6386 if (address_mode == mode_64bit || (sizeflag & AFLAG)) 6387 alt = names32[0]; 6388 else 6389 alt = names16[0]; 6390 strcpy (obufp, alt); 6391 obufp += strlen (alt); 6392 *obufp++ = close_char; 6393 *obufp = '\0'; 6394 break; 6395 } 6396} 6397 6398static void 6399INVLPG_Fixup (int bytemode, int sizeflag) 6400{ 6401 const char *alt; 6402 6403 switch (*codep) 6404 { 6405 case 0xf8: 6406 alt = "swapgs"; 6407 break; 6408 case 0xf9: 6409 alt = "rdtscp"; 6410 break; 6411 default: 6412 OP_M (bytemode, sizeflag); 6413 return; 6414 } 6415 /* Override "invlpg". */ 6416 strcpy (obuf + strlen (obuf) - 6, alt); 6417 codep++; 6418} 6419 6420static void 6421BadOp (void) 6422{ 6423 /* Throw away prefixes and 1st. opcode byte. */ 6424 codep = insn_codep + 1; 6425 oappend ("(bad)"); 6426} 6427 6428static void 6429VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6430{ 6431 if (modrm.mod == 3 6432 && modrm.reg == 0 6433 && modrm.rm >=1 6434 && modrm.rm <= 4) 6435 { 6436 /* Override "sgdt". */ 6437 char *p = obuf + strlen (obuf) - 4; 6438 6439 /* We might have a suffix when disassembling with -Msuffix. */ 6440 if (*p == 'g') 6441 --p; 6442 6443 switch (modrm.rm) 6444 { 6445 case 1: 6446 strcpy (p, "vmcall"); 6447 break; 6448 case 2: 6449 strcpy (p, "vmlaunch"); 6450 break; 6451 case 3: 6452 strcpy (p, "vmresume"); 6453 break; 6454 case 4: 6455 strcpy (p, "vmxoff"); 6456 break; 6457 } 6458 6459 codep++; 6460 } 6461 else 6462 OP_E (0, sizeflag); 6463} 6464 6465static void 6466OP_VMX (int bytemode, int sizeflag) 6467{ 6468 if (modrm.mod == 3) 6469 { 6470 strcpy (obuf, "rdrand"); 6471 OP_E (v_mode, sizeflag); 6472 } 6473 else 6474 { 6475 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ)); 6476 if (prefixes & PREFIX_DATA) 6477 strcpy (obuf, "vmclear"); 6478 else if (prefixes & PREFIX_REPZ) 6479 strcpy (obuf, "vmxon"); 6480 else 6481 strcpy (obuf, "vmptrld"); 6482 OP_E (bytemode, sizeflag); 6483 } 6484} 6485 6486static void 6487OP_VMX2 (int bytemode, int sizeflag) 6488{ 6489 if (modrm.mod == 3) 6490 { 6491 strcpy (obuf, "rdseed"); 6492 OP_E (v_mode, sizeflag); 6493 } 6494 else 6495 { 6496 strcpy (obuf, "vmptrst"); 6497 OP_M (q_mode, sizeflag); 6498 } 6499} 6500 6501static void 6502REP_Fixup (int bytemode, int sizeflag) 6503{ 6504 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs, 6505 lods and stos. */ 6506 size_t ilen = 0; 6507 6508 if (prefixes & PREFIX_REPZ) 6509 switch (*insn_codep) 6510 { 6511 case 0x6e: /* outsb */ 6512 case 0x6f: /* outsw/outsl */ 6513 case 0xa4: /* movsb */ 6514 case 0xa5: /* movsw/movsl/movsq */ 6515 if (!intel_syntax) 6516 ilen = 5; 6517 else 6518 ilen = 4; 6519 break; 6520 case 0xaa: /* stosb */ 6521 case 0xab: /* stosw/stosl/stosq */ 6522 case 0xac: /* lodsb */ 6523 case 0xad: /* lodsw/lodsl/lodsq */ 6524 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 6525 ilen = 5; 6526 else 6527 ilen = 4; 6528 break; 6529 case 0x6c: /* insb */ 6530 case 0x6d: /* insl/insw */ 6531 if (!intel_syntax) 6532 ilen = 4; 6533 else 6534 ilen = 3; 6535 break; 6536 default: 6537 abort (); 6538 break; 6539 } 6540 6541 if (ilen != 0) 6542 { 6543 size_t olen; 6544 char *p; 6545 6546 olen = strlen (obuf); 6547 p = obuf + olen - ilen - 1 - 4; 6548 /* Handle "repz [addr16|addr32]". */ 6549 if ((prefixes & PREFIX_ADDR)) 6550 p -= 1 + 6; 6551 6552 memmove (p + 3, p + 4, olen - (p + 3 - obuf)); 6553 } 6554 6555 switch (bytemode) 6556 { 6557 case al_reg: 6558 case eAX_reg: 6559 case indir_dx_reg: 6560 OP_IMREG (bytemode, sizeflag); 6561 break; 6562 case eDI_reg: 6563 OP_ESreg (bytemode, sizeflag); 6564 break; 6565 case eSI_reg: 6566 OP_DSreg (bytemode, sizeflag); 6567 break; 6568 default: 6569 abort (); 6570 break; 6571 } 6572} 6573 6574static void 6575CMPXCHG8B_Fixup (int bytemode, int sizeflag) 6576{ 6577 USED_REX (REX_W); 6578 if (rex & REX_W) 6579 { 6580 /* Change cmpxchg8b to cmpxchg16b. */ 6581 char *p = obuf + strlen (obuf) - 2; 6582 strcpy (p, "16b"); 6583 bytemode = o_mode; 6584 } 6585 OP_M (bytemode, sizeflag); 6586} 6587 6588static void 6589XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED) 6590{ 6591 sprintf (scratchbuf, "%%xmm%d", reg); 6592 oappend (&scratchbuf[intel_syntax]); 6593} 6594 6595static void 6596CRC32_Fixup (int bytemode, int sizeflag) 6597{ 6598 /* Add proper suffix to "crc32". */ 6599 char *p = obuf + strlen (obuf); 6600 6601 switch (bytemode) 6602 { 6603 case b_mode: 6604 if (intel_syntax) 6605 break; 6606 6607 *p++ = 'b'; 6608 break; 6609 case v_mode: 6610 if (intel_syntax) 6611 break; 6612 6613 USED_REX (REX_W); 6614 if (rex & REX_W) 6615 *p++ = 'q'; 6616 else if (sizeflag & DFLAG) 6617 *p++ = 'l'; 6618 else 6619 *p++ = 'w'; 6620 used_prefixes |= (prefixes & PREFIX_DATA); 6621 break; 6622 default: 6623 oappend (INTERNAL_DISASSEMBLER_ERROR); 6624 break; 6625 } 6626 *p = '\0'; 6627 6628 if (modrm.mod == 3) 6629 { 6630 int add; 6631 6632 /* Skip mod/rm byte. */ 6633 MODRM_CHECK; 6634 codep++; 6635 6636 USED_REX (REX_B); 6637 add = (rex & REX_B) ? 8 : 0; 6638 if (bytemode == b_mode) 6639 { 6640 USED_REX (0); 6641 if (rex) 6642 oappend (names8rex[modrm.rm + add]); 6643 else 6644 oappend (names8[modrm.rm + add]); 6645 } 6646 else 6647 { 6648 USED_REX (REX_W); 6649 if (rex & REX_W) 6650 oappend (names64[modrm.rm + add]); 6651 else if ((prefixes & PREFIX_DATA)) 6652 oappend (names16[modrm.rm + add]); 6653 else 6654 oappend (names32[modrm.rm + add]); 6655 } 6656 } 6657 else 6658 OP_E (bytemode, sizeflag); 6659} 6660