1/* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture. 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 3 Free Software Foundation, Inc. 4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com> 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 21 Boston, MA 02110-1301, USA. */ 22 23/* 24 TODO: 25 26 - optional operands 27 - directives: 28 .eb 29 .estate 30 .lb 31 .popsection 32 .previous 33 .psr 34 .pushsection 35 - labels are wrong if automatic alignment is introduced 36 (e.g., checkout the second real10 definition in test-data.s) 37 - DV-related stuff: 38 <reg>.safe_across_calls and any other DV-related directives I don't 39 have documentation for. 40 verify mod-sched-brs reads/writes are checked/marked (and other 41 notes) 42 43 */ 44 45#include "as.h" 46#include "safe-ctype.h" 47#include "dwarf2dbg.h" 48#include "subsegs.h" 49 50#include "opcode/ia64.h" 51 52#include "elf/ia64.h" 53 54#ifdef HAVE_LIMITS_H 55#include <limits.h> 56#endif 57 58#define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0]))) 59 60/* Some systems define MIN in, e.g., param.h. */ 61#undef MIN 62#define MIN(a,b) ((a) < (b) ? (a) : (b)) 63 64#define NUM_SLOTS 4 65#define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS] 66#define CURR_SLOT md.slot[md.curr_slot] 67 68#define O_pseudo_fixup (O_max + 1) 69 70enum special_section 71 { 72 /* IA-64 ABI section pseudo-ops. */ 73 SPECIAL_SECTION_BSS = 0, 74 SPECIAL_SECTION_SBSS, 75 SPECIAL_SECTION_SDATA, 76 SPECIAL_SECTION_RODATA, 77 SPECIAL_SECTION_COMMENT, 78 SPECIAL_SECTION_UNWIND, 79 SPECIAL_SECTION_UNWIND_INFO, 80 /* HPUX specific section pseudo-ops. */ 81 SPECIAL_SECTION_INIT_ARRAY, 82 SPECIAL_SECTION_FINI_ARRAY, 83 }; 84 85enum reloc_func 86 { 87 FUNC_DTP_MODULE, 88 FUNC_DTP_RELATIVE, 89 FUNC_FPTR_RELATIVE, 90 FUNC_GP_RELATIVE, 91 FUNC_LT_RELATIVE, 92 FUNC_LT_RELATIVE_X, 93 FUNC_PC_RELATIVE, 94 FUNC_PLT_RELATIVE, 95 FUNC_SEC_RELATIVE, 96 FUNC_SEG_RELATIVE, 97 FUNC_TP_RELATIVE, 98 FUNC_LTV_RELATIVE, 99 FUNC_LT_FPTR_RELATIVE, 100 FUNC_LT_DTP_MODULE, 101 FUNC_LT_DTP_RELATIVE, 102 FUNC_LT_TP_RELATIVE, 103 FUNC_IPLT_RELOC, 104 }; 105 106enum reg_symbol 107 { 108 REG_GR = 0, 109 REG_FR = (REG_GR + 128), 110 REG_AR = (REG_FR + 128), 111 REG_CR = (REG_AR + 128), 112 REG_P = (REG_CR + 128), 113 REG_BR = (REG_P + 64), 114 REG_IP = (REG_BR + 8), 115 REG_CFM, 116 REG_PR, 117 REG_PR_ROT, 118 REG_PSR, 119 REG_PSR_L, 120 REG_PSR_UM, 121 /* The following are pseudo-registers for use by gas only. */ 122 IND_CPUID, 123 IND_DBR, 124 IND_DTR, 125 IND_ITR, 126 IND_IBR, 127 IND_MSR, 128 IND_PKR, 129 IND_PMC, 130 IND_PMD, 131 IND_RR, 132 /* The following pseudo-registers are used for unwind directives only: */ 133 REG_PSP, 134 REG_PRIUNAT, 135 REG_NUM 136 }; 137 138enum dynreg_type 139 { 140 DYNREG_GR = 0, /* dynamic general purpose register */ 141 DYNREG_FR, /* dynamic floating point register */ 142 DYNREG_PR, /* dynamic predicate register */ 143 DYNREG_NUM_TYPES 144 }; 145 146enum operand_match_result 147 { 148 OPERAND_MATCH, 149 OPERAND_OUT_OF_RANGE, 150 OPERAND_MISMATCH 151 }; 152 153/* On the ia64, we can't know the address of a text label until the 154 instructions are packed into a bundle. To handle this, we keep 155 track of the list of labels that appear in front of each 156 instruction. */ 157struct label_fix 158{ 159 struct label_fix *next; 160 struct symbol *sym; 161 bfd_boolean dw2_mark_labels; 162}; 163 164/* This is the endianness of the current section. */ 165extern int target_big_endian; 166 167/* This is the default endianness. */ 168static int default_big_endian = TARGET_BYTES_BIG_ENDIAN; 169 170void (*ia64_number_to_chars) PARAMS ((char *, valueT, int)); 171 172static void ia64_float_to_chars_bigendian 173 PARAMS ((char *, LITTLENUM_TYPE *, int)); 174static void ia64_float_to_chars_littleendian 175 PARAMS ((char *, LITTLENUM_TYPE *, int)); 176static void (*ia64_float_to_chars) 177 PARAMS ((char *, LITTLENUM_TYPE *, int)); 178 179static struct hash_control *alias_hash; 180static struct hash_control *alias_name_hash; 181static struct hash_control *secalias_hash; 182static struct hash_control *secalias_name_hash; 183 184/* List of chars besides those in app.c:symbol_chars that can start an 185 operand. Used to prevent the scrubber eating vital white-space. */ 186const char ia64_symbol_chars[] = "@?"; 187 188/* Characters which always start a comment. */ 189const char comment_chars[] = ""; 190 191/* Characters which start a comment at the beginning of a line. */ 192const char line_comment_chars[] = "#"; 193 194/* Characters which may be used to separate multiple commands on a 195 single line. */ 196const char line_separator_chars[] = ";{}"; 197 198/* Characters which are used to indicate an exponent in a floating 199 point number. */ 200const char EXP_CHARS[] = "eE"; 201 202/* Characters which mean that a number is a floating point constant, 203 as in 0d1.0. */ 204const char FLT_CHARS[] = "rRsSfFdDxXpP"; 205 206/* ia64-specific option processing: */ 207 208const char *md_shortopts = "m:N:x::"; 209 210struct option md_longopts[] = 211 { 212#define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1) 213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP}, 214#define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2) 215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC} 216 }; 217 218size_t md_longopts_size = sizeof (md_longopts); 219 220static struct 221 { 222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */ 223 struct hash_control *reg_hash; /* register name hash table */ 224 struct hash_control *dynreg_hash; /* dynamic register hash table */ 225 struct hash_control *const_hash; /* constant hash table */ 226 struct hash_control *entry_hash; /* code entry hint hash table */ 227 228 /* If X_op is != O_absent, the registername for the instruction's 229 qualifying predicate. If NULL, p0 is assumed for instructions 230 that are predicatable. */ 231 expressionS qp; 232 233 /* Optimize for which CPU. */ 234 enum 235 { 236 itanium1, 237 itanium2 238 } tune; 239 240 /* What to do when hint.b is used. */ 241 enum 242 { 243 hint_b_error, 244 hint_b_warning, 245 hint_b_ok 246 } hint_b; 247 248 unsigned int 249 manual_bundling : 1, 250 debug_dv: 1, 251 detect_dv: 1, 252 explicit_mode : 1, /* which mode we're in */ 253 default_explicit_mode : 1, /* which mode is the default */ 254 mode_explicitly_set : 1, /* was the current mode explicitly set? */ 255 auto_align : 1, 256 keep_pending_output : 1; 257 258 /* What to do when something is wrong with unwind directives. */ 259 enum 260 { 261 unwind_check_warning, 262 unwind_check_error 263 } unwind_check; 264 265 /* Each bundle consists of up to three instructions. We keep 266 track of four most recent instructions so we can correctly set 267 the end_of_insn_group for the last instruction in a bundle. */ 268 int curr_slot; 269 int num_slots_in_use; 270 struct slot 271 { 272 unsigned int 273 end_of_insn_group : 1, 274 manual_bundling_on : 1, 275 manual_bundling_off : 1, 276 loc_directive_seen : 1; 277 signed char user_template; /* user-selected template, if any */ 278 unsigned char qp_regno; /* qualifying predicate */ 279 /* This duplicates a good fraction of "struct fix" but we 280 can't use a "struct fix" instead since we can't call 281 fix_new_exp() until we know the address of the instruction. */ 282 int num_fixups; 283 struct insn_fix 284 { 285 bfd_reloc_code_real_type code; 286 enum ia64_opnd opnd; /* type of operand in need of fix */ 287 unsigned int is_pcrel : 1; /* is operand pc-relative? */ 288 expressionS expr; /* the value to be inserted */ 289 } 290 fixup[2]; /* at most two fixups per insn */ 291 struct ia64_opcode *idesc; 292 struct label_fix *label_fixups; 293 struct label_fix *tag_fixups; 294 struct unw_rec_list *unwind_record; /* Unwind directive. */ 295 expressionS opnd[6]; 296 char *src_file; 297 unsigned int src_line; 298 struct dwarf2_line_info debug_line; 299 } 300 slot[NUM_SLOTS]; 301 302 segT last_text_seg; 303 304 struct dynreg 305 { 306 struct dynreg *next; /* next dynamic register */ 307 const char *name; 308 unsigned short base; /* the base register number */ 309 unsigned short num_regs; /* # of registers in this set */ 310 } 311 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot; 312 313 flagword flags; /* ELF-header flags */ 314 315 struct mem_offset { 316 unsigned hint:1; /* is this hint currently valid? */ 317 bfd_vma offset; /* mem.offset offset */ 318 bfd_vma base; /* mem.offset base */ 319 } mem_offset; 320 321 int path; /* number of alt. entry points seen */ 322 const char **entry_labels; /* labels of all alternate paths in 323 the current DV-checking block. */ 324 int maxpaths; /* size currently allocated for 325 entry_labels */ 326 327 int pointer_size; /* size in bytes of a pointer */ 328 int pointer_size_shift; /* shift size of a pointer for alignment */ 329 330 symbolS *indregsym[IND_RR - IND_CPUID + 1]; 331 } 332md; 333 334/* These are not const, because they are modified to MMI for non-itanium1 335 targets below. */ 336/* MFI bundle of nops. */ 337static unsigned char le_nop[16] = 338{ 339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 341}; 342/* MFI bundle of nops with stop-bit. */ 343static unsigned char le_nop_stop[16] = 344{ 345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00 347}; 348 349/* application registers: */ 350 351#define AR_K0 0 352#define AR_K7 7 353#define AR_RSC 16 354#define AR_BSP 17 355#define AR_BSPSTORE 18 356#define AR_RNAT 19 357#define AR_FCR 21 358#define AR_EFLAG 24 359#define AR_CSD 25 360#define AR_SSD 26 361#define AR_CFLG 27 362#define AR_FSR 28 363#define AR_FIR 29 364#define AR_FDR 30 365#define AR_CCV 32 366#define AR_UNAT 36 367#define AR_FPSR 40 368#define AR_ITC 44 369#define AR_PFS 64 370#define AR_LC 65 371#define AR_EC 66 372 373static const struct 374 { 375 const char *name; 376 unsigned int regnum; 377 } 378ar[] = 379 { 380 {"ar.k0", AR_K0}, {"ar.k1", AR_K0 + 1}, 381 {"ar.k2", AR_K0 + 2}, {"ar.k3", AR_K0 + 3}, 382 {"ar.k4", AR_K0 + 4}, {"ar.k5", AR_K0 + 5}, 383 {"ar.k6", AR_K0 + 6}, {"ar.k7", AR_K7}, 384 {"ar.rsc", AR_RSC}, {"ar.bsp", AR_BSP}, 385 {"ar.bspstore", AR_BSPSTORE}, {"ar.rnat", AR_RNAT}, 386 {"ar.fcr", AR_FCR}, {"ar.eflag", AR_EFLAG}, 387 {"ar.csd", AR_CSD}, {"ar.ssd", AR_SSD}, 388 {"ar.cflg", AR_CFLG}, {"ar.fsr", AR_FSR}, 389 {"ar.fir", AR_FIR}, {"ar.fdr", AR_FDR}, 390 {"ar.ccv", AR_CCV}, {"ar.unat", AR_UNAT}, 391 {"ar.fpsr", AR_FPSR}, {"ar.itc", AR_ITC}, 392 {"ar.pfs", AR_PFS}, {"ar.lc", AR_LC}, 393 {"ar.ec", AR_EC}, 394 }; 395 396/* control registers: */ 397 398#define CR_DCR 0 399#define CR_ITM 1 400#define CR_IVA 2 401#define CR_PTA 8 402#define CR_GPTA 9 403#define CR_IPSR 16 404#define CR_ISR 17 405#define CR_IIP 19 406#define CR_IFA 20 407#define CR_ITIR 21 408#define CR_IIPA 22 409#define CR_IFS 23 410#define CR_IIM 24 411#define CR_IHA 25 412#define CR_LID 64 413#define CR_IVR 65 414#define CR_TPR 66 415#define CR_EOI 67 416#define CR_IRR0 68 417#define CR_IRR3 71 418#define CR_ITV 72 419#define CR_PMV 73 420#define CR_CMCV 74 421#define CR_LRR0 80 422#define CR_LRR1 81 423 424static const struct 425 { 426 const char *name; 427 unsigned int regnum; 428 } 429cr[] = 430 { 431 {"cr.dcr", CR_DCR}, 432 {"cr.itm", CR_ITM}, 433 {"cr.iva", CR_IVA}, 434 {"cr.pta", CR_PTA}, 435 {"cr.gpta", CR_GPTA}, 436 {"cr.ipsr", CR_IPSR}, 437 {"cr.isr", CR_ISR}, 438 {"cr.iip", CR_IIP}, 439 {"cr.ifa", CR_IFA}, 440 {"cr.itir", CR_ITIR}, 441 {"cr.iipa", CR_IIPA}, 442 {"cr.ifs", CR_IFS}, 443 {"cr.iim", CR_IIM}, 444 {"cr.iha", CR_IHA}, 445 {"cr.lid", CR_LID}, 446 {"cr.ivr", CR_IVR}, 447 {"cr.tpr", CR_TPR}, 448 {"cr.eoi", CR_EOI}, 449 {"cr.irr0", CR_IRR0}, 450 {"cr.irr1", CR_IRR0 + 1}, 451 {"cr.irr2", CR_IRR0 + 2}, 452 {"cr.irr3", CR_IRR3}, 453 {"cr.itv", CR_ITV}, 454 {"cr.pmv", CR_PMV}, 455 {"cr.cmcv", CR_CMCV}, 456 {"cr.lrr0", CR_LRR0}, 457 {"cr.lrr1", CR_LRR1} 458 }; 459 460#define PSR_MFL 4 461#define PSR_IC 13 462#define PSR_DFL 18 463#define PSR_CPL 32 464 465static const struct const_desc 466 { 467 const char *name; 468 valueT value; 469 } 470const_bits[] = 471 { 472 /* PSR constant masks: */ 473 474 /* 0: reserved */ 475 {"psr.be", ((valueT) 1) << 1}, 476 {"psr.up", ((valueT) 1) << 2}, 477 {"psr.ac", ((valueT) 1) << 3}, 478 {"psr.mfl", ((valueT) 1) << 4}, 479 {"psr.mfh", ((valueT) 1) << 5}, 480 /* 6-12: reserved */ 481 {"psr.ic", ((valueT) 1) << 13}, 482 {"psr.i", ((valueT) 1) << 14}, 483 {"psr.pk", ((valueT) 1) << 15}, 484 /* 16: reserved */ 485 {"psr.dt", ((valueT) 1) << 17}, 486 {"psr.dfl", ((valueT) 1) << 18}, 487 {"psr.dfh", ((valueT) 1) << 19}, 488 {"psr.sp", ((valueT) 1) << 20}, 489 {"psr.pp", ((valueT) 1) << 21}, 490 {"psr.di", ((valueT) 1) << 22}, 491 {"psr.si", ((valueT) 1) << 23}, 492 {"psr.db", ((valueT) 1) << 24}, 493 {"psr.lp", ((valueT) 1) << 25}, 494 {"psr.tb", ((valueT) 1) << 26}, 495 {"psr.rt", ((valueT) 1) << 27}, 496 /* 28-31: reserved */ 497 /* 32-33: cpl (current privilege level) */ 498 {"psr.is", ((valueT) 1) << 34}, 499 {"psr.mc", ((valueT) 1) << 35}, 500 {"psr.it", ((valueT) 1) << 36}, 501 {"psr.id", ((valueT) 1) << 37}, 502 {"psr.da", ((valueT) 1) << 38}, 503 {"psr.dd", ((valueT) 1) << 39}, 504 {"psr.ss", ((valueT) 1) << 40}, 505 /* 41-42: ri (restart instruction) */ 506 {"psr.ed", ((valueT) 1) << 43}, 507 {"psr.bn", ((valueT) 1) << 44}, 508 }; 509 510/* indirect register-sets/memory: */ 511 512static const struct 513 { 514 const char *name; 515 unsigned int regnum; 516 } 517indirect_reg[] = 518 { 519 { "CPUID", IND_CPUID }, 520 { "cpuid", IND_CPUID }, 521 { "dbr", IND_DBR }, 522 { "dtr", IND_DTR }, 523 { "itr", IND_ITR }, 524 { "ibr", IND_IBR }, 525 { "msr", IND_MSR }, 526 { "pkr", IND_PKR }, 527 { "pmc", IND_PMC }, 528 { "pmd", IND_PMD }, 529 { "rr", IND_RR }, 530 }; 531 532/* Pseudo functions used to indicate relocation types (these functions 533 start with an at sign (@). */ 534static struct 535 { 536 const char *name; 537 enum pseudo_type 538 { 539 PSEUDO_FUNC_NONE, 540 PSEUDO_FUNC_RELOC, 541 PSEUDO_FUNC_CONST, 542 PSEUDO_FUNC_REG, 543 PSEUDO_FUNC_FLOAT 544 } 545 type; 546 union 547 { 548 unsigned long ival; 549 symbolS *sym; 550 } 551 u; 552 } 553pseudo_func[] = 554 { 555 /* reloc pseudo functions (these must come first!): */ 556 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } }, 557 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } }, 558 { "fptr", PSEUDO_FUNC_RELOC, { 0 } }, 559 { "gprel", PSEUDO_FUNC_RELOC, { 0 } }, 560 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } }, 561 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } }, 562 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } }, 563 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } }, 564 { "secrel", PSEUDO_FUNC_RELOC, { 0 } }, 565 { "segrel", PSEUDO_FUNC_RELOC, { 0 } }, 566 { "tprel", PSEUDO_FUNC_RELOC, { 0 } }, 567 { "ltv", PSEUDO_FUNC_RELOC, { 0 } }, 568 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */ 569 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */ 570 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */ 571 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */ 572 { "iplt", PSEUDO_FUNC_RELOC, { 0 } }, 573 574 /* mbtype4 constants: */ 575 { "alt", PSEUDO_FUNC_CONST, { 0xa } }, 576 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } }, 577 { "mix", PSEUDO_FUNC_CONST, { 0x8 } }, 578 { "rev", PSEUDO_FUNC_CONST, { 0xb } }, 579 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, 580 581 /* fclass constants: */ 582 { "nat", PSEUDO_FUNC_CONST, { 0x100 } }, 583 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, 584 { "snan", PSEUDO_FUNC_CONST, { 0x040 } }, 585 { "pos", PSEUDO_FUNC_CONST, { 0x001 } }, 586 { "neg", PSEUDO_FUNC_CONST, { 0x002 } }, 587 { "zero", PSEUDO_FUNC_CONST, { 0x004 } }, 588 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, 589 { "norm", PSEUDO_FUNC_CONST, { 0x010 } }, 590 { "inf", PSEUDO_FUNC_CONST, { 0x020 } }, 591 592 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */ 593 594 /* hint constants: */ 595 { "pause", PSEUDO_FUNC_CONST, { 0x0 } }, 596 597 /* unwind-related constants: */ 598 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } }, 599 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } }, 600 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */ 601 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } }, 602 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } }, 603 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } }, 604 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } }, 605 606 /* unwind-related registers: */ 607 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } } 608 }; 609 610/* 41-bit nop opcodes (one per unit): */ 611static const bfd_vma nop[IA64_NUM_UNITS] = 612 { 613 0x0000000000LL, /* NIL => break 0 */ 614 0x0008000000LL, /* I-unit nop */ 615 0x0008000000LL, /* M-unit nop */ 616 0x4000000000LL, /* B-unit nop */ 617 0x0008000000LL, /* F-unit nop */ 618 0x0000000000LL, /* L-"unit" nop immediate */ 619 0x0008000000LL, /* X-unit nop */ 620 }; 621 622/* Can't be `const' as it's passed to input routines (which have the 623 habit of setting temporary sentinels. */ 624static char special_section_name[][20] = 625 { 626 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"}, 627 {".IA_64.unwind"}, {".IA_64.unwind_info"}, 628 {".init_array"}, {".fini_array"} 629 }; 630 631/* The best template for a particular sequence of up to three 632 instructions: */ 633#define N IA64_NUM_TYPES 634static unsigned char best_template[N][N][N]; 635#undef N 636 637/* Resource dependencies currently in effect */ 638static struct rsrc { 639 int depind; /* dependency index */ 640 const struct ia64_dependency *dependency; /* actual dependency */ 641 unsigned specific:1, /* is this a specific bit/regno? */ 642 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/ 643 int index; /* specific regno/bit within dependency */ 644 int note; /* optional qualifying note (0 if none) */ 645#define STATE_NONE 0 646#define STATE_STOP 1 647#define STATE_SRLZ 2 648 int insn_srlz; /* current insn serialization state */ 649 int data_srlz; /* current data serialization state */ 650 int qp_regno; /* qualifying predicate for this usage */ 651 char *file; /* what file marked this dependency */ 652 unsigned int line; /* what line marked this dependency */ 653 struct mem_offset mem_offset; /* optional memory offset hint */ 654 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */ 655 int path; /* corresponding code entry index */ 656} *regdeps = NULL; 657static int regdepslen = 0; 658static int regdepstotlen = 0; 659static const char *dv_mode[] = { "RAW", "WAW", "WAR" }; 660static const char *dv_sem[] = { "none", "implied", "impliedf", 661 "data", "instr", "specific", "stop", "other" }; 662static const char *dv_cmp_type[] = { "none", "OR", "AND" }; 663 664/* Current state of PR mutexation */ 665static struct qpmutex { 666 valueT prmask; 667 int path; 668} *qp_mutexes = NULL; /* QP mutex bitmasks */ 669static int qp_mutexeslen = 0; 670static int qp_mutexestotlen = 0; 671static valueT qp_safe_across_calls = 0; 672 673/* Current state of PR implications */ 674static struct qp_imply { 675 unsigned p1:6; 676 unsigned p2:6; 677 unsigned p2_branched:1; 678 int path; 679} *qp_implies = NULL; 680static int qp_implieslen = 0; 681static int qp_impliestotlen = 0; 682 683/* Keep track of static GR values so that indirect register usage can 684 sometimes be tracked. */ 685static struct gr { 686 unsigned known:1; 687 int path; 688 valueT value; 689} gr_values[128] = { 690 { 691 1, 692#ifdef INT_MAX 693 INT_MAX, 694#else 695 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1, 696#endif 697 0 698 } 699}; 700 701/* Remember the alignment frag. */ 702static fragS *align_frag; 703 704/* These are the routines required to output the various types of 705 unwind records. */ 706 707/* A slot_number is a frag address plus the slot index (0-2). We use the 708 frag address here so that if there is a section switch in the middle of 709 a function, then instructions emitted to a different section are not 710 counted. Since there may be more than one frag for a function, this 711 means we also need to keep track of which frag this address belongs to 712 so we can compute inter-frag distances. This also nicely solves the 713 problem with nops emitted for align directives, which can't easily be 714 counted, but can easily be derived from frag sizes. */ 715 716typedef struct unw_rec_list { 717 unwind_record r; 718 unsigned long slot_number; 719 fragS *slot_frag; 720 struct unw_rec_list *next; 721} unw_rec_list; 722 723#define SLOT_NUM_NOT_SET (unsigned)-1 724 725/* Linked list of saved prologue counts. A very poor 726 implementation of a map from label numbers to prologue counts. */ 727typedef struct label_prologue_count 728{ 729 struct label_prologue_count *next; 730 unsigned long label_number; 731 unsigned int prologue_count; 732} label_prologue_count; 733 734typedef struct proc_pending 735{ 736 symbolS *sym; 737 struct proc_pending *next; 738} proc_pending; 739 740static struct 741{ 742 /* Maintain a list of unwind entries for the current function. */ 743 unw_rec_list *list; 744 unw_rec_list *tail; 745 746 /* Any unwind entires that should be attached to the current slot 747 that an insn is being constructed for. */ 748 unw_rec_list *current_entry; 749 750 /* These are used to create the unwind table entry for this function. */ 751 proc_pending proc_pending; 752 symbolS *info; /* pointer to unwind info */ 753 symbolS *personality_routine; 754 segT saved_text_seg; 755 subsegT saved_text_subseg; 756 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */ 757 758 /* TRUE if processing unwind directives in a prologue region. */ 759 unsigned int prologue : 1; 760 unsigned int prologue_mask : 4; 761 unsigned int prologue_gr : 7; 762 unsigned int body : 1; 763 unsigned int insn : 1; 764 unsigned int prologue_count; /* number of .prologues seen so far */ 765 /* Prologue counts at previous .label_state directives. */ 766 struct label_prologue_count * saved_prologue_counts; 767 768 /* List of split up .save-s. */ 769 unw_p_record *pending_saves; 770} unwind; 771 772/* The input value is a negated offset from psp, and specifies an address 773 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we 774 must add 16 and divide by 4 to get the encoded value. */ 775 776#define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4) 777 778typedef void (*vbyte_func) PARAMS ((int, char *, char *)); 779 780/* Forward declarations: */ 781static void set_section PARAMS ((char *name)); 782static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, 783 unsigned int, unsigned int)); 784static void dot_align (int); 785static void dot_radix PARAMS ((int)); 786static void dot_special_section PARAMS ((int)); 787static void dot_proc PARAMS ((int)); 788static void dot_fframe PARAMS ((int)); 789static void dot_vframe PARAMS ((int)); 790static void dot_vframesp PARAMS ((int)); 791static void dot_save PARAMS ((int)); 792static void dot_restore PARAMS ((int)); 793static void dot_restorereg PARAMS ((int)); 794static void dot_handlerdata PARAMS ((int)); 795static void dot_unwentry PARAMS ((int)); 796static void dot_altrp PARAMS ((int)); 797static void dot_savemem PARAMS ((int)); 798static void dot_saveg PARAMS ((int)); 799static void dot_savef PARAMS ((int)); 800static void dot_saveb PARAMS ((int)); 801static void dot_savegf PARAMS ((int)); 802static void dot_spill PARAMS ((int)); 803static void dot_spillreg PARAMS ((int)); 804static void dot_spillmem PARAMS ((int)); 805static void dot_label_state PARAMS ((int)); 806static void dot_copy_state PARAMS ((int)); 807static void dot_unwabi PARAMS ((int)); 808static void dot_personality PARAMS ((int)); 809static void dot_body PARAMS ((int)); 810static void dot_prologue PARAMS ((int)); 811static void dot_endp PARAMS ((int)); 812static void dot_template PARAMS ((int)); 813static void dot_regstk PARAMS ((int)); 814static void dot_rot PARAMS ((int)); 815static void dot_byteorder PARAMS ((int)); 816static void dot_psr PARAMS ((int)); 817static void dot_alias PARAMS ((int)); 818static void dot_ln PARAMS ((int)); 819static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua)); 820static void dot_xdata PARAMS ((int)); 821static void stmt_float_cons PARAMS ((int)); 822static void stmt_cons_ua PARAMS ((int)); 823static void dot_xfloat_cons PARAMS ((int)); 824static void dot_xstringer PARAMS ((int)); 825static void dot_xdata_ua PARAMS ((int)); 826static void dot_xfloat_cons_ua PARAMS ((int)); 827static void print_prmask PARAMS ((valueT mask)); 828static void dot_pred_rel PARAMS ((int)); 829static void dot_reg_val PARAMS ((int)); 830static void dot_serialize PARAMS ((int)); 831static void dot_dv_mode PARAMS ((int)); 832static void dot_entry PARAMS ((int)); 833static void dot_mem_offset PARAMS ((int)); 834static void add_unwind_entry PARAMS((unw_rec_list *, int)); 835static symbolS *declare_register PARAMS ((const char *name, unsigned int regnum)); 836static void declare_register_set PARAMS ((const char *, unsigned int, unsigned int)); 837static unsigned int operand_width PARAMS ((enum ia64_opnd)); 838static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc, 839 int index, 840 expressionS *e)); 841static int parse_operand PARAMS ((expressionS *, int)); 842static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *)); 843static void build_insn PARAMS ((struct slot *, bfd_vma *)); 844static void emit_one_bundle PARAMS ((void)); 845static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT)); 846static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym, 847 bfd_reloc_code_real_type r_type)); 848static void insn_group_break PARAMS ((int, int, int)); 849static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *, 850 struct rsrc *, int depind, int path)); 851static void add_qp_mutex PARAMS((valueT mask)); 852static void add_qp_imply PARAMS((int p1, int p2)); 853static void clear_qp_branch_flag PARAMS((valueT mask)); 854static void clear_qp_mutex PARAMS((valueT mask)); 855static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask)); 856static int has_suffix_p PARAMS((const char *, const char *)); 857static void clear_register_values PARAMS ((void)); 858static void print_dependency PARAMS ((const char *action, int depind)); 859static void instruction_serialization PARAMS ((void)); 860static void data_serialization PARAMS ((void)); 861static void remove_marked_resource PARAMS ((struct rsrc *)); 862static int is_conditional_branch PARAMS ((struct ia64_opcode *)); 863static int is_taken_branch PARAMS ((struct ia64_opcode *)); 864static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *)); 865static int depends_on PARAMS ((int, struct ia64_opcode *)); 866static int specify_resource PARAMS ((const struct ia64_dependency *, 867 struct ia64_opcode *, int, struct rsrc [], int, int)); 868static int check_dv PARAMS((struct ia64_opcode *idesc)); 869static void check_dependencies PARAMS((struct ia64_opcode *)); 870static void mark_resources PARAMS((struct ia64_opcode *)); 871static void update_dependencies PARAMS((struct ia64_opcode *)); 872static void note_register_values PARAMS((struct ia64_opcode *)); 873static int qp_mutex PARAMS ((int, int, int)); 874static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int)); 875static void output_vbyte_mem PARAMS ((int, char *, char *)); 876static void count_output PARAMS ((int, char *, char *)); 877static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int)); 878static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long)); 879static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); 880static void output_P1_format PARAMS ((vbyte_func, int)); 881static void output_P2_format PARAMS ((vbyte_func, int, int)); 882static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int)); 883static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long)); 884static void output_P5_format PARAMS ((vbyte_func, int, unsigned long)); 885static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int)); 886static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long)); 887static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); 888static void output_P9_format PARAMS ((vbyte_func, int, int)); 889static void output_P10_format PARAMS ((vbyte_func, int, int)); 890static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); 891static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long)); 892static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long)); 893static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long)); 894static char format_ab_reg PARAMS ((int, int)); 895static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long, 896 unsigned long)); 897static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long)); 898static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long, 899 unsigned long)); 900static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long)); 901static unw_rec_list *output_endp PARAMS ((void)); 902static unw_rec_list *output_prologue PARAMS ((void)); 903static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int)); 904static unw_rec_list *output_body PARAMS ((void)); 905static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int)); 906static unw_rec_list *output_mem_stack_v PARAMS ((void)); 907static unw_rec_list *output_psp_gr PARAMS ((unsigned int)); 908static unw_rec_list *output_psp_sprel PARAMS ((unsigned int)); 909static unw_rec_list *output_rp_when PARAMS ((void)); 910static unw_rec_list *output_rp_gr PARAMS ((unsigned int)); 911static unw_rec_list *output_rp_br PARAMS ((unsigned int)); 912static unw_rec_list *output_rp_psprel PARAMS ((unsigned int)); 913static unw_rec_list *output_rp_sprel PARAMS ((unsigned int)); 914static unw_rec_list *output_pfs_when PARAMS ((void)); 915static unw_rec_list *output_pfs_gr PARAMS ((unsigned int)); 916static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int)); 917static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int)); 918static unw_rec_list *output_preds_when PARAMS ((void)); 919static unw_rec_list *output_preds_gr PARAMS ((unsigned int)); 920static unw_rec_list *output_preds_psprel PARAMS ((unsigned int)); 921static unw_rec_list *output_preds_sprel PARAMS ((unsigned int)); 922static unw_rec_list *output_fr_mem PARAMS ((unsigned int)); 923static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int)); 924static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int)); 925static unw_rec_list *output_gr_mem PARAMS ((unsigned int)); 926static unw_rec_list *output_br_mem PARAMS ((unsigned int)); 927static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int)); 928static unw_rec_list *output_spill_base PARAMS ((unsigned int)); 929static unw_rec_list *output_unat_when PARAMS ((void)); 930static unw_rec_list *output_unat_gr PARAMS ((unsigned int)); 931static unw_rec_list *output_unat_psprel PARAMS ((unsigned int)); 932static unw_rec_list *output_unat_sprel PARAMS ((unsigned int)); 933static unw_rec_list *output_lc_when PARAMS ((void)); 934static unw_rec_list *output_lc_gr PARAMS ((unsigned int)); 935static unw_rec_list *output_lc_psprel PARAMS ((unsigned int)); 936static unw_rec_list *output_lc_sprel PARAMS ((unsigned int)); 937static unw_rec_list *output_fpsr_when PARAMS ((void)); 938static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int)); 939static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int)); 940static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int)); 941static unw_rec_list *output_priunat_when_gr PARAMS ((void)); 942static unw_rec_list *output_priunat_when_mem PARAMS ((void)); 943static unw_rec_list *output_priunat_gr PARAMS ((unsigned int)); 944static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int)); 945static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int)); 946static unw_rec_list *output_bsp_when PARAMS ((void)); 947static unw_rec_list *output_bsp_gr PARAMS ((unsigned int)); 948static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int)); 949static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int)); 950static unw_rec_list *output_bspstore_when PARAMS ((void)); 951static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int)); 952static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int)); 953static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int)); 954static unw_rec_list *output_rnat_when PARAMS ((void)); 955static unw_rec_list *output_rnat_gr PARAMS ((unsigned int)); 956static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int)); 957static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int)); 958static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long)); 959static unw_rec_list *output_epilogue PARAMS ((unsigned long)); 960static unw_rec_list *output_label_state PARAMS ((unsigned long)); 961static unw_rec_list *output_copy_state PARAMS ((unsigned long)); 962static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int, 963 unsigned int)); 964static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int, 965 unsigned int)); 966static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int, 967 unsigned int, unsigned int)); 968static void process_one_record PARAMS ((unw_rec_list *, vbyte_func)); 969static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); 970static int calc_record_size PARAMS ((unw_rec_list *)); 971static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); 972static unsigned long slot_index PARAMS ((unsigned long, fragS *, 973 unsigned long, fragS *, 974 int)); 975static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); 976static void fixup_unw_records PARAMS ((unw_rec_list *, int)); 977static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *)); 978static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); 979static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int)); 980static unsigned int get_saved_prologue_count PARAMS ((unsigned long)); 981static void save_prologue_count PARAMS ((unsigned long, unsigned int)); 982static void free_saved_prologue_counts PARAMS ((void)); 983 984/* Determine if application register REGNUM resides only in the integer 985 unit (as opposed to the memory unit). */ 986static int 987ar_is_only_in_integer_unit (int reg) 988{ 989 reg -= REG_AR; 990 return reg >= 64 && reg <= 111; 991} 992 993/* Determine if application register REGNUM resides only in the memory 994 unit (as opposed to the integer unit). */ 995static int 996ar_is_only_in_memory_unit (int reg) 997{ 998 reg -= REG_AR; 999 return reg >= 0 && reg <= 47; 1000} 1001 1002/* Switch to section NAME and create section if necessary. It's 1003 rather ugly that we have to manipulate input_line_pointer but I 1004 don't see any other way to accomplish the same thing without 1005 changing obj-elf.c (which may be the Right Thing, in the end). */ 1006static void 1007set_section (name) 1008 char *name; 1009{ 1010 char *saved_input_line_pointer; 1011 1012 saved_input_line_pointer = input_line_pointer; 1013 input_line_pointer = name; 1014 obj_elf_section (0); 1015 input_line_pointer = saved_input_line_pointer; 1016} 1017 1018/* Map 's' to SHF_IA_64_SHORT. */ 1019 1020int 1021ia64_elf_section_letter (letter, ptr_msg) 1022 int letter; 1023 char **ptr_msg; 1024{ 1025 if (letter == 's') 1026 return SHF_IA_64_SHORT; 1027 else if (letter == 'o') 1028 return SHF_LINK_ORDER; 1029 1030 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string"); 1031 return -1; 1032} 1033 1034/* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */ 1035 1036flagword 1037ia64_elf_section_flags (flags, attr, type) 1038 flagword flags; 1039 int attr, type ATTRIBUTE_UNUSED; 1040{ 1041 if (attr & SHF_IA_64_SHORT) 1042 flags |= SEC_SMALL_DATA; 1043 return flags; 1044} 1045 1046int 1047ia64_elf_section_type (str, len) 1048 const char *str; 1049 size_t len; 1050{ 1051#define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0)) 1052 1053 if (STREQ (ELF_STRING_ia64_unwind_info)) 1054 return SHT_PROGBITS; 1055 1056 if (STREQ (ELF_STRING_ia64_unwind_info_once)) 1057 return SHT_PROGBITS; 1058 1059 if (STREQ (ELF_STRING_ia64_unwind)) 1060 return SHT_IA_64_UNWIND; 1061 1062 if (STREQ (ELF_STRING_ia64_unwind_once)) 1063 return SHT_IA_64_UNWIND; 1064 1065 if (STREQ ("unwind")) 1066 return SHT_IA_64_UNWIND; 1067 1068 return -1; 1069#undef STREQ 1070} 1071 1072static unsigned int 1073set_regstack (ins, locs, outs, rots) 1074 unsigned int ins, locs, outs, rots; 1075{ 1076 /* Size of frame. */ 1077 unsigned int sof; 1078 1079 sof = ins + locs + outs; 1080 if (sof > 96) 1081 { 1082 as_bad ("Size of frame exceeds maximum of 96 registers"); 1083 return 0; 1084 } 1085 if (rots > sof) 1086 { 1087 as_warn ("Size of rotating registers exceeds frame size"); 1088 return 0; 1089 } 1090 md.in.base = REG_GR + 32; 1091 md.loc.base = md.in.base + ins; 1092 md.out.base = md.loc.base + locs; 1093 1094 md.in.num_regs = ins; 1095 md.loc.num_regs = locs; 1096 md.out.num_regs = outs; 1097 md.rot.num_regs = rots; 1098 return sof; 1099} 1100 1101void 1102ia64_flush_insns () 1103{ 1104 struct label_fix *lfix; 1105 segT saved_seg; 1106 subsegT saved_subseg; 1107 unw_rec_list *ptr; 1108 bfd_boolean mark; 1109 1110 if (!md.last_text_seg) 1111 return; 1112 1113 saved_seg = now_seg; 1114 saved_subseg = now_subseg; 1115 1116 subseg_set (md.last_text_seg, 0); 1117 1118 while (md.num_slots_in_use > 0) 1119 emit_one_bundle (); /* force out queued instructions */ 1120 1121 /* In case there are labels following the last instruction, resolve 1122 those now. */ 1123 mark = FALSE; 1124 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next) 1125 { 1126 symbol_set_value_now (lfix->sym); 1127 mark |= lfix->dw2_mark_labels; 1128 } 1129 if (mark) 1130 { 1131 dwarf2_where (&CURR_SLOT.debug_line); 1132 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; 1133 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line); 1134 } 1135 CURR_SLOT.label_fixups = 0; 1136 1137 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next) 1138 symbol_set_value_now (lfix->sym); 1139 CURR_SLOT.tag_fixups = 0; 1140 1141 /* In case there are unwind directives following the last instruction, 1142 resolve those now. We only handle prologue, body, and endp directives 1143 here. Give an error for others. */ 1144 for (ptr = unwind.current_entry; ptr; ptr = ptr->next) 1145 { 1146 switch (ptr->r.type) 1147 { 1148 case prologue: 1149 case prologue_gr: 1150 case body: 1151 case endp: 1152 ptr->slot_number = (unsigned long) frag_more (0); 1153 ptr->slot_frag = frag_now; 1154 break; 1155 1156 /* Allow any record which doesn't have a "t" field (i.e., 1157 doesn't relate to a particular instruction). */ 1158 case unwabi: 1159 case br_gr: 1160 case copy_state: 1161 case fr_mem: 1162 case frgr_mem: 1163 case gr_gr: 1164 case gr_mem: 1165 case label_state: 1166 case rp_br: 1167 case spill_base: 1168 case spill_mask: 1169 /* nothing */ 1170 break; 1171 1172 default: 1173 as_bad (_("Unwind directive not followed by an instruction.")); 1174 break; 1175 } 1176 } 1177 unwind.current_entry = NULL; 1178 1179 subseg_set (saved_seg, saved_subseg); 1180 1181 if (md.qp.X_op == O_register) 1182 as_bad ("qualifying predicate not followed by instruction"); 1183} 1184 1185static void 1186ia64_do_align (int nbytes) 1187{ 1188 char *saved_input_line_pointer = input_line_pointer; 1189 1190 input_line_pointer = ""; 1191 s_align_bytes (nbytes); 1192 input_line_pointer = saved_input_line_pointer; 1193} 1194 1195void 1196ia64_cons_align (nbytes) 1197 int nbytes; 1198{ 1199 if (md.auto_align) 1200 { 1201 char *saved_input_line_pointer = input_line_pointer; 1202 input_line_pointer = ""; 1203 s_align_bytes (nbytes); 1204 input_line_pointer = saved_input_line_pointer; 1205 } 1206} 1207 1208/* Output COUNT bytes to a memory location. */ 1209static char *vbyte_mem_ptr = NULL; 1210 1211void 1212output_vbyte_mem (count, ptr, comment) 1213 int count; 1214 char *ptr; 1215 char *comment ATTRIBUTE_UNUSED; 1216{ 1217 int x; 1218 if (vbyte_mem_ptr == NULL) 1219 abort (); 1220 1221 if (count == 0) 1222 return; 1223 for (x = 0; x < count; x++) 1224 *(vbyte_mem_ptr++) = ptr[x]; 1225} 1226 1227/* Count the number of bytes required for records. */ 1228static int vbyte_count = 0; 1229void 1230count_output (count, ptr, comment) 1231 int count; 1232 char *ptr ATTRIBUTE_UNUSED; 1233 char *comment ATTRIBUTE_UNUSED; 1234{ 1235 vbyte_count += count; 1236} 1237 1238static void 1239output_R1_format (f, rtype, rlen) 1240 vbyte_func f; 1241 unw_record_type rtype; 1242 int rlen; 1243{ 1244 int r = 0; 1245 char byte; 1246 if (rlen > 0x1f) 1247 { 1248 output_R3_format (f, rtype, rlen); 1249 return; 1250 } 1251 1252 if (rtype == body) 1253 r = 1; 1254 else if (rtype != prologue) 1255 as_bad ("record type is not valid"); 1256 1257 byte = UNW_R1 | (r << 5) | (rlen & 0x1f); 1258 (*f) (1, &byte, NULL); 1259} 1260 1261static void 1262output_R2_format (f, mask, grsave, rlen) 1263 vbyte_func f; 1264 int mask, grsave; 1265 unsigned long rlen; 1266{ 1267 char bytes[20]; 1268 int count = 2; 1269 mask = (mask & 0x0f); 1270 grsave = (grsave & 0x7f); 1271 1272 bytes[0] = (UNW_R2 | (mask >> 1)); 1273 bytes[1] = (((mask & 0x01) << 7) | grsave); 1274 count += output_leb128 (bytes + 2, rlen, 0); 1275 (*f) (count, bytes, NULL); 1276} 1277 1278static void 1279output_R3_format (f, rtype, rlen) 1280 vbyte_func f; 1281 unw_record_type rtype; 1282 unsigned long rlen; 1283{ 1284 int r = 0, count; 1285 char bytes[20]; 1286 if (rlen <= 0x1f) 1287 { 1288 output_R1_format (f, rtype, rlen); 1289 return; 1290 } 1291 1292 if (rtype == body) 1293 r = 1; 1294 else if (rtype != prologue) 1295 as_bad ("record type is not valid"); 1296 bytes[0] = (UNW_R3 | r); 1297 count = output_leb128 (bytes + 1, rlen, 0); 1298 (*f) (count + 1, bytes, NULL); 1299} 1300 1301static void 1302output_P1_format (f, brmask) 1303 vbyte_func f; 1304 int brmask; 1305{ 1306 char byte; 1307 byte = UNW_P1 | (brmask & 0x1f); 1308 (*f) (1, &byte, NULL); 1309} 1310 1311static void 1312output_P2_format (f, brmask, gr) 1313 vbyte_func f; 1314 int brmask; 1315 int gr; 1316{ 1317 char bytes[2]; 1318 brmask = (brmask & 0x1f); 1319 bytes[0] = UNW_P2 | (brmask >> 1); 1320 bytes[1] = (((brmask & 1) << 7) | gr); 1321 (*f) (2, bytes, NULL); 1322} 1323 1324static void 1325output_P3_format (f, rtype, reg) 1326 vbyte_func f; 1327 unw_record_type rtype; 1328 int reg; 1329{ 1330 char bytes[2]; 1331 int r = 0; 1332 reg = (reg & 0x7f); 1333 switch (rtype) 1334 { 1335 case psp_gr: 1336 r = 0; 1337 break; 1338 case rp_gr: 1339 r = 1; 1340 break; 1341 case pfs_gr: 1342 r = 2; 1343 break; 1344 case preds_gr: 1345 r = 3; 1346 break; 1347 case unat_gr: 1348 r = 4; 1349 break; 1350 case lc_gr: 1351 r = 5; 1352 break; 1353 case rp_br: 1354 r = 6; 1355 break; 1356 case rnat_gr: 1357 r = 7; 1358 break; 1359 case bsp_gr: 1360 r = 8; 1361 break; 1362 case bspstore_gr: 1363 r = 9; 1364 break; 1365 case fpsr_gr: 1366 r = 10; 1367 break; 1368 case priunat_gr: 1369 r = 11; 1370 break; 1371 default: 1372 as_bad ("Invalid record type for P3 format."); 1373 } 1374 bytes[0] = (UNW_P3 | (r >> 1)); 1375 bytes[1] = (((r & 1) << 7) | reg); 1376 (*f) (2, bytes, NULL); 1377} 1378 1379static void 1380output_P4_format (f, imask, imask_size) 1381 vbyte_func f; 1382 unsigned char *imask; 1383 unsigned long imask_size; 1384{ 1385 imask[0] = UNW_P4; 1386 (*f) (imask_size, (char *) imask, NULL); 1387} 1388 1389static void 1390output_P5_format (f, grmask, frmask) 1391 vbyte_func f; 1392 int grmask; 1393 unsigned long frmask; 1394{ 1395 char bytes[4]; 1396 grmask = (grmask & 0x0f); 1397 1398 bytes[0] = UNW_P5; 1399 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16)); 1400 bytes[2] = ((frmask & 0x0000ff00) >> 8); 1401 bytes[3] = (frmask & 0x000000ff); 1402 (*f) (4, bytes, NULL); 1403} 1404 1405static void 1406output_P6_format (f, rtype, rmask) 1407 vbyte_func f; 1408 unw_record_type rtype; 1409 int rmask; 1410{ 1411 char byte; 1412 int r = 0; 1413 1414 if (rtype == gr_mem) 1415 r = 1; 1416 else if (rtype != fr_mem) 1417 as_bad ("Invalid record type for format P6"); 1418 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f)); 1419 (*f) (1, &byte, NULL); 1420} 1421 1422static void 1423output_P7_format (f, rtype, w1, w2) 1424 vbyte_func f; 1425 unw_record_type rtype; 1426 unsigned long w1; 1427 unsigned long w2; 1428{ 1429 char bytes[20]; 1430 int count = 1; 1431 int r = 0; 1432 count += output_leb128 (bytes + 1, w1, 0); 1433 switch (rtype) 1434 { 1435 case mem_stack_f: 1436 r = 0; 1437 count += output_leb128 (bytes + count, w2 >> 4, 0); 1438 break; 1439 case mem_stack_v: 1440 r = 1; 1441 break; 1442 case spill_base: 1443 r = 2; 1444 break; 1445 case psp_sprel: 1446 r = 3; 1447 break; 1448 case rp_when: 1449 r = 4; 1450 break; 1451 case rp_psprel: 1452 r = 5; 1453 break; 1454 case pfs_when: 1455 r = 6; 1456 break; 1457 case pfs_psprel: 1458 r = 7; 1459 break; 1460 case preds_when: 1461 r = 8; 1462 break; 1463 case preds_psprel: 1464 r = 9; 1465 break; 1466 case lc_when: 1467 r = 10; 1468 break; 1469 case lc_psprel: 1470 r = 11; 1471 break; 1472 case unat_when: 1473 r = 12; 1474 break; 1475 case unat_psprel: 1476 r = 13; 1477 break; 1478 case fpsr_when: 1479 r = 14; 1480 break; 1481 case fpsr_psprel: 1482 r = 15; 1483 break; 1484 default: 1485 break; 1486 } 1487 bytes[0] = (UNW_P7 | r); 1488 (*f) (count, bytes, NULL); 1489} 1490 1491static void 1492output_P8_format (f, rtype, t) 1493 vbyte_func f; 1494 unw_record_type rtype; 1495 unsigned long t; 1496{ 1497 char bytes[20]; 1498 int r = 0; 1499 int count = 2; 1500 bytes[0] = UNW_P8; 1501 switch (rtype) 1502 { 1503 case rp_sprel: 1504 r = 1; 1505 break; 1506 case pfs_sprel: 1507 r = 2; 1508 break; 1509 case preds_sprel: 1510 r = 3; 1511 break; 1512 case lc_sprel: 1513 r = 4; 1514 break; 1515 case unat_sprel: 1516 r = 5; 1517 break; 1518 case fpsr_sprel: 1519 r = 6; 1520 break; 1521 case bsp_when: 1522 r = 7; 1523 break; 1524 case bsp_psprel: 1525 r = 8; 1526 break; 1527 case bsp_sprel: 1528 r = 9; 1529 break; 1530 case bspstore_when: 1531 r = 10; 1532 break; 1533 case bspstore_psprel: 1534 r = 11; 1535 break; 1536 case bspstore_sprel: 1537 r = 12; 1538 break; 1539 case rnat_when: 1540 r = 13; 1541 break; 1542 case rnat_psprel: 1543 r = 14; 1544 break; 1545 case rnat_sprel: 1546 r = 15; 1547 break; 1548 case priunat_when_gr: 1549 r = 16; 1550 break; 1551 case priunat_psprel: 1552 r = 17; 1553 break; 1554 case priunat_sprel: 1555 r = 18; 1556 break; 1557 case priunat_when_mem: 1558 r = 19; 1559 break; 1560 default: 1561 break; 1562 } 1563 bytes[1] = r; 1564 count += output_leb128 (bytes + 2, t, 0); 1565 (*f) (count, bytes, NULL); 1566} 1567 1568static void 1569output_P9_format (f, grmask, gr) 1570 vbyte_func f; 1571 int grmask; 1572 int gr; 1573{ 1574 char bytes[3]; 1575 bytes[0] = UNW_P9; 1576 bytes[1] = (grmask & 0x0f); 1577 bytes[2] = (gr & 0x7f); 1578 (*f) (3, bytes, NULL); 1579} 1580 1581static void 1582output_P10_format (f, abi, context) 1583 vbyte_func f; 1584 int abi; 1585 int context; 1586{ 1587 char bytes[3]; 1588 bytes[0] = UNW_P10; 1589 bytes[1] = (abi & 0xff); 1590 bytes[2] = (context & 0xff); 1591 (*f) (3, bytes, NULL); 1592} 1593 1594static void 1595output_B1_format (f, rtype, label) 1596 vbyte_func f; 1597 unw_record_type rtype; 1598 unsigned long label; 1599{ 1600 char byte; 1601 int r = 0; 1602 if (label > 0x1f) 1603 { 1604 output_B4_format (f, rtype, label); 1605 return; 1606 } 1607 if (rtype == copy_state) 1608 r = 1; 1609 else if (rtype != label_state) 1610 as_bad ("Invalid record type for format B1"); 1611 1612 byte = (UNW_B1 | (r << 5) | (label & 0x1f)); 1613 (*f) (1, &byte, NULL); 1614} 1615 1616static void 1617output_B2_format (f, ecount, t) 1618 vbyte_func f; 1619 unsigned long ecount; 1620 unsigned long t; 1621{ 1622 char bytes[20]; 1623 int count = 1; 1624 if (ecount > 0x1f) 1625 { 1626 output_B3_format (f, ecount, t); 1627 return; 1628 } 1629 bytes[0] = (UNW_B2 | (ecount & 0x1f)); 1630 count += output_leb128 (bytes + 1, t, 0); 1631 (*f) (count, bytes, NULL); 1632} 1633 1634static void 1635output_B3_format (f, ecount, t) 1636 vbyte_func f; 1637 unsigned long ecount; 1638 unsigned long t; 1639{ 1640 char bytes[20]; 1641 int count = 1; 1642 if (ecount <= 0x1f) 1643 { 1644 output_B2_format (f, ecount, t); 1645 return; 1646 } 1647 bytes[0] = UNW_B3; 1648 count += output_leb128 (bytes + 1, t, 0); 1649 count += output_leb128 (bytes + count, ecount, 0); 1650 (*f) (count, bytes, NULL); 1651} 1652 1653static void 1654output_B4_format (f, rtype, label) 1655 vbyte_func f; 1656 unw_record_type rtype; 1657 unsigned long label; 1658{ 1659 char bytes[20]; 1660 int r = 0; 1661 int count = 1; 1662 if (label <= 0x1f) 1663 { 1664 output_B1_format (f, rtype, label); 1665 return; 1666 } 1667 1668 if (rtype == copy_state) 1669 r = 1; 1670 else if (rtype != label_state) 1671 as_bad ("Invalid record type for format B1"); 1672 1673 bytes[0] = (UNW_B4 | (r << 3)); 1674 count += output_leb128 (bytes + 1, label, 0); 1675 (*f) (count, bytes, NULL); 1676} 1677 1678static char 1679format_ab_reg (ab, reg) 1680 int ab; 1681 int reg; 1682{ 1683 int ret; 1684 ab = (ab & 3); 1685 reg = (reg & 0x1f); 1686 ret = (ab << 5) | reg; 1687 return ret; 1688} 1689 1690static void 1691output_X1_format (f, rtype, ab, reg, t, w1) 1692 vbyte_func f; 1693 unw_record_type rtype; 1694 int ab, reg; 1695 unsigned long t; 1696 unsigned long w1; 1697{ 1698 char bytes[20]; 1699 int r = 0; 1700 int count = 2; 1701 bytes[0] = UNW_X1; 1702 1703 if (rtype == spill_sprel) 1704 r = 1; 1705 else if (rtype != spill_psprel) 1706 as_bad ("Invalid record type for format X1"); 1707 bytes[1] = ((r << 7) | format_ab_reg (ab, reg)); 1708 count += output_leb128 (bytes + 2, t, 0); 1709 count += output_leb128 (bytes + count, w1, 0); 1710 (*f) (count, bytes, NULL); 1711} 1712 1713static void 1714output_X2_format (f, ab, reg, x, y, treg, t) 1715 vbyte_func f; 1716 int ab, reg; 1717 int x, y, treg; 1718 unsigned long t; 1719{ 1720 char bytes[20]; 1721 int count = 3; 1722 bytes[0] = UNW_X2; 1723 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg)); 1724 bytes[2] = (((y & 1) << 7) | (treg & 0x7f)); 1725 count += output_leb128 (bytes + 3, t, 0); 1726 (*f) (count, bytes, NULL); 1727} 1728 1729static void 1730output_X3_format (f, rtype, qp, ab, reg, t, w1) 1731 vbyte_func f; 1732 unw_record_type rtype; 1733 int qp; 1734 int ab, reg; 1735 unsigned long t; 1736 unsigned long w1; 1737{ 1738 char bytes[20]; 1739 int r = 0; 1740 int count = 3; 1741 bytes[0] = UNW_X3; 1742 1743 if (rtype == spill_sprel_p) 1744 r = 1; 1745 else if (rtype != spill_psprel_p) 1746 as_bad ("Invalid record type for format X3"); 1747 bytes[1] = ((r << 7) | (qp & 0x3f)); 1748 bytes[2] = format_ab_reg (ab, reg); 1749 count += output_leb128 (bytes + 3, t, 0); 1750 count += output_leb128 (bytes + count, w1, 0); 1751 (*f) (count, bytes, NULL); 1752} 1753 1754static void 1755output_X4_format (f, qp, ab, reg, x, y, treg, t) 1756 vbyte_func f; 1757 int qp; 1758 int ab, reg; 1759 int x, y, treg; 1760 unsigned long t; 1761{ 1762 char bytes[20]; 1763 int count = 4; 1764 bytes[0] = UNW_X4; 1765 bytes[1] = (qp & 0x3f); 1766 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg)); 1767 bytes[3] = (((y & 1) << 7) | (treg & 0x7f)); 1768 count += output_leb128 (bytes + 4, t, 0); 1769 (*f) (count, bytes, NULL); 1770} 1771 1772/* This function checks whether there are any outstanding .save-s and 1773 discards them if so. */ 1774 1775static void 1776check_pending_save (void) 1777{ 1778 if (unwind.pending_saves) 1779 { 1780 unw_rec_list *cur, *prev; 1781 1782 as_warn ("Previous .save incomplete"); 1783 for (cur = unwind.list, prev = NULL; cur; ) 1784 if (&cur->r.record.p == unwind.pending_saves) 1785 { 1786 if (prev) 1787 prev->next = cur->next; 1788 else 1789 unwind.list = cur->next; 1790 if (cur == unwind.tail) 1791 unwind.tail = prev; 1792 if (cur == unwind.current_entry) 1793 unwind.current_entry = cur->next; 1794 /* Don't free the first discarded record, it's being used as 1795 terminator for (currently) br_gr and gr_gr processing, and 1796 also prevents leaving a dangling pointer to it in its 1797 predecessor. */ 1798 cur->r.record.p.grmask = 0; 1799 cur->r.record.p.brmask = 0; 1800 cur->r.record.p.frmask = 0; 1801 prev = cur->r.record.p.next; 1802 cur->r.record.p.next = NULL; 1803 cur = prev; 1804 break; 1805 } 1806 else 1807 { 1808 prev = cur; 1809 cur = cur->next; 1810 } 1811 while (cur) 1812 { 1813 prev = cur; 1814 cur = cur->r.record.p.next; 1815 free (prev); 1816 } 1817 unwind.pending_saves = NULL; 1818 } 1819} 1820 1821/* This function allocates a record list structure, and initializes fields. */ 1822 1823static unw_rec_list * 1824alloc_record (unw_record_type t) 1825{ 1826 unw_rec_list *ptr; 1827 ptr = xmalloc (sizeof (*ptr)); 1828 memset (ptr, 0, sizeof (*ptr)); 1829 ptr->slot_number = SLOT_NUM_NOT_SET; 1830 ptr->r.type = t; 1831 return ptr; 1832} 1833 1834/* Dummy unwind record used for calculating the length of the last prologue or 1835 body region. */ 1836 1837static unw_rec_list * 1838output_endp () 1839{ 1840 unw_rec_list *ptr = alloc_record (endp); 1841 return ptr; 1842} 1843 1844static unw_rec_list * 1845output_prologue () 1846{ 1847 unw_rec_list *ptr = alloc_record (prologue); 1848 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); 1849 return ptr; 1850} 1851 1852static unw_rec_list * 1853output_prologue_gr (saved_mask, reg) 1854 unsigned int saved_mask; 1855 unsigned int reg; 1856{ 1857 unw_rec_list *ptr = alloc_record (prologue_gr); 1858 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask)); 1859 ptr->r.record.r.grmask = saved_mask; 1860 ptr->r.record.r.grsave = reg; 1861 return ptr; 1862} 1863 1864static unw_rec_list * 1865output_body () 1866{ 1867 unw_rec_list *ptr = alloc_record (body); 1868 return ptr; 1869} 1870 1871static unw_rec_list * 1872output_mem_stack_f (size) 1873 unsigned int size; 1874{ 1875 unw_rec_list *ptr = alloc_record (mem_stack_f); 1876 ptr->r.record.p.size = size; 1877 return ptr; 1878} 1879 1880static unw_rec_list * 1881output_mem_stack_v () 1882{ 1883 unw_rec_list *ptr = alloc_record (mem_stack_v); 1884 return ptr; 1885} 1886 1887static unw_rec_list * 1888output_psp_gr (gr) 1889 unsigned int gr; 1890{ 1891 unw_rec_list *ptr = alloc_record (psp_gr); 1892 ptr->r.record.p.r.gr = gr; 1893 return ptr; 1894} 1895 1896static unw_rec_list * 1897output_psp_sprel (offset) 1898 unsigned int offset; 1899{ 1900 unw_rec_list *ptr = alloc_record (psp_sprel); 1901 ptr->r.record.p.off.sp = offset / 4; 1902 return ptr; 1903} 1904 1905static unw_rec_list * 1906output_rp_when () 1907{ 1908 unw_rec_list *ptr = alloc_record (rp_when); 1909 return ptr; 1910} 1911 1912static unw_rec_list * 1913output_rp_gr (gr) 1914 unsigned int gr; 1915{ 1916 unw_rec_list *ptr = alloc_record (rp_gr); 1917 ptr->r.record.p.r.gr = gr; 1918 return ptr; 1919} 1920 1921static unw_rec_list * 1922output_rp_br (br) 1923 unsigned int br; 1924{ 1925 unw_rec_list *ptr = alloc_record (rp_br); 1926 ptr->r.record.p.r.br = br; 1927 return ptr; 1928} 1929 1930static unw_rec_list * 1931output_rp_psprel (offset) 1932 unsigned int offset; 1933{ 1934 unw_rec_list *ptr = alloc_record (rp_psprel); 1935 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 1936 return ptr; 1937} 1938 1939static unw_rec_list * 1940output_rp_sprel (offset) 1941 unsigned int offset; 1942{ 1943 unw_rec_list *ptr = alloc_record (rp_sprel); 1944 ptr->r.record.p.off.sp = offset / 4; 1945 return ptr; 1946} 1947 1948static unw_rec_list * 1949output_pfs_when () 1950{ 1951 unw_rec_list *ptr = alloc_record (pfs_when); 1952 return ptr; 1953} 1954 1955static unw_rec_list * 1956output_pfs_gr (gr) 1957 unsigned int gr; 1958{ 1959 unw_rec_list *ptr = alloc_record (pfs_gr); 1960 ptr->r.record.p.r.gr = gr; 1961 return ptr; 1962} 1963 1964static unw_rec_list * 1965output_pfs_psprel (offset) 1966 unsigned int offset; 1967{ 1968 unw_rec_list *ptr = alloc_record (pfs_psprel); 1969 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 1970 return ptr; 1971} 1972 1973static unw_rec_list * 1974output_pfs_sprel (offset) 1975 unsigned int offset; 1976{ 1977 unw_rec_list *ptr = alloc_record (pfs_sprel); 1978 ptr->r.record.p.off.sp = offset / 4; 1979 return ptr; 1980} 1981 1982static unw_rec_list * 1983output_preds_when () 1984{ 1985 unw_rec_list *ptr = alloc_record (preds_when); 1986 return ptr; 1987} 1988 1989static unw_rec_list * 1990output_preds_gr (gr) 1991 unsigned int gr; 1992{ 1993 unw_rec_list *ptr = alloc_record (preds_gr); 1994 ptr->r.record.p.r.gr = gr; 1995 return ptr; 1996} 1997 1998static unw_rec_list * 1999output_preds_psprel (offset) 2000 unsigned int offset; 2001{ 2002 unw_rec_list *ptr = alloc_record (preds_psprel); 2003 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2004 return ptr; 2005} 2006 2007static unw_rec_list * 2008output_preds_sprel (offset) 2009 unsigned int offset; 2010{ 2011 unw_rec_list *ptr = alloc_record (preds_sprel); 2012 ptr->r.record.p.off.sp = offset / 4; 2013 return ptr; 2014} 2015 2016static unw_rec_list * 2017output_fr_mem (mask) 2018 unsigned int mask; 2019{ 2020 unw_rec_list *ptr = alloc_record (fr_mem); 2021 unw_rec_list *cur = ptr; 2022 2023 ptr->r.record.p.frmask = mask; 2024 unwind.pending_saves = &ptr->r.record.p; 2025 for (;;) 2026 { 2027 unw_rec_list *prev = cur; 2028 2029 /* Clear least significant set bit. */ 2030 mask &= ~(mask & (~mask + 1)); 2031 if (!mask) 2032 return ptr; 2033 cur = alloc_record (fr_mem); 2034 cur->r.record.p.frmask = mask; 2035 /* Retain only least significant bit. */ 2036 prev->r.record.p.frmask ^= mask; 2037 prev->r.record.p.next = cur; 2038 } 2039} 2040 2041static unw_rec_list * 2042output_frgr_mem (gr_mask, fr_mask) 2043 unsigned int gr_mask; 2044 unsigned int fr_mask; 2045{ 2046 unw_rec_list *ptr = alloc_record (frgr_mem); 2047 unw_rec_list *cur = ptr; 2048 2049 unwind.pending_saves = &cur->r.record.p; 2050 cur->r.record.p.frmask = fr_mask; 2051 while (fr_mask) 2052 { 2053 unw_rec_list *prev = cur; 2054 2055 /* Clear least significant set bit. */ 2056 fr_mask &= ~(fr_mask & (~fr_mask + 1)); 2057 if (!gr_mask && !fr_mask) 2058 return ptr; 2059 cur = alloc_record (frgr_mem); 2060 cur->r.record.p.frmask = fr_mask; 2061 /* Retain only least significant bit. */ 2062 prev->r.record.p.frmask ^= fr_mask; 2063 prev->r.record.p.next = cur; 2064 } 2065 cur->r.record.p.grmask = gr_mask; 2066 for (;;) 2067 { 2068 unw_rec_list *prev = cur; 2069 2070 /* Clear least significant set bit. */ 2071 gr_mask &= ~(gr_mask & (~gr_mask + 1)); 2072 if (!gr_mask) 2073 return ptr; 2074 cur = alloc_record (frgr_mem); 2075 cur->r.record.p.grmask = gr_mask; 2076 /* Retain only least significant bit. */ 2077 prev->r.record.p.grmask ^= gr_mask; 2078 prev->r.record.p.next = cur; 2079 } 2080} 2081 2082static unw_rec_list * 2083output_gr_gr (mask, reg) 2084 unsigned int mask; 2085 unsigned int reg; 2086{ 2087 unw_rec_list *ptr = alloc_record (gr_gr); 2088 unw_rec_list *cur = ptr; 2089 2090 ptr->r.record.p.grmask = mask; 2091 ptr->r.record.p.r.gr = reg; 2092 unwind.pending_saves = &ptr->r.record.p; 2093 for (;;) 2094 { 2095 unw_rec_list *prev = cur; 2096 2097 /* Clear least significant set bit. */ 2098 mask &= ~(mask & (~mask + 1)); 2099 if (!mask) 2100 return ptr; 2101 cur = alloc_record (gr_gr); 2102 cur->r.record.p.grmask = mask; 2103 /* Indicate this record shouldn't be output. */ 2104 cur->r.record.p.r.gr = REG_NUM; 2105 /* Retain only least significant bit. */ 2106 prev->r.record.p.grmask ^= mask; 2107 prev->r.record.p.next = cur; 2108 } 2109} 2110 2111static unw_rec_list * 2112output_gr_mem (mask) 2113 unsigned int mask; 2114{ 2115 unw_rec_list *ptr = alloc_record (gr_mem); 2116 unw_rec_list *cur = ptr; 2117 2118 ptr->r.record.p.grmask = mask; 2119 unwind.pending_saves = &ptr->r.record.p; 2120 for (;;) 2121 { 2122 unw_rec_list *prev = cur; 2123 2124 /* Clear least significant set bit. */ 2125 mask &= ~(mask & (~mask + 1)); 2126 if (!mask) 2127 return ptr; 2128 cur = alloc_record (gr_mem); 2129 cur->r.record.p.grmask = mask; 2130 /* Retain only least significant bit. */ 2131 prev->r.record.p.grmask ^= mask; 2132 prev->r.record.p.next = cur; 2133 } 2134} 2135 2136static unw_rec_list * 2137output_br_mem (unsigned int mask) 2138{ 2139 unw_rec_list *ptr = alloc_record (br_mem); 2140 unw_rec_list *cur = ptr; 2141 2142 ptr->r.record.p.brmask = mask; 2143 unwind.pending_saves = &ptr->r.record.p; 2144 for (;;) 2145 { 2146 unw_rec_list *prev = cur; 2147 2148 /* Clear least significant set bit. */ 2149 mask &= ~(mask & (~mask + 1)); 2150 if (!mask) 2151 return ptr; 2152 cur = alloc_record (br_mem); 2153 cur->r.record.p.brmask = mask; 2154 /* Retain only least significant bit. */ 2155 prev->r.record.p.brmask ^= mask; 2156 prev->r.record.p.next = cur; 2157 } 2158} 2159 2160static unw_rec_list * 2161output_br_gr (mask, reg) 2162 unsigned int mask; 2163 unsigned int reg; 2164{ 2165 unw_rec_list *ptr = alloc_record (br_gr); 2166 unw_rec_list *cur = ptr; 2167 2168 ptr->r.record.p.brmask = mask; 2169 ptr->r.record.p.r.gr = reg; 2170 unwind.pending_saves = &ptr->r.record.p; 2171 for (;;) 2172 { 2173 unw_rec_list *prev = cur; 2174 2175 /* Clear least significant set bit. */ 2176 mask &= ~(mask & (~mask + 1)); 2177 if (!mask) 2178 return ptr; 2179 cur = alloc_record (br_gr); 2180 cur->r.record.p.brmask = mask; 2181 /* Indicate this record shouldn't be output. */ 2182 cur->r.record.p.r.gr = REG_NUM; 2183 /* Retain only least significant bit. */ 2184 prev->r.record.p.brmask ^= mask; 2185 prev->r.record.p.next = cur; 2186 } 2187} 2188 2189static unw_rec_list * 2190output_spill_base (offset) 2191 unsigned int offset; 2192{ 2193 unw_rec_list *ptr = alloc_record (spill_base); 2194 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2195 return ptr; 2196} 2197 2198static unw_rec_list * 2199output_unat_when () 2200{ 2201 unw_rec_list *ptr = alloc_record (unat_when); 2202 return ptr; 2203} 2204 2205static unw_rec_list * 2206output_unat_gr (gr) 2207 unsigned int gr; 2208{ 2209 unw_rec_list *ptr = alloc_record (unat_gr); 2210 ptr->r.record.p.r.gr = gr; 2211 return ptr; 2212} 2213 2214static unw_rec_list * 2215output_unat_psprel (offset) 2216 unsigned int offset; 2217{ 2218 unw_rec_list *ptr = alloc_record (unat_psprel); 2219 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2220 return ptr; 2221} 2222 2223static unw_rec_list * 2224output_unat_sprel (offset) 2225 unsigned int offset; 2226{ 2227 unw_rec_list *ptr = alloc_record (unat_sprel); 2228 ptr->r.record.p.off.sp = offset / 4; 2229 return ptr; 2230} 2231 2232static unw_rec_list * 2233output_lc_when () 2234{ 2235 unw_rec_list *ptr = alloc_record (lc_when); 2236 return ptr; 2237} 2238 2239static unw_rec_list * 2240output_lc_gr (gr) 2241 unsigned int gr; 2242{ 2243 unw_rec_list *ptr = alloc_record (lc_gr); 2244 ptr->r.record.p.r.gr = gr; 2245 return ptr; 2246} 2247 2248static unw_rec_list * 2249output_lc_psprel (offset) 2250 unsigned int offset; 2251{ 2252 unw_rec_list *ptr = alloc_record (lc_psprel); 2253 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2254 return ptr; 2255} 2256 2257static unw_rec_list * 2258output_lc_sprel (offset) 2259 unsigned int offset; 2260{ 2261 unw_rec_list *ptr = alloc_record (lc_sprel); 2262 ptr->r.record.p.off.sp = offset / 4; 2263 return ptr; 2264} 2265 2266static unw_rec_list * 2267output_fpsr_when () 2268{ 2269 unw_rec_list *ptr = alloc_record (fpsr_when); 2270 return ptr; 2271} 2272 2273static unw_rec_list * 2274output_fpsr_gr (gr) 2275 unsigned int gr; 2276{ 2277 unw_rec_list *ptr = alloc_record (fpsr_gr); 2278 ptr->r.record.p.r.gr = gr; 2279 return ptr; 2280} 2281 2282static unw_rec_list * 2283output_fpsr_psprel (offset) 2284 unsigned int offset; 2285{ 2286 unw_rec_list *ptr = alloc_record (fpsr_psprel); 2287 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2288 return ptr; 2289} 2290 2291static unw_rec_list * 2292output_fpsr_sprel (offset) 2293 unsigned int offset; 2294{ 2295 unw_rec_list *ptr = alloc_record (fpsr_sprel); 2296 ptr->r.record.p.off.sp = offset / 4; 2297 return ptr; 2298} 2299 2300static unw_rec_list * 2301output_priunat_when_gr () 2302{ 2303 unw_rec_list *ptr = alloc_record (priunat_when_gr); 2304 return ptr; 2305} 2306 2307static unw_rec_list * 2308output_priunat_when_mem () 2309{ 2310 unw_rec_list *ptr = alloc_record (priunat_when_mem); 2311 return ptr; 2312} 2313 2314static unw_rec_list * 2315output_priunat_gr (gr) 2316 unsigned int gr; 2317{ 2318 unw_rec_list *ptr = alloc_record (priunat_gr); 2319 ptr->r.record.p.r.gr = gr; 2320 return ptr; 2321} 2322 2323static unw_rec_list * 2324output_priunat_psprel (offset) 2325 unsigned int offset; 2326{ 2327 unw_rec_list *ptr = alloc_record (priunat_psprel); 2328 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2329 return ptr; 2330} 2331 2332static unw_rec_list * 2333output_priunat_sprel (offset) 2334 unsigned int offset; 2335{ 2336 unw_rec_list *ptr = alloc_record (priunat_sprel); 2337 ptr->r.record.p.off.sp = offset / 4; 2338 return ptr; 2339} 2340 2341static unw_rec_list * 2342output_bsp_when () 2343{ 2344 unw_rec_list *ptr = alloc_record (bsp_when); 2345 return ptr; 2346} 2347 2348static unw_rec_list * 2349output_bsp_gr (gr) 2350 unsigned int gr; 2351{ 2352 unw_rec_list *ptr = alloc_record (bsp_gr); 2353 ptr->r.record.p.r.gr = gr; 2354 return ptr; 2355} 2356 2357static unw_rec_list * 2358output_bsp_psprel (offset) 2359 unsigned int offset; 2360{ 2361 unw_rec_list *ptr = alloc_record (bsp_psprel); 2362 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2363 return ptr; 2364} 2365 2366static unw_rec_list * 2367output_bsp_sprel (offset) 2368 unsigned int offset; 2369{ 2370 unw_rec_list *ptr = alloc_record (bsp_sprel); 2371 ptr->r.record.p.off.sp = offset / 4; 2372 return ptr; 2373} 2374 2375static unw_rec_list * 2376output_bspstore_when () 2377{ 2378 unw_rec_list *ptr = alloc_record (bspstore_when); 2379 return ptr; 2380} 2381 2382static unw_rec_list * 2383output_bspstore_gr (gr) 2384 unsigned int gr; 2385{ 2386 unw_rec_list *ptr = alloc_record (bspstore_gr); 2387 ptr->r.record.p.r.gr = gr; 2388 return ptr; 2389} 2390 2391static unw_rec_list * 2392output_bspstore_psprel (offset) 2393 unsigned int offset; 2394{ 2395 unw_rec_list *ptr = alloc_record (bspstore_psprel); 2396 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2397 return ptr; 2398} 2399 2400static unw_rec_list * 2401output_bspstore_sprel (offset) 2402 unsigned int offset; 2403{ 2404 unw_rec_list *ptr = alloc_record (bspstore_sprel); 2405 ptr->r.record.p.off.sp = offset / 4; 2406 return ptr; 2407} 2408 2409static unw_rec_list * 2410output_rnat_when () 2411{ 2412 unw_rec_list *ptr = alloc_record (rnat_when); 2413 return ptr; 2414} 2415 2416static unw_rec_list * 2417output_rnat_gr (gr) 2418 unsigned int gr; 2419{ 2420 unw_rec_list *ptr = alloc_record (rnat_gr); 2421 ptr->r.record.p.r.gr = gr; 2422 return ptr; 2423} 2424 2425static unw_rec_list * 2426output_rnat_psprel (offset) 2427 unsigned int offset; 2428{ 2429 unw_rec_list *ptr = alloc_record (rnat_psprel); 2430 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset); 2431 return ptr; 2432} 2433 2434static unw_rec_list * 2435output_rnat_sprel (offset) 2436 unsigned int offset; 2437{ 2438 unw_rec_list *ptr = alloc_record (rnat_sprel); 2439 ptr->r.record.p.off.sp = offset / 4; 2440 return ptr; 2441} 2442 2443static unw_rec_list * 2444output_unwabi (abi, context) 2445 unsigned long abi; 2446 unsigned long context; 2447{ 2448 unw_rec_list *ptr = alloc_record (unwabi); 2449 ptr->r.record.p.abi = abi; 2450 ptr->r.record.p.context = context; 2451 return ptr; 2452} 2453 2454static unw_rec_list * 2455output_epilogue (unsigned long ecount) 2456{ 2457 unw_rec_list *ptr = alloc_record (epilogue); 2458 ptr->r.record.b.ecount = ecount; 2459 return ptr; 2460} 2461 2462static unw_rec_list * 2463output_label_state (unsigned long label) 2464{ 2465 unw_rec_list *ptr = alloc_record (label_state); 2466 ptr->r.record.b.label = label; 2467 return ptr; 2468} 2469 2470static unw_rec_list * 2471output_copy_state (unsigned long label) 2472{ 2473 unw_rec_list *ptr = alloc_record (copy_state); 2474 ptr->r.record.b.label = label; 2475 return ptr; 2476} 2477 2478static unw_rec_list * 2479output_spill_psprel (ab, reg, offset, predicate) 2480 unsigned int ab; 2481 unsigned int reg; 2482 unsigned int offset; 2483 unsigned int predicate; 2484{ 2485 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel); 2486 ptr->r.record.x.ab = ab; 2487 ptr->r.record.x.reg = reg; 2488 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset); 2489 ptr->r.record.x.qp = predicate; 2490 return ptr; 2491} 2492 2493static unw_rec_list * 2494output_spill_sprel (ab, reg, offset, predicate) 2495 unsigned int ab; 2496 unsigned int reg; 2497 unsigned int offset; 2498 unsigned int predicate; 2499{ 2500 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel); 2501 ptr->r.record.x.ab = ab; 2502 ptr->r.record.x.reg = reg; 2503 ptr->r.record.x.where.spoff = offset / 4; 2504 ptr->r.record.x.qp = predicate; 2505 return ptr; 2506} 2507 2508static unw_rec_list * 2509output_spill_reg (ab, reg, targ_reg, xy, predicate) 2510 unsigned int ab; 2511 unsigned int reg; 2512 unsigned int targ_reg; 2513 unsigned int xy; 2514 unsigned int predicate; 2515{ 2516 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg); 2517 ptr->r.record.x.ab = ab; 2518 ptr->r.record.x.reg = reg; 2519 ptr->r.record.x.where.reg = targ_reg; 2520 ptr->r.record.x.xy = xy; 2521 ptr->r.record.x.qp = predicate; 2522 return ptr; 2523} 2524 2525/* Given a unw_rec_list process the correct format with the 2526 specified function. */ 2527 2528static void 2529process_one_record (ptr, f) 2530 unw_rec_list *ptr; 2531 vbyte_func f; 2532{ 2533 unsigned int fr_mask, gr_mask; 2534 2535 switch (ptr->r.type) 2536 { 2537 /* This is a dummy record that takes up no space in the output. */ 2538 case endp: 2539 break; 2540 2541 case gr_mem: 2542 case fr_mem: 2543 case br_mem: 2544 case frgr_mem: 2545 /* These are taken care of by prologue/prologue_gr. */ 2546 break; 2547 2548 case prologue_gr: 2549 case prologue: 2550 if (ptr->r.type == prologue_gr) 2551 output_R2_format (f, ptr->r.record.r.grmask, 2552 ptr->r.record.r.grsave, ptr->r.record.r.rlen); 2553 else 2554 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); 2555 2556 /* Output descriptor(s) for union of register spills (if any). */ 2557 gr_mask = ptr->r.record.r.mask.gr_mem; 2558 fr_mask = ptr->r.record.r.mask.fr_mem; 2559 if (fr_mask) 2560 { 2561 if ((fr_mask & ~0xfUL) == 0) 2562 output_P6_format (f, fr_mem, fr_mask); 2563 else 2564 { 2565 output_P5_format (f, gr_mask, fr_mask); 2566 gr_mask = 0; 2567 } 2568 } 2569 if (gr_mask) 2570 output_P6_format (f, gr_mem, gr_mask); 2571 if (ptr->r.record.r.mask.br_mem) 2572 output_P1_format (f, ptr->r.record.r.mask.br_mem); 2573 2574 /* output imask descriptor if necessary: */ 2575 if (ptr->r.record.r.mask.i) 2576 output_P4_format (f, ptr->r.record.r.mask.i, 2577 ptr->r.record.r.imask_size); 2578 break; 2579 2580 case body: 2581 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen); 2582 break; 2583 case mem_stack_f: 2584 case mem_stack_v: 2585 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 2586 ptr->r.record.p.size); 2587 break; 2588 case psp_gr: 2589 case rp_gr: 2590 case pfs_gr: 2591 case preds_gr: 2592 case unat_gr: 2593 case lc_gr: 2594 case fpsr_gr: 2595 case priunat_gr: 2596 case bsp_gr: 2597 case bspstore_gr: 2598 case rnat_gr: 2599 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr); 2600 break; 2601 case rp_br: 2602 output_P3_format (f, rp_br, ptr->r.record.p.r.br); 2603 break; 2604 case psp_sprel: 2605 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0); 2606 break; 2607 case rp_when: 2608 case pfs_when: 2609 case preds_when: 2610 case unat_when: 2611 case lc_when: 2612 case fpsr_when: 2613 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0); 2614 break; 2615 case rp_psprel: 2616 case pfs_psprel: 2617 case preds_psprel: 2618 case unat_psprel: 2619 case lc_psprel: 2620 case fpsr_psprel: 2621 case spill_base: 2622 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0); 2623 break; 2624 case rp_sprel: 2625 case pfs_sprel: 2626 case preds_sprel: 2627 case unat_sprel: 2628 case lc_sprel: 2629 case fpsr_sprel: 2630 case priunat_sprel: 2631 case bsp_sprel: 2632 case bspstore_sprel: 2633 case rnat_sprel: 2634 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp); 2635 break; 2636 case gr_gr: 2637 if (ptr->r.record.p.r.gr < REG_NUM) 2638 { 2639 const unw_rec_list *cur = ptr; 2640 2641 gr_mask = cur->r.record.p.grmask; 2642 while ((cur = cur->r.record.p.next) != NULL) 2643 gr_mask |= cur->r.record.p.grmask; 2644 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr); 2645 } 2646 break; 2647 case br_gr: 2648 if (ptr->r.record.p.r.gr < REG_NUM) 2649 { 2650 const unw_rec_list *cur = ptr; 2651 2652 gr_mask = cur->r.record.p.brmask; 2653 while ((cur = cur->r.record.p.next) != NULL) 2654 gr_mask |= cur->r.record.p.brmask; 2655 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr); 2656 } 2657 break; 2658 case spill_mask: 2659 as_bad ("spill_mask record unimplemented."); 2660 break; 2661 case priunat_when_gr: 2662 case priunat_when_mem: 2663 case bsp_when: 2664 case bspstore_when: 2665 case rnat_when: 2666 output_P8_format (f, ptr->r.type, ptr->r.record.p.t); 2667 break; 2668 case priunat_psprel: 2669 case bsp_psprel: 2670 case bspstore_psprel: 2671 case rnat_psprel: 2672 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp); 2673 break; 2674 case unwabi: 2675 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context); 2676 break; 2677 case epilogue: 2678 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t); 2679 break; 2680 case label_state: 2681 case copy_state: 2682 output_B4_format (f, ptr->r.type, ptr->r.record.b.label); 2683 break; 2684 case spill_psprel: 2685 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, 2686 ptr->r.record.x.reg, ptr->r.record.x.t, 2687 ptr->r.record.x.where.pspoff); 2688 break; 2689 case spill_sprel: 2690 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab, 2691 ptr->r.record.x.reg, ptr->r.record.x.t, 2692 ptr->r.record.x.where.spoff); 2693 break; 2694 case spill_reg: 2695 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg, 2696 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy, 2697 ptr->r.record.x.where.reg, ptr->r.record.x.t); 2698 break; 2699 case spill_psprel_p: 2700 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, 2701 ptr->r.record.x.ab, ptr->r.record.x.reg, 2702 ptr->r.record.x.t, ptr->r.record.x.where.pspoff); 2703 break; 2704 case spill_sprel_p: 2705 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp, 2706 ptr->r.record.x.ab, ptr->r.record.x.reg, 2707 ptr->r.record.x.t, ptr->r.record.x.where.spoff); 2708 break; 2709 case spill_reg_p: 2710 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab, 2711 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1, 2712 ptr->r.record.x.xy, ptr->r.record.x.where.reg, 2713 ptr->r.record.x.t); 2714 break; 2715 default: 2716 as_bad ("record_type_not_valid"); 2717 break; 2718 } 2719} 2720 2721/* Given a unw_rec_list list, process all the records with 2722 the specified function. */ 2723static void 2724process_unw_records (list, f) 2725 unw_rec_list *list; 2726 vbyte_func f; 2727{ 2728 unw_rec_list *ptr; 2729 for (ptr = list; ptr; ptr = ptr->next) 2730 process_one_record (ptr, f); 2731} 2732 2733/* Determine the size of a record list in bytes. */ 2734static int 2735calc_record_size (list) 2736 unw_rec_list *list; 2737{ 2738 vbyte_count = 0; 2739 process_unw_records (list, count_output); 2740 return vbyte_count; 2741} 2742 2743/* Return the number of bits set in the input value. 2744 Perhaps this has a better place... */ 2745#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) 2746# define popcount __builtin_popcount 2747#else 2748static int 2749popcount (unsigned x) 2750{ 2751 static const unsigned char popcnt[16] = 2752 { 2753 0, 1, 1, 2, 2754 1, 2, 2, 3, 2755 1, 2, 2, 3, 2756 2, 3, 3, 4 2757 }; 2758 2759 if (x < NELEMS (popcnt)) 2760 return popcnt[x]; 2761 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt)); 2762} 2763#endif 2764 2765/* Update IMASK bitmask to reflect the fact that one or more registers 2766 of type TYPE are saved starting at instruction with index T. If N 2767 bits are set in REGMASK, it is assumed that instructions T through 2768 T+N-1 save these registers. 2769 2770 TYPE values: 2771 0: no save 2772 1: instruction saves next fp reg 2773 2: instruction saves next general reg 2774 3: instruction saves next branch reg */ 2775static void 2776set_imask (region, regmask, t, type) 2777 unw_rec_list *region; 2778 unsigned long regmask; 2779 unsigned long t; 2780 unsigned int type; 2781{ 2782 unsigned char *imask; 2783 unsigned long imask_size; 2784 unsigned int i; 2785 int pos; 2786 2787 imask = region->r.record.r.mask.i; 2788 imask_size = region->r.record.r.imask_size; 2789 if (!imask) 2790 { 2791 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1; 2792 imask = xmalloc (imask_size); 2793 memset (imask, 0, imask_size); 2794 2795 region->r.record.r.imask_size = imask_size; 2796 region->r.record.r.mask.i = imask; 2797 } 2798 2799 i = (t / 4) + 1; 2800 pos = 2 * (3 - t % 4); 2801 while (regmask) 2802 { 2803 if (i >= imask_size) 2804 { 2805 as_bad ("Ignoring attempt to spill beyond end of region"); 2806 return; 2807 } 2808 2809 imask[i] |= (type & 0x3) << pos; 2810 2811 regmask &= (regmask - 1); 2812 pos -= 2; 2813 if (pos < 0) 2814 { 2815 pos = 0; 2816 ++i; 2817 } 2818 } 2819} 2820 2821/* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. 2822 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag 2823 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates 2824 for frag sizes. */ 2825 2826unsigned long 2827slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) 2828 unsigned long slot_addr; 2829 fragS *slot_frag; 2830 unsigned long first_addr; 2831 fragS *first_frag; 2832 int before_relax; 2833{ 2834 unsigned long index = 0; 2835 2836 /* First time we are called, the initial address and frag are invalid. */ 2837 if (first_addr == 0) 2838 return 0; 2839 2840 /* If the two addresses are in different frags, then we need to add in 2841 the remaining size of this frag, and then the entire size of intermediate 2842 frags. */ 2843 while (slot_frag != first_frag) 2844 { 2845 unsigned long start_addr = (unsigned long) &first_frag->fr_literal; 2846 2847 if (! before_relax) 2848 { 2849 /* We can get the final addresses only during and after 2850 relaxation. */ 2851 if (first_frag->fr_next && first_frag->fr_next->fr_address) 2852 index += 3 * ((first_frag->fr_next->fr_address 2853 - first_frag->fr_address 2854 - first_frag->fr_fix) >> 4); 2855 } 2856 else 2857 /* We don't know what the final addresses will be. We try our 2858 best to estimate. */ 2859 switch (first_frag->fr_type) 2860 { 2861 default: 2862 break; 2863 2864 case rs_space: 2865 as_fatal ("only constant space allocation is supported"); 2866 break; 2867 2868 case rs_align: 2869 case rs_align_code: 2870 case rs_align_test: 2871 /* Take alignment into account. Assume the worst case 2872 before relaxation. */ 2873 index += 3 * ((1 << first_frag->fr_offset) >> 4); 2874 break; 2875 2876 case rs_org: 2877 if (first_frag->fr_symbol) 2878 { 2879 as_fatal ("only constant offsets are supported"); 2880 break; 2881 } 2882 case rs_fill: 2883 index += 3 * (first_frag->fr_offset >> 4); 2884 break; 2885 } 2886 2887 /* Add in the full size of the frag converted to instruction slots. */ 2888 index += 3 * (first_frag->fr_fix >> 4); 2889 /* Subtract away the initial part before first_addr. */ 2890 index -= (3 * ((first_addr >> 4) - (start_addr >> 4)) 2891 + ((first_addr & 0x3) - (start_addr & 0x3))); 2892 2893 /* Move to the beginning of the next frag. */ 2894 first_frag = first_frag->fr_next; 2895 first_addr = (unsigned long) &first_frag->fr_literal; 2896 2897 /* This can happen if there is section switching in the middle of a 2898 function, causing the frag chain for the function to be broken. 2899 It is too difficult to recover safely from this problem, so we just 2900 exit with an error. */ 2901 if (first_frag == NULL) 2902 as_fatal ("Section switching in code is not supported."); 2903 } 2904 2905 /* Add in the used part of the last frag. */ 2906 index += (3 * ((slot_addr >> 4) - (first_addr >> 4)) 2907 + ((slot_addr & 0x3) - (first_addr & 0x3))); 2908 return index; 2909} 2910 2911/* Optimize unwind record directives. */ 2912 2913static unw_rec_list * 2914optimize_unw_records (list) 2915 unw_rec_list *list; 2916{ 2917 if (!list) 2918 return NULL; 2919 2920 /* If the only unwind record is ".prologue" or ".prologue" followed 2921 by ".body", then we can optimize the unwind directives away. */ 2922 if (list->r.type == prologue 2923 && (list->next->r.type == endp 2924 || (list->next->r.type == body && list->next->next->r.type == endp))) 2925 return NULL; 2926 2927 return list; 2928} 2929 2930/* Given a complete record list, process any records which have 2931 unresolved fields, (ie length counts for a prologue). After 2932 this has been run, all necessary information should be available 2933 within each record to generate an image. */ 2934 2935static void 2936fixup_unw_records (list, before_relax) 2937 unw_rec_list *list; 2938 int before_relax; 2939{ 2940 unw_rec_list *ptr, *region = 0; 2941 unsigned long first_addr = 0, rlen = 0, t; 2942 fragS *first_frag = 0; 2943 2944 for (ptr = list; ptr; ptr = ptr->next) 2945 { 2946 if (ptr->slot_number == SLOT_NUM_NOT_SET) 2947 as_bad (" Insn slot not set in unwind record."); 2948 t = slot_index (ptr->slot_number, ptr->slot_frag, 2949 first_addr, first_frag, before_relax); 2950 switch (ptr->r.type) 2951 { 2952 case prologue: 2953 case prologue_gr: 2954 case body: 2955 { 2956 unw_rec_list *last; 2957 int size; 2958 unsigned long last_addr = 0; 2959 fragS *last_frag = NULL; 2960 2961 first_addr = ptr->slot_number; 2962 first_frag = ptr->slot_frag; 2963 /* Find either the next body/prologue start, or the end of 2964 the function, and determine the size of the region. */ 2965 for (last = ptr->next; last != NULL; last = last->next) 2966 if (last->r.type == prologue || last->r.type == prologue_gr 2967 || last->r.type == body || last->r.type == endp) 2968 { 2969 last_addr = last->slot_number; 2970 last_frag = last->slot_frag; 2971 break; 2972 } 2973 size = slot_index (last_addr, last_frag, first_addr, first_frag, 2974 before_relax); 2975 rlen = ptr->r.record.r.rlen = size; 2976 if (ptr->r.type == body) 2977 /* End of region. */ 2978 region = 0; 2979 else 2980 region = ptr; 2981 break; 2982 } 2983 case epilogue: 2984 if (t < rlen) 2985 ptr->r.record.b.t = rlen - 1 - t; 2986 else 2987 /* This happens when a memory-stack-less procedure uses a 2988 ".restore sp" directive at the end of a region to pop 2989 the frame state. */ 2990 ptr->r.record.b.t = 0; 2991 break; 2992 2993 case mem_stack_f: 2994 case mem_stack_v: 2995 case rp_when: 2996 case pfs_when: 2997 case preds_when: 2998 case unat_when: 2999 case lc_when: 3000 case fpsr_when: 3001 case priunat_when_gr: 3002 case priunat_when_mem: 3003 case bsp_when: 3004 case bspstore_when: 3005 case rnat_when: 3006 ptr->r.record.p.t = t; 3007 break; 3008 3009 case spill_reg: 3010 case spill_sprel: 3011 case spill_psprel: 3012 case spill_reg_p: 3013 case spill_sprel_p: 3014 case spill_psprel_p: 3015 ptr->r.record.x.t = t; 3016 break; 3017 3018 case frgr_mem: 3019 if (!region) 3020 { 3021 as_bad ("frgr_mem record before region record!"); 3022 return; 3023 } 3024 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; 3025 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; 3026 set_imask (region, ptr->r.record.p.frmask, t, 1); 3027 set_imask (region, ptr->r.record.p.grmask, t, 2); 3028 break; 3029 case fr_mem: 3030 if (!region) 3031 { 3032 as_bad ("fr_mem record before region record!"); 3033 return; 3034 } 3035 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask; 3036 set_imask (region, ptr->r.record.p.frmask, t, 1); 3037 break; 3038 case gr_mem: 3039 if (!region) 3040 { 3041 as_bad ("gr_mem record before region record!"); 3042 return; 3043 } 3044 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask; 3045 set_imask (region, ptr->r.record.p.grmask, t, 2); 3046 break; 3047 case br_mem: 3048 if (!region) 3049 { 3050 as_bad ("br_mem record before region record!"); 3051 return; 3052 } 3053 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask; 3054 set_imask (region, ptr->r.record.p.brmask, t, 3); 3055 break; 3056 3057 case gr_gr: 3058 if (!region) 3059 { 3060 as_bad ("gr_gr record before region record!"); 3061 return; 3062 } 3063 set_imask (region, ptr->r.record.p.grmask, t, 2); 3064 break; 3065 case br_gr: 3066 if (!region) 3067 { 3068 as_bad ("br_gr record before region record!"); 3069 return; 3070 } 3071 set_imask (region, ptr->r.record.p.brmask, t, 3); 3072 break; 3073 3074 default: 3075 break; 3076 } 3077 } 3078} 3079 3080/* Estimate the size of a frag before relaxing. We only have one type of frag 3081 to handle here, which is the unwind info frag. */ 3082 3083int 3084ia64_estimate_size_before_relax (fragS *frag, 3085 asection *segtype ATTRIBUTE_UNUSED) 3086{ 3087 unw_rec_list *list; 3088 int len, size, pad; 3089 3090 /* ??? This code is identical to the first part of ia64_convert_frag. */ 3091 list = (unw_rec_list *) frag->fr_opcode; 3092 fixup_unw_records (list, 0); 3093 3094 len = calc_record_size (list); 3095 /* pad to pointer-size boundary. */ 3096 pad = len % md.pointer_size; 3097 if (pad != 0) 3098 len += md.pointer_size - pad; 3099 /* Add 8 for the header. */ 3100 size = len + 8; 3101 /* Add a pointer for the personality offset. */ 3102 if (frag->fr_offset) 3103 size += md.pointer_size; 3104 3105 /* fr_var carries the max_chars that we created the fragment with. 3106 We must, of course, have allocated enough memory earlier. */ 3107 assert (frag->fr_var >= size); 3108 3109 return frag->fr_fix + size; 3110} 3111 3112/* This function converts a rs_machine_dependent variant frag into a 3113 normal fill frag with the unwind image from the the record list. */ 3114void 3115ia64_convert_frag (fragS *frag) 3116{ 3117 unw_rec_list *list; 3118 int len, size, pad; 3119 valueT flag_value; 3120 3121 /* ??? This code is identical to ia64_estimate_size_before_relax. */ 3122 list = (unw_rec_list *) frag->fr_opcode; 3123 fixup_unw_records (list, 0); 3124 3125 len = calc_record_size (list); 3126 /* pad to pointer-size boundary. */ 3127 pad = len % md.pointer_size; 3128 if (pad != 0) 3129 len += md.pointer_size - pad; 3130 /* Add 8 for the header. */ 3131 size = len + 8; 3132 /* Add a pointer for the personality offset. */ 3133 if (frag->fr_offset) 3134 size += md.pointer_size; 3135 3136 /* fr_var carries the max_chars that we created the fragment with. 3137 We must, of course, have allocated enough memory earlier. */ 3138 assert (frag->fr_var >= size); 3139 3140 /* Initialize the header area. fr_offset is initialized with 3141 unwind.personality_routine. */ 3142 if (frag->fr_offset) 3143 { 3144 if (md.flags & EF_IA_64_ABI64) 3145 flag_value = (bfd_vma) 3 << 32; 3146 else 3147 /* 32-bit unwind info block. */ 3148 flag_value = (bfd_vma) 0x1003 << 32; 3149 } 3150 else 3151 flag_value = 0; 3152 3153 md_number_to_chars (frag->fr_literal, 3154 (((bfd_vma) 1 << 48) /* Version. */ 3155 | flag_value /* U & E handler flags. */ 3156 | (len / md.pointer_size)), /* Length. */ 3157 8); 3158 3159 /* Skip the header. */ 3160 vbyte_mem_ptr = frag->fr_literal + 8; 3161 process_unw_records (list, output_vbyte_mem); 3162 3163 /* Fill the padding bytes with zeros. */ 3164 if (pad != 0) 3165 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0, 3166 md.pointer_size - pad); 3167 3168 frag->fr_fix += size; 3169 frag->fr_type = rs_fill; 3170 frag->fr_var = 0; 3171 frag->fr_offset = 0; 3172} 3173 3174static int 3175parse_predicate_and_operand (e, qp, po) 3176 expressionS * e; 3177 unsigned * qp; 3178 const char * po; 3179{ 3180 int sep = parse_operand (e, ','); 3181 3182 *qp = e->X_add_number - REG_P; 3183 if (e->X_op != O_register || *qp > 63) 3184 { 3185 as_bad ("First operand to .%s must be a predicate", po); 3186 *qp = 0; 3187 } 3188 else if (*qp == 0) 3189 as_warn ("Pointless use of p0 as first operand to .%s", po); 3190 if (sep == ',') 3191 sep = parse_operand (e, ','); 3192 else 3193 e->X_op = O_absent; 3194 return sep; 3195} 3196 3197static void 3198convert_expr_to_ab_reg (e, ab, regp, po, n) 3199 const expressionS *e; 3200 unsigned int *ab; 3201 unsigned int *regp; 3202 const char * po; 3203 int n; 3204{ 3205 unsigned int reg = e->X_add_number; 3206 3207 *ab = *regp = 0; /* Anything valid is good here. */ 3208 3209 if (e->X_op != O_register) 3210 reg = REG_GR; /* Anything invalid is good here. */ 3211 3212 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7)) 3213 { 3214 *ab = 0; 3215 *regp = reg - REG_GR; 3216 } 3217 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5)) 3218 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31))) 3219 { 3220 *ab = 1; 3221 *regp = reg - REG_FR; 3222 } 3223 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5)) 3224 { 3225 *ab = 2; 3226 *regp = reg - REG_BR; 3227 } 3228 else 3229 { 3230 *ab = 3; 3231 switch (reg) 3232 { 3233 case REG_PR: *regp = 0; break; 3234 case REG_PSP: *regp = 1; break; 3235 case REG_PRIUNAT: *regp = 2; break; 3236 case REG_BR + 0: *regp = 3; break; 3237 case REG_AR + AR_BSP: *regp = 4; break; 3238 case REG_AR + AR_BSPSTORE: *regp = 5; break; 3239 case REG_AR + AR_RNAT: *regp = 6; break; 3240 case REG_AR + AR_UNAT: *regp = 7; break; 3241 case REG_AR + AR_FPSR: *regp = 8; break; 3242 case REG_AR + AR_PFS: *regp = 9; break; 3243 case REG_AR + AR_LC: *regp = 10; break; 3244 3245 default: 3246 as_bad ("Operand %d to .%s must be a preserved register", n, po); 3247 break; 3248 } 3249 } 3250} 3251 3252static void 3253convert_expr_to_xy_reg (e, xy, regp, po, n) 3254 const expressionS *e; 3255 unsigned int *xy; 3256 unsigned int *regp; 3257 const char * po; 3258 int n; 3259{ 3260 unsigned int reg = e->X_add_number; 3261 3262 *xy = *regp = 0; /* Anything valid is good here. */ 3263 3264 if (e->X_op != O_register) 3265 reg = REG_GR; /* Anything invalid is good here. */ 3266 3267 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127)) 3268 { 3269 *xy = 0; 3270 *regp = reg - REG_GR; 3271 } 3272 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127)) 3273 { 3274 *xy = 1; 3275 *regp = reg - REG_FR; 3276 } 3277 else if (reg >= REG_BR && reg <= (REG_BR + 7)) 3278 { 3279 *xy = 2; 3280 *regp = reg - REG_BR; 3281 } 3282 else 3283 as_bad ("Operand %d to .%s must be a writable register", n, po); 3284} 3285 3286static void 3287dot_align (int arg) 3288{ 3289 /* The current frag is an alignment frag. */ 3290 align_frag = frag_now; 3291 s_align_bytes (arg); 3292} 3293 3294static void 3295dot_radix (dummy) 3296 int dummy ATTRIBUTE_UNUSED; 3297{ 3298 char *radix; 3299 int ch; 3300 3301 SKIP_WHITESPACE (); 3302 3303 if (is_it_end_of_statement ()) 3304 return; 3305 radix = input_line_pointer; 3306 ch = get_symbol_end (); 3307 ia64_canonicalize_symbol_name (radix); 3308 if (strcasecmp (radix, "C")) 3309 as_bad ("Radix `%s' unsupported or invalid", radix); 3310 *input_line_pointer = ch; 3311 demand_empty_rest_of_line (); 3312} 3313 3314/* Helper function for .loc directives. If the assembler is not generating 3315 line number info, then we need to remember which instructions have a .loc 3316 directive, and only call dwarf2_gen_line_info for those instructions. */ 3317 3318static void 3319dot_loc (int x) 3320{ 3321 CURR_SLOT.loc_directive_seen = 1; 3322 dwarf2_directive_loc (x); 3323} 3324 3325/* .sbss, .bss etc. are macros that expand into ".section SECNAME". */ 3326static void 3327dot_special_section (which) 3328 int which; 3329{ 3330 set_section ((char *) special_section_name[which]); 3331} 3332 3333/* Return -1 for warning and 0 for error. */ 3334 3335static int 3336unwind_diagnostic (const char * region, const char *directive) 3337{ 3338 if (md.unwind_check == unwind_check_warning) 3339 { 3340 as_warn (".%s outside of %s", directive, region); 3341 return -1; 3342 } 3343 else 3344 { 3345 as_bad (".%s outside of %s", directive, region); 3346 ignore_rest_of_line (); 3347 return 0; 3348 } 3349} 3350 3351/* Return 1 if a directive is in a procedure, -1 if a directive isn't in 3352 a procedure but the unwind directive check is set to warning, 0 if 3353 a directive isn't in a procedure and the unwind directive check is set 3354 to error. */ 3355 3356static int 3357in_procedure (const char *directive) 3358{ 3359 if (unwind.proc_pending.sym 3360 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0)) 3361 return 1; 3362 return unwind_diagnostic ("procedure", directive); 3363} 3364 3365/* Return 1 if a directive is in a prologue, -1 if a directive isn't in 3366 a prologue but the unwind directive check is set to warning, 0 if 3367 a directive isn't in a prologue and the unwind directive check is set 3368 to error. */ 3369 3370static int 3371in_prologue (const char *directive) 3372{ 3373 int in = in_procedure (directive); 3374 3375 if (in > 0 && !unwind.prologue) 3376 in = unwind_diagnostic ("prologue", directive); 3377 check_pending_save (); 3378 return in; 3379} 3380 3381/* Return 1 if a directive is in a body, -1 if a directive isn't in 3382 a body but the unwind directive check is set to warning, 0 if 3383 a directive isn't in a body and the unwind directive check is set 3384 to error. */ 3385 3386static int 3387in_body (const char *directive) 3388{ 3389 int in = in_procedure (directive); 3390 3391 if (in > 0 && !unwind.body) 3392 in = unwind_diagnostic ("body region", directive); 3393 return in; 3394} 3395 3396static void 3397add_unwind_entry (ptr, sep) 3398 unw_rec_list *ptr; 3399 int sep; 3400{ 3401 if (ptr) 3402 { 3403 if (unwind.tail) 3404 unwind.tail->next = ptr; 3405 else 3406 unwind.list = ptr; 3407 unwind.tail = ptr; 3408 3409 /* The current entry can in fact be a chain of unwind entries. */ 3410 if (unwind.current_entry == NULL) 3411 unwind.current_entry = ptr; 3412 } 3413 3414 /* The current entry can in fact be a chain of unwind entries. */ 3415 if (unwind.current_entry == NULL) 3416 unwind.current_entry = ptr; 3417 3418 if (sep == ',') 3419 { 3420 /* Parse a tag permitted for the current directive. */ 3421 int ch; 3422 3423 SKIP_WHITESPACE (); 3424 ch = get_symbol_end (); 3425 /* FIXME: For now, just issue a warning that this isn't implemented. */ 3426 { 3427 static int warned; 3428 3429 if (!warned) 3430 { 3431 warned = 1; 3432 as_warn ("Tags on unwind pseudo-ops aren't supported, yet"); 3433 } 3434 } 3435 *input_line_pointer = ch; 3436 } 3437 if (sep != NOT_A_CHAR) 3438 demand_empty_rest_of_line (); 3439} 3440 3441static void 3442dot_fframe (dummy) 3443 int dummy ATTRIBUTE_UNUSED; 3444{ 3445 expressionS e; 3446 int sep; 3447 3448 if (!in_prologue ("fframe")) 3449 return; 3450 3451 sep = parse_operand (&e, ','); 3452 3453 if (e.X_op != O_constant) 3454 { 3455 as_bad ("First operand to .fframe must be a constant"); 3456 e.X_add_number = 0; 3457 } 3458 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep); 3459} 3460 3461static void 3462dot_vframe (dummy) 3463 int dummy ATTRIBUTE_UNUSED; 3464{ 3465 expressionS e; 3466 unsigned reg; 3467 int sep; 3468 3469 if (!in_prologue ("vframe")) 3470 return; 3471 3472 sep = parse_operand (&e, ','); 3473 reg = e.X_add_number - REG_GR; 3474 if (e.X_op != O_register || reg > 127) 3475 { 3476 as_bad ("First operand to .vframe must be a general register"); 3477 reg = 0; 3478 } 3479 add_unwind_entry (output_mem_stack_v (), sep); 3480 if (! (unwind.prologue_mask & 2)) 3481 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR); 3482 else if (reg != unwind.prologue_gr 3483 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1))) 3484 as_warn ("Operand of .vframe contradicts .prologue"); 3485} 3486 3487static void 3488dot_vframesp (psp) 3489 int psp; 3490{ 3491 expressionS e; 3492 int sep; 3493 3494 if (psp) 3495 as_warn (".vframepsp is meaningless, assuming .vframesp was meant"); 3496 3497 if (!in_prologue ("vframesp")) 3498 return; 3499 3500 sep = parse_operand (&e, ','); 3501 if (e.X_op != O_constant) 3502 { 3503 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)"); 3504 e.X_add_number = 0; 3505 } 3506 add_unwind_entry (output_mem_stack_v (), sep); 3507 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR); 3508} 3509 3510static void 3511dot_save (dummy) 3512 int dummy ATTRIBUTE_UNUSED; 3513{ 3514 expressionS e1, e2; 3515 unsigned reg1, reg2; 3516 int sep; 3517 3518 if (!in_prologue ("save")) 3519 return; 3520 3521 sep = parse_operand (&e1, ','); 3522 if (sep == ',') 3523 sep = parse_operand (&e2, ','); 3524 else 3525 e2.X_op = O_absent; 3526 3527 reg1 = e1.X_add_number; 3528 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ 3529 if (e1.X_op != O_register) 3530 { 3531 as_bad ("First operand to .save not a register"); 3532 reg1 = REG_PR; /* Anything valid is good here. */ 3533 } 3534 reg2 = e2.X_add_number - REG_GR; 3535 if (e2.X_op != O_register || reg2 > 127) 3536 { 3537 as_bad ("Second operand to .save not a valid register"); 3538 reg2 = 0; 3539 } 3540 switch (reg1) 3541 { 3542 case REG_AR + AR_BSP: 3543 add_unwind_entry (output_bsp_when (), sep); 3544 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR); 3545 break; 3546 case REG_AR + AR_BSPSTORE: 3547 add_unwind_entry (output_bspstore_when (), sep); 3548 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR); 3549 break; 3550 case REG_AR + AR_RNAT: 3551 add_unwind_entry (output_rnat_when (), sep); 3552 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR); 3553 break; 3554 case REG_AR + AR_UNAT: 3555 add_unwind_entry (output_unat_when (), sep); 3556 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR); 3557 break; 3558 case REG_AR + AR_FPSR: 3559 add_unwind_entry (output_fpsr_when (), sep); 3560 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR); 3561 break; 3562 case REG_AR + AR_PFS: 3563 add_unwind_entry (output_pfs_when (), sep); 3564 if (! (unwind.prologue_mask & 4)) 3565 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR); 3566 else if (reg2 != unwind.prologue_gr 3567 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1))) 3568 as_warn ("Second operand of .save contradicts .prologue"); 3569 break; 3570 case REG_AR + AR_LC: 3571 add_unwind_entry (output_lc_when (), sep); 3572 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR); 3573 break; 3574 case REG_BR: 3575 add_unwind_entry (output_rp_when (), sep); 3576 if (! (unwind.prologue_mask & 8)) 3577 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR); 3578 else if (reg2 != unwind.prologue_gr) 3579 as_warn ("Second operand of .save contradicts .prologue"); 3580 break; 3581 case REG_PR: 3582 add_unwind_entry (output_preds_when (), sep); 3583 if (! (unwind.prologue_mask & 1)) 3584 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR); 3585 else if (reg2 != unwind.prologue_gr 3586 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1))) 3587 as_warn ("Second operand of .save contradicts .prologue"); 3588 break; 3589 case REG_PRIUNAT: 3590 add_unwind_entry (output_priunat_when_gr (), sep); 3591 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR); 3592 break; 3593 default: 3594 as_bad ("First operand to .save not a valid register"); 3595 add_unwind_entry (NULL, sep); 3596 break; 3597 } 3598} 3599 3600static void 3601dot_restore (dummy) 3602 int dummy ATTRIBUTE_UNUSED; 3603{ 3604 expressionS e1; 3605 unsigned long ecount; /* # of _additional_ regions to pop */ 3606 int sep; 3607 3608 if (!in_body ("restore")) 3609 return; 3610 3611 sep = parse_operand (&e1, ','); 3612 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12) 3613 as_bad ("First operand to .restore must be stack pointer (sp)"); 3614 3615 if (sep == ',') 3616 { 3617 expressionS e2; 3618 3619 sep = parse_operand (&e2, ','); 3620 if (e2.X_op != O_constant || e2.X_add_number < 0) 3621 { 3622 as_bad ("Second operand to .restore must be a constant >= 0"); 3623 e2.X_add_number = 0; 3624 } 3625 ecount = e2.X_add_number; 3626 } 3627 else 3628 ecount = unwind.prologue_count - 1; 3629 3630 if (ecount >= unwind.prologue_count) 3631 { 3632 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)", 3633 ecount + 1, unwind.prologue_count); 3634 ecount = 0; 3635 } 3636 3637 add_unwind_entry (output_epilogue (ecount), sep); 3638 3639 if (ecount < unwind.prologue_count) 3640 unwind.prologue_count -= ecount + 1; 3641 else 3642 unwind.prologue_count = 0; 3643} 3644 3645static void 3646dot_restorereg (pred) 3647 int pred; 3648{ 3649 unsigned int qp, ab, reg; 3650 expressionS e; 3651 int sep; 3652 const char * const po = pred ? "restorereg.p" : "restorereg"; 3653 3654 if (!in_procedure (po)) 3655 return; 3656 3657 if (pred) 3658 sep = parse_predicate_and_operand (&e, &qp, po); 3659 else 3660 { 3661 sep = parse_operand (&e, ','); 3662 qp = 0; 3663 } 3664 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); 3665 3666 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep); 3667} 3668 3669static char *special_linkonce_name[] = 3670 { 3671 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi." 3672 }; 3673 3674static void 3675start_unwind_section (const segT text_seg, int sec_index) 3676{ 3677 /* 3678 Use a slightly ugly scheme to derive the unwind section names from 3679 the text section name: 3680 3681 text sect. unwind table sect. 3682 name: name: comments: 3683 ---------- ----------------- -------------------------------- 3684 .text .IA_64.unwind 3685 .text.foo .IA_64.unwind.text.foo 3686 .foo .IA_64.unwind.foo 3687 .gnu.linkonce.t.foo 3688 .gnu.linkonce.ia64unw.foo 3689 _info .IA_64.unwind_info gas issues error message (ditto) 3690 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto) 3691 3692 This mapping is done so that: 3693 3694 (a) An object file with unwind info only in .text will use 3695 unwind section names .IA_64.unwind and .IA_64.unwind_info. 3696 This follows the letter of the ABI and also ensures backwards 3697 compatibility with older toolchains. 3698 3699 (b) An object file with unwind info in multiple text sections 3700 will use separate unwind sections for each text section. 3701 This allows us to properly set the "sh_info" and "sh_link" 3702 fields in SHT_IA_64_UNWIND as required by the ABI and also 3703 lets GNU ld support programs with multiple segments 3704 containing unwind info (as might be the case for certain 3705 embedded applications). 3706 3707 (c) An error is issued if there would be a name clash. 3708 */ 3709 3710 const char *text_name, *sec_text_name; 3711 char *sec_name; 3712 const char *prefix = special_section_name [sec_index]; 3713 const char *suffix; 3714 size_t prefix_len, suffix_len, sec_name_len; 3715 3716 sec_text_name = segment_name (text_seg); 3717 text_name = sec_text_name; 3718 if (strncmp (text_name, "_info", 5) == 0) 3719 { 3720 as_bad ("Illegal section name `%s' (causes unwind section name clash)", 3721 text_name); 3722 ignore_rest_of_line (); 3723 return; 3724 } 3725 if (strcmp (text_name, ".text") == 0) 3726 text_name = ""; 3727 3728 /* Build the unwind section name by appending the (possibly stripped) 3729 text section name to the unwind prefix. */ 3730 suffix = text_name; 3731 if (strncmp (text_name, ".gnu.linkonce.t.", 3732 sizeof (".gnu.linkonce.t.") - 1) == 0) 3733 { 3734 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND]; 3735 suffix += sizeof (".gnu.linkonce.t.") - 1; 3736 } 3737 3738 prefix_len = strlen (prefix); 3739 suffix_len = strlen (suffix); 3740 sec_name_len = prefix_len + suffix_len; 3741 sec_name = alloca (sec_name_len + 1); 3742 memcpy (sec_name, prefix, prefix_len); 3743 memcpy (sec_name + prefix_len, suffix, suffix_len); 3744 sec_name [sec_name_len] = '\0'; 3745 3746 /* Handle COMDAT group. */ 3747 if ((text_seg->flags & SEC_LINK_ONCE) != 0 3748 && (elf_section_flags (text_seg) & SHF_GROUP) != 0) 3749 { 3750 char *section; 3751 size_t len, group_name_len; 3752 const char *group_name = elf_group_name (text_seg); 3753 3754 if (group_name == NULL) 3755 { 3756 as_bad ("Group section `%s' has no group signature", 3757 sec_text_name); 3758 ignore_rest_of_line (); 3759 return; 3760 } 3761 /* We have to construct a fake section directive. */ 3762 group_name_len = strlen (group_name); 3763 len = (sec_name_len 3764 + 16 /* ,"aG",@progbits, */ 3765 + group_name_len /* ,group_name */ 3766 + 7); /* ,comdat */ 3767 3768 section = alloca (len + 1); 3769 memcpy (section, sec_name, sec_name_len); 3770 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16); 3771 memcpy (section + sec_name_len + 16, group_name, group_name_len); 3772 memcpy (section + len - 7, ",comdat", 7); 3773 section [len] = '\0'; 3774 set_section (section); 3775 } 3776 else 3777 { 3778 set_section (sec_name); 3779 bfd_set_section_flags (stdoutput, now_seg, 3780 SEC_LOAD | SEC_ALLOC | SEC_READONLY); 3781 } 3782 3783 elf_linked_to_section (now_seg) = text_seg; 3784} 3785 3786static void 3787generate_unwind_image (const segT text_seg) 3788{ 3789 int size, pad; 3790 unw_rec_list *list; 3791 3792 /* Mark the end of the unwind info, so that we can compute the size of the 3793 last unwind region. */ 3794 add_unwind_entry (output_endp (), NOT_A_CHAR); 3795 3796 /* Force out pending instructions, to make sure all unwind records have 3797 a valid slot_number field. */ 3798 ia64_flush_insns (); 3799 3800 /* Generate the unwind record. */ 3801 list = optimize_unw_records (unwind.list); 3802 fixup_unw_records (list, 1); 3803 size = calc_record_size (list); 3804 3805 if (size > 0 || unwind.force_unwind_entry) 3806 { 3807 unwind.force_unwind_entry = 0; 3808 /* pad to pointer-size boundary. */ 3809 pad = size % md.pointer_size; 3810 if (pad != 0) 3811 size += md.pointer_size - pad; 3812 /* Add 8 for the header. */ 3813 size += 8; 3814 /* Add a pointer for the personality offset. */ 3815 if (unwind.personality_routine) 3816 size += md.pointer_size; 3817 } 3818 3819 /* If there are unwind records, switch sections, and output the info. */ 3820 if (size != 0) 3821 { 3822 expressionS exp; 3823 bfd_reloc_code_real_type reloc; 3824 3825 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO); 3826 3827 /* Make sure the section has 4 byte alignment for ILP32 and 3828 8 byte alignment for LP64. */ 3829 frag_align (md.pointer_size_shift, 0, 0); 3830 record_alignment (now_seg, md.pointer_size_shift); 3831 3832 /* Set expression which points to start of unwind descriptor area. */ 3833 unwind.info = expr_build_dot (); 3834 3835 frag_var (rs_machine_dependent, size, size, 0, 0, 3836 (offsetT) (long) unwind.personality_routine, 3837 (char *) list); 3838 3839 /* Add the personality address to the image. */ 3840 if (unwind.personality_routine != 0) 3841 { 3842 exp.X_op = O_symbol; 3843 exp.X_add_symbol = unwind.personality_routine; 3844 exp.X_add_number = 0; 3845 3846 if (md.flags & EF_IA_64_BE) 3847 { 3848 if (md.flags & EF_IA_64_ABI64) 3849 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB; 3850 else 3851 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB; 3852 } 3853 else 3854 { 3855 if (md.flags & EF_IA_64_ABI64) 3856 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB; 3857 else 3858 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB; 3859 } 3860 3861 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size, 3862 md.pointer_size, &exp, 0, reloc); 3863 unwind.personality_routine = 0; 3864 } 3865 } 3866 3867 free_saved_prologue_counts (); 3868 unwind.list = unwind.tail = unwind.current_entry = NULL; 3869} 3870 3871static void 3872dot_handlerdata (dummy) 3873 int dummy ATTRIBUTE_UNUSED; 3874{ 3875 if (!in_procedure ("handlerdata")) 3876 return; 3877 unwind.force_unwind_entry = 1; 3878 3879 /* Remember which segment we're in so we can switch back after .endp */ 3880 unwind.saved_text_seg = now_seg; 3881 unwind.saved_text_subseg = now_subseg; 3882 3883 /* Generate unwind info into unwind-info section and then leave that 3884 section as the currently active one so dataXX directives go into 3885 the language specific data area of the unwind info block. */ 3886 generate_unwind_image (now_seg); 3887 demand_empty_rest_of_line (); 3888} 3889 3890static void 3891dot_unwentry (dummy) 3892 int dummy ATTRIBUTE_UNUSED; 3893{ 3894 if (!in_procedure ("unwentry")) 3895 return; 3896 unwind.force_unwind_entry = 1; 3897 demand_empty_rest_of_line (); 3898} 3899 3900static void 3901dot_altrp (dummy) 3902 int dummy ATTRIBUTE_UNUSED; 3903{ 3904 expressionS e; 3905 unsigned reg; 3906 3907 if (!in_prologue ("altrp")) 3908 return; 3909 3910 parse_operand (&e, 0); 3911 reg = e.X_add_number - REG_BR; 3912 if (e.X_op != O_register || reg > 7) 3913 { 3914 as_bad ("First operand to .altrp not a valid branch register"); 3915 reg = 0; 3916 } 3917 add_unwind_entry (output_rp_br (reg), 0); 3918} 3919 3920static void 3921dot_savemem (psprel) 3922 int psprel; 3923{ 3924 expressionS e1, e2; 3925 int sep; 3926 int reg1, val; 3927 const char * const po = psprel ? "savepsp" : "savesp"; 3928 3929 if (!in_prologue (po)) 3930 return; 3931 3932 sep = parse_operand (&e1, ','); 3933 if (sep == ',') 3934 sep = parse_operand (&e2, ','); 3935 else 3936 e2.X_op = O_absent; 3937 3938 reg1 = e1.X_add_number; 3939 val = e2.X_add_number; 3940 3941 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */ 3942 if (e1.X_op != O_register) 3943 { 3944 as_bad ("First operand to .%s not a register", po); 3945 reg1 = REG_PR; /* Anything valid is good here. */ 3946 } 3947 if (e2.X_op != O_constant) 3948 { 3949 as_bad ("Second operand to .%s not a constant", po); 3950 val = 0; 3951 } 3952 3953 switch (reg1) 3954 { 3955 case REG_AR + AR_BSP: 3956 add_unwind_entry (output_bsp_when (), sep); 3957 add_unwind_entry ((psprel 3958 ? output_bsp_psprel 3959 : output_bsp_sprel) (val), NOT_A_CHAR); 3960 break; 3961 case REG_AR + AR_BSPSTORE: 3962 add_unwind_entry (output_bspstore_when (), sep); 3963 add_unwind_entry ((psprel 3964 ? output_bspstore_psprel 3965 : output_bspstore_sprel) (val), NOT_A_CHAR); 3966 break; 3967 case REG_AR + AR_RNAT: 3968 add_unwind_entry (output_rnat_when (), sep); 3969 add_unwind_entry ((psprel 3970 ? output_rnat_psprel 3971 : output_rnat_sprel) (val), NOT_A_CHAR); 3972 break; 3973 case REG_AR + AR_UNAT: 3974 add_unwind_entry (output_unat_when (), sep); 3975 add_unwind_entry ((psprel 3976 ? output_unat_psprel 3977 : output_unat_sprel) (val), NOT_A_CHAR); 3978 break; 3979 case REG_AR + AR_FPSR: 3980 add_unwind_entry (output_fpsr_when (), sep); 3981 add_unwind_entry ((psprel 3982 ? output_fpsr_psprel 3983 : output_fpsr_sprel) (val), NOT_A_CHAR); 3984 break; 3985 case REG_AR + AR_PFS: 3986 add_unwind_entry (output_pfs_when (), sep); 3987 add_unwind_entry ((psprel 3988 ? output_pfs_psprel 3989 : output_pfs_sprel) (val), NOT_A_CHAR); 3990 break; 3991 case REG_AR + AR_LC: 3992 add_unwind_entry (output_lc_when (), sep); 3993 add_unwind_entry ((psprel 3994 ? output_lc_psprel 3995 : output_lc_sprel) (val), NOT_A_CHAR); 3996 break; 3997 case REG_BR: 3998 add_unwind_entry (output_rp_when (), sep); 3999 add_unwind_entry ((psprel 4000 ? output_rp_psprel 4001 : output_rp_sprel) (val), NOT_A_CHAR); 4002 break; 4003 case REG_PR: 4004 add_unwind_entry (output_preds_when (), sep); 4005 add_unwind_entry ((psprel 4006 ? output_preds_psprel 4007 : output_preds_sprel) (val), NOT_A_CHAR); 4008 break; 4009 case REG_PRIUNAT: 4010 add_unwind_entry (output_priunat_when_mem (), sep); 4011 add_unwind_entry ((psprel 4012 ? output_priunat_psprel 4013 : output_priunat_sprel) (val), NOT_A_CHAR); 4014 break; 4015 default: 4016 as_bad ("First operand to .%s not a valid register", po); 4017 add_unwind_entry (NULL, sep); 4018 break; 4019 } 4020} 4021 4022static void 4023dot_saveg (dummy) 4024 int dummy ATTRIBUTE_UNUSED; 4025{ 4026 expressionS e; 4027 unsigned grmask; 4028 int sep; 4029 4030 if (!in_prologue ("save.g")) 4031 return; 4032 4033 sep = parse_operand (&e, ','); 4034 4035 grmask = e.X_add_number; 4036 if (e.X_op != O_constant 4037 || e.X_add_number <= 0 4038 || e.X_add_number > 0xf) 4039 { 4040 as_bad ("First operand to .save.g must be a positive 4-bit constant"); 4041 grmask = 0; 4042 } 4043 4044 if (sep == ',') 4045 { 4046 unsigned reg; 4047 int n = popcount (grmask); 4048 4049 parse_operand (&e, 0); 4050 reg = e.X_add_number - REG_GR; 4051 if (e.X_op != O_register || reg > 127) 4052 { 4053 as_bad ("Second operand to .save.g must be a general register"); 4054 reg = 0; 4055 } 4056 else if (reg > 128U - n) 4057 { 4058 as_bad ("Second operand to .save.g must be the first of %d general registers", n); 4059 reg = 0; 4060 } 4061 add_unwind_entry (output_gr_gr (grmask, reg), 0); 4062 } 4063 else 4064 add_unwind_entry (output_gr_mem (grmask), 0); 4065} 4066 4067static void 4068dot_savef (dummy) 4069 int dummy ATTRIBUTE_UNUSED; 4070{ 4071 expressionS e; 4072 4073 if (!in_prologue ("save.f")) 4074 return; 4075 4076 parse_operand (&e, 0); 4077 4078 if (e.X_op != O_constant 4079 || e.X_add_number <= 0 4080 || e.X_add_number > 0xfffff) 4081 { 4082 as_bad ("Operand to .save.f must be a positive 20-bit constant"); 4083 e.X_add_number = 0; 4084 } 4085 add_unwind_entry (output_fr_mem (e.X_add_number), 0); 4086} 4087 4088static void 4089dot_saveb (dummy) 4090 int dummy ATTRIBUTE_UNUSED; 4091{ 4092 expressionS e; 4093 unsigned brmask; 4094 int sep; 4095 4096 if (!in_prologue ("save.b")) 4097 return; 4098 4099 sep = parse_operand (&e, ','); 4100 4101 brmask = e.X_add_number; 4102 if (e.X_op != O_constant 4103 || e.X_add_number <= 0 4104 || e.X_add_number > 0x1f) 4105 { 4106 as_bad ("First operand to .save.b must be a positive 5-bit constant"); 4107 brmask = 0; 4108 } 4109 4110 if (sep == ',') 4111 { 4112 unsigned reg; 4113 int n = popcount (brmask); 4114 4115 parse_operand (&e, 0); 4116 reg = e.X_add_number - REG_GR; 4117 if (e.X_op != O_register || reg > 127) 4118 { 4119 as_bad ("Second operand to .save.b must be a general register"); 4120 reg = 0; 4121 } 4122 else if (reg > 128U - n) 4123 { 4124 as_bad ("Second operand to .save.b must be the first of %d general registers", n); 4125 reg = 0; 4126 } 4127 add_unwind_entry (output_br_gr (brmask, reg), 0); 4128 } 4129 else 4130 add_unwind_entry (output_br_mem (brmask), 0); 4131} 4132 4133static void 4134dot_savegf (dummy) 4135 int dummy ATTRIBUTE_UNUSED; 4136{ 4137 expressionS e1, e2; 4138 4139 if (!in_prologue ("save.gf")) 4140 return; 4141 4142 if (parse_operand (&e1, ',') == ',') 4143 parse_operand (&e2, 0); 4144 else 4145 e2.X_op = O_absent; 4146 4147 if (e1.X_op != O_constant 4148 || e1.X_add_number < 0 4149 || e1.X_add_number > 0xf) 4150 { 4151 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant"); 4152 e1.X_op = O_absent; 4153 e1.X_add_number = 0; 4154 } 4155 if (e2.X_op != O_constant 4156 || e2.X_add_number < 0 4157 || e2.X_add_number > 0xfffff) 4158 { 4159 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant"); 4160 e2.X_op = O_absent; 4161 e2.X_add_number = 0; 4162 } 4163 if (e1.X_op == O_constant 4164 && e2.X_op == O_constant 4165 && e1.X_add_number == 0 4166 && e2.X_add_number == 0) 4167 as_bad ("Operands to .save.gf may not be both zero"); 4168 4169 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0); 4170} 4171 4172static void 4173dot_spill (dummy) 4174 int dummy ATTRIBUTE_UNUSED; 4175{ 4176 expressionS e; 4177 4178 if (!in_prologue ("spill")) 4179 return; 4180 4181 parse_operand (&e, 0); 4182 4183 if (e.X_op != O_constant) 4184 { 4185 as_bad ("Operand to .spill must be a constant"); 4186 e.X_add_number = 0; 4187 } 4188 add_unwind_entry (output_spill_base (e.X_add_number), 0); 4189} 4190 4191static void 4192dot_spillreg (pred) 4193 int pred; 4194{ 4195 int sep; 4196 unsigned int qp, ab, xy, reg, treg; 4197 expressionS e; 4198 const char * const po = pred ? "spillreg.p" : "spillreg"; 4199 4200 if (!in_procedure (po)) 4201 return; 4202 4203 if (pred) 4204 sep = parse_predicate_and_operand (&e, &qp, po); 4205 else 4206 { 4207 sep = parse_operand (&e, ','); 4208 qp = 0; 4209 } 4210 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); 4211 4212 if (sep == ',') 4213 sep = parse_operand (&e, ','); 4214 else 4215 e.X_op = O_absent; 4216 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred); 4217 4218 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep); 4219} 4220 4221static void 4222dot_spillmem (psprel) 4223 int psprel; 4224{ 4225 expressionS e; 4226 int pred = (psprel < 0), sep; 4227 unsigned int qp, ab, reg; 4228 const char * po; 4229 4230 if (pred) 4231 { 4232 psprel = ~psprel; 4233 po = psprel ? "spillpsp.p" : "spillsp.p"; 4234 } 4235 else 4236 po = psprel ? "spillpsp" : "spillsp"; 4237 4238 if (!in_procedure (po)) 4239 return; 4240 4241 if (pred) 4242 sep = parse_predicate_and_operand (&e, &qp, po); 4243 else 4244 { 4245 sep = parse_operand (&e, ','); 4246 qp = 0; 4247 } 4248 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred); 4249 4250 if (sep == ',') 4251 sep = parse_operand (&e, ','); 4252 else 4253 e.X_op = O_absent; 4254 if (e.X_op != O_constant) 4255 { 4256 as_bad ("Operand %d to .%s must be a constant", 2 + pred, po); 4257 e.X_add_number = 0; 4258 } 4259 4260 if (psprel) 4261 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep); 4262 else 4263 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep); 4264} 4265 4266static unsigned int 4267get_saved_prologue_count (lbl) 4268 unsigned long lbl; 4269{ 4270 label_prologue_count *lpc = unwind.saved_prologue_counts; 4271 4272 while (lpc != NULL && lpc->label_number != lbl) 4273 lpc = lpc->next; 4274 4275 if (lpc != NULL) 4276 return lpc->prologue_count; 4277 4278 as_bad ("Missing .label_state %ld", lbl); 4279 return 1; 4280} 4281 4282static void 4283save_prologue_count (lbl, count) 4284 unsigned long lbl; 4285 unsigned int count; 4286{ 4287 label_prologue_count *lpc = unwind.saved_prologue_counts; 4288 4289 while (lpc != NULL && lpc->label_number != lbl) 4290 lpc = lpc->next; 4291 4292 if (lpc != NULL) 4293 lpc->prologue_count = count; 4294 else 4295 { 4296 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc)); 4297 4298 new_lpc->next = unwind.saved_prologue_counts; 4299 new_lpc->label_number = lbl; 4300 new_lpc->prologue_count = count; 4301 unwind.saved_prologue_counts = new_lpc; 4302 } 4303} 4304 4305static void 4306free_saved_prologue_counts () 4307{ 4308 label_prologue_count *lpc = unwind.saved_prologue_counts; 4309 label_prologue_count *next; 4310 4311 while (lpc != NULL) 4312 { 4313 next = lpc->next; 4314 free (lpc); 4315 lpc = next; 4316 } 4317 4318 unwind.saved_prologue_counts = NULL; 4319} 4320 4321static void 4322dot_label_state (dummy) 4323 int dummy ATTRIBUTE_UNUSED; 4324{ 4325 expressionS e; 4326 4327 if (!in_body ("label_state")) 4328 return; 4329 4330 parse_operand (&e, 0); 4331 if (e.X_op == O_constant) 4332 save_prologue_count (e.X_add_number, unwind.prologue_count); 4333 else 4334 { 4335 as_bad ("Operand to .label_state must be a constant"); 4336 e.X_add_number = 0; 4337 } 4338 add_unwind_entry (output_label_state (e.X_add_number), 0); 4339} 4340 4341static void 4342dot_copy_state (dummy) 4343 int dummy ATTRIBUTE_UNUSED; 4344{ 4345 expressionS e; 4346 4347 if (!in_body ("copy_state")) 4348 return; 4349 4350 parse_operand (&e, 0); 4351 if (e.X_op == O_constant) 4352 unwind.prologue_count = get_saved_prologue_count (e.X_add_number); 4353 else 4354 { 4355 as_bad ("Operand to .copy_state must be a constant"); 4356 e.X_add_number = 0; 4357 } 4358 add_unwind_entry (output_copy_state (e.X_add_number), 0); 4359} 4360 4361static void 4362dot_unwabi (dummy) 4363 int dummy ATTRIBUTE_UNUSED; 4364{ 4365 expressionS e1, e2; 4366 unsigned char sep; 4367 4368 if (!in_prologue ("unwabi")) 4369 return; 4370 4371 sep = parse_operand (&e1, ','); 4372 if (sep == ',') 4373 parse_operand (&e2, 0); 4374 else 4375 e2.X_op = O_absent; 4376 4377 if (e1.X_op != O_constant) 4378 { 4379 as_bad ("First operand to .unwabi must be a constant"); 4380 e1.X_add_number = 0; 4381 } 4382 4383 if (e2.X_op != O_constant) 4384 { 4385 as_bad ("Second operand to .unwabi must be a constant"); 4386 e2.X_add_number = 0; 4387 } 4388 4389 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0); 4390} 4391 4392static void 4393dot_personality (dummy) 4394 int dummy ATTRIBUTE_UNUSED; 4395{ 4396 char *name, *p, c; 4397 if (!in_procedure ("personality")) 4398 return; 4399 SKIP_WHITESPACE (); 4400 name = input_line_pointer; 4401 c = get_symbol_end (); 4402 p = input_line_pointer; 4403 unwind.personality_routine = symbol_find_or_make (name); 4404 unwind.force_unwind_entry = 1; 4405 *p = c; 4406 SKIP_WHITESPACE (); 4407 demand_empty_rest_of_line (); 4408} 4409 4410static void 4411dot_proc (dummy) 4412 int dummy ATTRIBUTE_UNUSED; 4413{ 4414 char *name, *p, c; 4415 symbolS *sym; 4416 proc_pending *pending, *last_pending; 4417 4418 if (unwind.proc_pending.sym) 4419 { 4420 (md.unwind_check == unwind_check_warning 4421 ? as_warn 4422 : as_bad) ("Missing .endp after previous .proc"); 4423 while (unwind.proc_pending.next) 4424 { 4425 pending = unwind.proc_pending.next; 4426 unwind.proc_pending.next = pending->next; 4427 free (pending); 4428 } 4429 } 4430 last_pending = NULL; 4431 4432 /* Parse names of main and alternate entry points and mark them as 4433 function symbols: */ 4434 while (1) 4435 { 4436 SKIP_WHITESPACE (); 4437 name = input_line_pointer; 4438 c = get_symbol_end (); 4439 p = input_line_pointer; 4440 if (!*name) 4441 as_bad ("Empty argument of .proc"); 4442 else 4443 { 4444 sym = symbol_find_or_make (name); 4445 if (S_IS_DEFINED (sym)) 4446 as_bad ("`%s' was already defined", name); 4447 else if (!last_pending) 4448 { 4449 unwind.proc_pending.sym = sym; 4450 last_pending = &unwind.proc_pending; 4451 } 4452 else 4453 { 4454 pending = xmalloc (sizeof (*pending)); 4455 pending->sym = sym; 4456 last_pending = last_pending->next = pending; 4457 } 4458 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; 4459 } 4460 *p = c; 4461 SKIP_WHITESPACE (); 4462 if (*input_line_pointer != ',') 4463 break; 4464 ++input_line_pointer; 4465 } 4466 if (!last_pending) 4467 { 4468 unwind.proc_pending.sym = expr_build_dot (); 4469 last_pending = &unwind.proc_pending; 4470 } 4471 last_pending->next = NULL; 4472 demand_empty_rest_of_line (); 4473 ia64_do_align (16); 4474 4475 unwind.prologue = 0; 4476 unwind.prologue_count = 0; 4477 unwind.body = 0; 4478 unwind.insn = 0; 4479 unwind.list = unwind.tail = unwind.current_entry = NULL; 4480 unwind.personality_routine = 0; 4481} 4482 4483static void 4484dot_body (dummy) 4485 int dummy ATTRIBUTE_UNUSED; 4486{ 4487 if (!in_procedure ("body")) 4488 return; 4489 if (!unwind.prologue && !unwind.body && unwind.insn) 4490 as_warn ("Initial .body should precede any instructions"); 4491 check_pending_save (); 4492 4493 unwind.prologue = 0; 4494 unwind.prologue_mask = 0; 4495 unwind.body = 1; 4496 4497 add_unwind_entry (output_body (), 0); 4498} 4499 4500static void 4501dot_prologue (dummy) 4502 int dummy ATTRIBUTE_UNUSED; 4503{ 4504 unsigned mask = 0, grsave = 0; 4505 4506 if (!in_procedure ("prologue")) 4507 return; 4508 if (unwind.prologue) 4509 { 4510 as_bad (".prologue within prologue"); 4511 ignore_rest_of_line (); 4512 return; 4513 } 4514 if (!unwind.body && unwind.insn) 4515 as_warn ("Initial .prologue should precede any instructions"); 4516 4517 if (!is_it_end_of_statement ()) 4518 { 4519 expressionS e; 4520 int n, sep = parse_operand (&e, ','); 4521 4522 if (e.X_op != O_constant 4523 || e.X_add_number < 0 4524 || e.X_add_number > 0xf) 4525 as_bad ("First operand to .prologue must be a positive 4-bit constant"); 4526 else if (e.X_add_number == 0) 4527 as_warn ("Pointless use of zero first operand to .prologue"); 4528 else 4529 mask = e.X_add_number; 4530 n = popcount (mask); 4531 4532 if (sep == ',') 4533 parse_operand (&e, 0); 4534 else 4535 e.X_op = O_absent; 4536 if (e.X_op == O_constant 4537 && e.X_add_number >= 0 4538 && e.X_add_number < 128) 4539 { 4540 if (md.unwind_check == unwind_check_error) 4541 as_warn ("Using a constant as second operand to .prologue is deprecated"); 4542 grsave = e.X_add_number; 4543 } 4544 else if (e.X_op != O_register 4545 || (grsave = e.X_add_number - REG_GR) > 127) 4546 { 4547 as_bad ("Second operand to .prologue must be a general register"); 4548 grsave = 0; 4549 } 4550 else if (grsave > 128U - n) 4551 { 4552 as_bad ("Second operand to .prologue must be the first of %d general registers", n); 4553 grsave = 0; 4554 } 4555 4556 } 4557 4558 if (mask) 4559 add_unwind_entry (output_prologue_gr (mask, grsave), 0); 4560 else 4561 add_unwind_entry (output_prologue (), 0); 4562 4563 unwind.prologue = 1; 4564 unwind.prologue_mask = mask; 4565 unwind.prologue_gr = grsave; 4566 unwind.body = 0; 4567 ++unwind.prologue_count; 4568} 4569 4570static void 4571dot_endp (dummy) 4572 int dummy ATTRIBUTE_UNUSED; 4573{ 4574 expressionS e; 4575 int bytes_per_address; 4576 long where; 4577 segT saved_seg; 4578 subsegT saved_subseg; 4579 proc_pending *pending; 4580 int unwind_check = md.unwind_check; 4581 4582 md.unwind_check = unwind_check_error; 4583 if (!in_procedure ("endp")) 4584 return; 4585 md.unwind_check = unwind_check; 4586 4587 if (unwind.saved_text_seg) 4588 { 4589 saved_seg = unwind.saved_text_seg; 4590 saved_subseg = unwind.saved_text_subseg; 4591 unwind.saved_text_seg = NULL; 4592 } 4593 else 4594 { 4595 saved_seg = now_seg; 4596 saved_subseg = now_subseg; 4597 } 4598 4599 insn_group_break (1, 0, 0); 4600 4601 /* If there wasn't a .handlerdata, we haven't generated an image yet. */ 4602 if (!unwind.info) 4603 generate_unwind_image (saved_seg); 4604 4605 if (unwind.info || unwind.force_unwind_entry) 4606 { 4607 symbolS *proc_end; 4608 4609 subseg_set (md.last_text_seg, 0); 4610 proc_end = expr_build_dot (); 4611 4612 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND); 4613 4614 /* Make sure that section has 4 byte alignment for ILP32 and 4615 8 byte alignment for LP64. */ 4616 record_alignment (now_seg, md.pointer_size_shift); 4617 4618 /* Need space for 3 pointers for procedure start, procedure end, 4619 and unwind info. */ 4620 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size); 4621 where = frag_now_fix () - (3 * md.pointer_size); 4622 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8; 4623 4624 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */ 4625 e.X_op = O_pseudo_fixup; 4626 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; 4627 e.X_add_number = 0; 4628 if (!S_IS_LOCAL (unwind.proc_pending.sym) 4629 && S_IS_DEFINED (unwind.proc_pending.sym)) 4630 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym), 4631 S_GET_VALUE (unwind.proc_pending.sym), 4632 symbol_get_frag (unwind.proc_pending.sym)); 4633 else 4634 e.X_add_symbol = unwind.proc_pending.sym; 4635 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e); 4636 4637 e.X_op = O_pseudo_fixup; 4638 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; 4639 e.X_add_number = 0; 4640 e.X_add_symbol = proc_end; 4641 ia64_cons_fix_new (frag_now, where + bytes_per_address, 4642 bytes_per_address, &e); 4643 4644 if (unwind.info) 4645 { 4646 e.X_op = O_pseudo_fixup; 4647 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym; 4648 e.X_add_number = 0; 4649 e.X_add_symbol = unwind.info; 4650 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2), 4651 bytes_per_address, &e); 4652 } 4653 } 4654 subseg_set (saved_seg, saved_subseg); 4655 4656 /* Set symbol sizes. */ 4657 pending = &unwind.proc_pending; 4658 if (S_GET_NAME (pending->sym)) 4659 { 4660 do 4661 { 4662 symbolS *sym = pending->sym; 4663 4664 if (!S_IS_DEFINED (sym)) 4665 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym)); 4666 else if (S_GET_SIZE (sym) == 0 4667 && symbol_get_obj (sym)->size == NULL) 4668 { 4669 fragS *frag = symbol_get_frag (sym); 4670 4671 if (frag) 4672 { 4673 if (frag == frag_now && SEG_NORMAL (now_seg)) 4674 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym)); 4675 else 4676 { 4677 symbol_get_obj (sym)->size = 4678 (expressionS *) xmalloc (sizeof (expressionS)); 4679 symbol_get_obj (sym)->size->X_op = O_subtract; 4680 symbol_get_obj (sym)->size->X_add_symbol 4681 = symbol_new (FAKE_LABEL_NAME, now_seg, 4682 frag_now_fix (), frag_now); 4683 symbol_get_obj (sym)->size->X_op_symbol = sym; 4684 symbol_get_obj (sym)->size->X_add_number = 0; 4685 } 4686 } 4687 } 4688 } while ((pending = pending->next) != NULL); 4689 } 4690 4691 /* Parse names of main and alternate entry points. */ 4692 while (1) 4693 { 4694 char *name, *p, c; 4695 4696 SKIP_WHITESPACE (); 4697 name = input_line_pointer; 4698 c = get_symbol_end (); 4699 p = input_line_pointer; 4700 if (!*name) 4701 (md.unwind_check == unwind_check_warning 4702 ? as_warn 4703 : as_bad) ("Empty argument of .endp"); 4704 else 4705 { 4706 symbolS *sym = symbol_find (name); 4707 4708 for (pending = &unwind.proc_pending; pending; pending = pending->next) 4709 { 4710 if (sym == pending->sym) 4711 { 4712 pending->sym = NULL; 4713 break; 4714 } 4715 } 4716 if (!sym || !pending) 4717 as_warn ("`%s' was not specified with previous .proc", name); 4718 } 4719 *p = c; 4720 SKIP_WHITESPACE (); 4721 if (*input_line_pointer != ',') 4722 break; 4723 ++input_line_pointer; 4724 } 4725 demand_empty_rest_of_line (); 4726 4727 /* Deliberately only checking for the main entry point here; the 4728 language spec even says all arguments to .endp are ignored. */ 4729 if (unwind.proc_pending.sym 4730 && S_GET_NAME (unwind.proc_pending.sym) 4731 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME)) 4732 as_warn ("`%s' should be an operand to this .endp", 4733 S_GET_NAME (unwind.proc_pending.sym)); 4734 while (unwind.proc_pending.next) 4735 { 4736 pending = unwind.proc_pending.next; 4737 unwind.proc_pending.next = pending->next; 4738 free (pending); 4739 } 4740 unwind.proc_pending.sym = unwind.info = NULL; 4741} 4742 4743static void 4744dot_template (template) 4745 int template; 4746{ 4747 CURR_SLOT.user_template = template; 4748} 4749 4750static void 4751dot_regstk (dummy) 4752 int dummy ATTRIBUTE_UNUSED; 4753{ 4754 int ins, locs, outs, rots; 4755 4756 if (is_it_end_of_statement ()) 4757 ins = locs = outs = rots = 0; 4758 else 4759 { 4760 ins = get_absolute_expression (); 4761 if (*input_line_pointer++ != ',') 4762 goto err; 4763 locs = get_absolute_expression (); 4764 if (*input_line_pointer++ != ',') 4765 goto err; 4766 outs = get_absolute_expression (); 4767 if (*input_line_pointer++ != ',') 4768 goto err; 4769 rots = get_absolute_expression (); 4770 } 4771 set_regstack (ins, locs, outs, rots); 4772 return; 4773 4774 err: 4775 as_bad ("Comma expected"); 4776 ignore_rest_of_line (); 4777} 4778 4779static void 4780dot_rot (type) 4781 int type; 4782{ 4783 offsetT num_regs; 4784 valueT num_alloced = 0; 4785 struct dynreg **drpp, *dr; 4786 int ch, base_reg = 0; 4787 char *name, *start; 4788 size_t len; 4789 4790 switch (type) 4791 { 4792 case DYNREG_GR: base_reg = REG_GR + 32; break; 4793 case DYNREG_FR: base_reg = REG_FR + 32; break; 4794 case DYNREG_PR: base_reg = REG_P + 16; break; 4795 default: break; 4796 } 4797 4798 /* First, remove existing names from hash table. */ 4799 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next) 4800 { 4801 hash_delete (md.dynreg_hash, dr->name); 4802 /* FIXME: Free dr->name. */ 4803 dr->num_regs = 0; 4804 } 4805 4806 drpp = &md.dynreg[type]; 4807 while (1) 4808 { 4809 start = input_line_pointer; 4810 ch = get_symbol_end (); 4811 len = strlen (ia64_canonicalize_symbol_name (start)); 4812 *input_line_pointer = ch; 4813 4814 SKIP_WHITESPACE (); 4815 if (*input_line_pointer != '[') 4816 { 4817 as_bad ("Expected '['"); 4818 goto err; 4819 } 4820 ++input_line_pointer; /* skip '[' */ 4821 4822 num_regs = get_absolute_expression (); 4823 4824 if (*input_line_pointer++ != ']') 4825 { 4826 as_bad ("Expected ']'"); 4827 goto err; 4828 } 4829 if (num_regs <= 0) 4830 { 4831 as_bad ("Number of elements must be positive"); 4832 goto err; 4833 } 4834 SKIP_WHITESPACE (); 4835 4836 num_alloced += num_regs; 4837 switch (type) 4838 { 4839 case DYNREG_GR: 4840 if (num_alloced > md.rot.num_regs) 4841 { 4842 as_bad ("Used more than the declared %d rotating registers", 4843 md.rot.num_regs); 4844 goto err; 4845 } 4846 break; 4847 case DYNREG_FR: 4848 if (num_alloced > 96) 4849 { 4850 as_bad ("Used more than the available 96 rotating registers"); 4851 goto err; 4852 } 4853 break; 4854 case DYNREG_PR: 4855 if (num_alloced > 48) 4856 { 4857 as_bad ("Used more than the available 48 rotating registers"); 4858 goto err; 4859 } 4860 break; 4861 4862 default: 4863 break; 4864 } 4865 4866 if (!*drpp) 4867 { 4868 *drpp = obstack_alloc (¬es, sizeof (*dr)); 4869 memset (*drpp, 0, sizeof (*dr)); 4870 } 4871 4872 name = obstack_alloc (¬es, len + 1); 4873 memcpy (name, start, len); 4874 name[len] = '\0'; 4875 4876 dr = *drpp; 4877 dr->name = name; 4878 dr->num_regs = num_regs; 4879 dr->base = base_reg; 4880 drpp = &dr->next; 4881 base_reg += num_regs; 4882 4883 if (hash_insert (md.dynreg_hash, name, dr)) 4884 { 4885 as_bad ("Attempt to redefine register set `%s'", name); 4886 obstack_free (¬es, name); 4887 goto err; 4888 } 4889 4890 if (*input_line_pointer != ',') 4891 break; 4892 ++input_line_pointer; /* skip comma */ 4893 SKIP_WHITESPACE (); 4894 } 4895 demand_empty_rest_of_line (); 4896 return; 4897 4898 err: 4899 ignore_rest_of_line (); 4900} 4901 4902static void 4903dot_byteorder (byteorder) 4904 int byteorder; 4905{ 4906 segment_info_type *seginfo = seg_info (now_seg); 4907 4908 if (byteorder == -1) 4909 { 4910 if (seginfo->tc_segment_info_data.endian == 0) 4911 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2; 4912 byteorder = seginfo->tc_segment_info_data.endian == 1; 4913 } 4914 else 4915 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2; 4916 4917 if (target_big_endian != byteorder) 4918 { 4919 target_big_endian = byteorder; 4920 if (target_big_endian) 4921 { 4922 ia64_number_to_chars = number_to_chars_bigendian; 4923 ia64_float_to_chars = ia64_float_to_chars_bigendian; 4924 } 4925 else 4926 { 4927 ia64_number_to_chars = number_to_chars_littleendian; 4928 ia64_float_to_chars = ia64_float_to_chars_littleendian; 4929 } 4930 } 4931} 4932 4933static void 4934dot_psr (dummy) 4935 int dummy ATTRIBUTE_UNUSED; 4936{ 4937 char *option; 4938 int ch; 4939 4940 while (1) 4941 { 4942 option = input_line_pointer; 4943 ch = get_symbol_end (); 4944 if (strcmp (option, "lsb") == 0) 4945 md.flags &= ~EF_IA_64_BE; 4946 else if (strcmp (option, "msb") == 0) 4947 md.flags |= EF_IA_64_BE; 4948 else if (strcmp (option, "abi32") == 0) 4949 md.flags &= ~EF_IA_64_ABI64; 4950 else if (strcmp (option, "abi64") == 0) 4951 md.flags |= EF_IA_64_ABI64; 4952 else 4953 as_bad ("Unknown psr option `%s'", option); 4954 *input_line_pointer = ch; 4955 4956 SKIP_WHITESPACE (); 4957 if (*input_line_pointer != ',') 4958 break; 4959 4960 ++input_line_pointer; 4961 SKIP_WHITESPACE (); 4962 } 4963 demand_empty_rest_of_line (); 4964} 4965 4966static void 4967dot_ln (dummy) 4968 int dummy ATTRIBUTE_UNUSED; 4969{ 4970 new_logical_line (0, get_absolute_expression ()); 4971 demand_empty_rest_of_line (); 4972} 4973 4974static void 4975cross_section (ref, cons, ua) 4976 int ref; 4977 void (*cons) PARAMS((int)); 4978 int ua; 4979{ 4980 char *start, *end; 4981 int saved_auto_align; 4982 unsigned int section_count; 4983 4984 SKIP_WHITESPACE (); 4985 start = input_line_pointer; 4986 if (*start == '"') 4987 { 4988 int len; 4989 char *name; 4990 4991 name = demand_copy_C_string (&len); 4992 obstack_free(¬es, name); 4993 if (!name) 4994 { 4995 ignore_rest_of_line (); 4996 return; 4997 } 4998 } 4999 else 5000 { 5001 char c = get_symbol_end (); 5002 5003 if (input_line_pointer == start) 5004 { 5005 as_bad ("Missing section name"); 5006 ignore_rest_of_line (); 5007 return; 5008 } 5009 *input_line_pointer = c; 5010 } 5011 end = input_line_pointer; 5012 SKIP_WHITESPACE (); 5013 if (*input_line_pointer != ',') 5014 { 5015 as_bad ("Comma expected after section name"); 5016 ignore_rest_of_line (); 5017 return; 5018 } 5019 *end = '\0'; 5020 end = input_line_pointer + 1; /* skip comma */ 5021 input_line_pointer = start; 5022 md.keep_pending_output = 1; 5023 section_count = bfd_count_sections(stdoutput); 5024 obj_elf_section (0); 5025 if (section_count != bfd_count_sections(stdoutput)) 5026 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated."); 5027 input_line_pointer = end; 5028 saved_auto_align = md.auto_align; 5029 if (ua) 5030 md.auto_align = 0; 5031 (*cons) (ref); 5032 if (ua) 5033 md.auto_align = saved_auto_align; 5034 obj_elf_previous (0); 5035 md.keep_pending_output = 0; 5036} 5037 5038static void 5039dot_xdata (size) 5040 int size; 5041{ 5042 cross_section (size, cons, 0); 5043} 5044 5045/* Why doesn't float_cons() call md_cons_align() the way cons() does? */ 5046 5047static void 5048stmt_float_cons (kind) 5049 int kind; 5050{ 5051 size_t alignment; 5052 5053 switch (kind) 5054 { 5055 case 'd': 5056 alignment = 8; 5057 break; 5058 5059 case 'x': 5060 case 'X': 5061 alignment = 16; 5062 break; 5063 5064 case 'f': 5065 default: 5066 alignment = 4; 5067 break; 5068 } 5069 ia64_do_align (alignment); 5070 float_cons (kind); 5071} 5072 5073static void 5074stmt_cons_ua (size) 5075 int size; 5076{ 5077 int saved_auto_align = md.auto_align; 5078 5079 md.auto_align = 0; 5080 cons (size); 5081 md.auto_align = saved_auto_align; 5082} 5083 5084static void 5085dot_xfloat_cons (kind) 5086 int kind; 5087{ 5088 cross_section (kind, stmt_float_cons, 0); 5089} 5090 5091static void 5092dot_xstringer (zero) 5093 int zero; 5094{ 5095 cross_section (zero, stringer, 0); 5096} 5097 5098static void 5099dot_xdata_ua (size) 5100 int size; 5101{ 5102 cross_section (size, cons, 1); 5103} 5104 5105static void 5106dot_xfloat_cons_ua (kind) 5107 int kind; 5108{ 5109 cross_section (kind, float_cons, 1); 5110} 5111 5112/* .reg.val <regname>,value */ 5113 5114static void 5115dot_reg_val (dummy) 5116 int dummy ATTRIBUTE_UNUSED; 5117{ 5118 expressionS reg; 5119 5120 expression_and_evaluate (®); 5121 if (reg.X_op != O_register) 5122 { 5123 as_bad (_("Register name expected")); 5124 ignore_rest_of_line (); 5125 } 5126 else if (*input_line_pointer++ != ',') 5127 { 5128 as_bad (_("Comma expected")); 5129 ignore_rest_of_line (); 5130 } 5131 else 5132 { 5133 valueT value = get_absolute_expression (); 5134 int regno = reg.X_add_number; 5135 if (regno <= REG_GR || regno > REG_GR + 127) 5136 as_warn (_("Register value annotation ignored")); 5137 else 5138 { 5139 gr_values[regno - REG_GR].known = 1; 5140 gr_values[regno - REG_GR].value = value; 5141 gr_values[regno - REG_GR].path = md.path; 5142 } 5143 } 5144 demand_empty_rest_of_line (); 5145} 5146 5147/* 5148 .serialize.data 5149 .serialize.instruction 5150 */ 5151static void 5152dot_serialize (type) 5153 int type; 5154{ 5155 insn_group_break (0, 0, 0); 5156 if (type) 5157 instruction_serialization (); 5158 else 5159 data_serialization (); 5160 insn_group_break (0, 0, 0); 5161 demand_empty_rest_of_line (); 5162} 5163 5164/* select dv checking mode 5165 .auto 5166 .explicit 5167 .default 5168 5169 A stop is inserted when changing modes 5170 */ 5171 5172static void 5173dot_dv_mode (type) 5174 int type; 5175{ 5176 if (md.manual_bundling) 5177 as_warn (_("Directive invalid within a bundle")); 5178 5179 if (type == 'E' || type == 'A') 5180 md.mode_explicitly_set = 0; 5181 else 5182 md.mode_explicitly_set = 1; 5183 5184 md.detect_dv = 1; 5185 switch (type) 5186 { 5187 case 'A': 5188 case 'a': 5189 if (md.explicit_mode) 5190 insn_group_break (1, 0, 0); 5191 md.explicit_mode = 0; 5192 break; 5193 case 'E': 5194 case 'e': 5195 if (!md.explicit_mode) 5196 insn_group_break (1, 0, 0); 5197 md.explicit_mode = 1; 5198 break; 5199 default: 5200 case 'd': 5201 if (md.explicit_mode != md.default_explicit_mode) 5202 insn_group_break (1, 0, 0); 5203 md.explicit_mode = md.default_explicit_mode; 5204 md.mode_explicitly_set = 0; 5205 break; 5206 } 5207} 5208 5209static void 5210print_prmask (mask) 5211 valueT mask; 5212{ 5213 int regno; 5214 char *comma = ""; 5215 for (regno = 0; regno < 64; regno++) 5216 { 5217 if (mask & ((valueT) 1 << regno)) 5218 { 5219 fprintf (stderr, "%s p%d", comma, regno); 5220 comma = ","; 5221 } 5222 } 5223} 5224 5225/* 5226 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear) 5227 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply) 5228 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex) 5229 .pred.safe_across_calls p1 [, p2 [,...]] 5230 */ 5231 5232static void 5233dot_pred_rel (type) 5234 int type; 5235{ 5236 valueT mask = 0; 5237 int count = 0; 5238 int p1 = -1, p2 = -1; 5239 5240 if (type == 0) 5241 { 5242 if (*input_line_pointer == '"') 5243 { 5244 int len; 5245 char *form = demand_copy_C_string (&len); 5246 5247 if (strcmp (form, "mutex") == 0) 5248 type = 'm'; 5249 else if (strcmp (form, "clear") == 0) 5250 type = 'c'; 5251 else if (strcmp (form, "imply") == 0) 5252 type = 'i'; 5253 obstack_free (¬es, form); 5254 } 5255 else if (*input_line_pointer == '@') 5256 { 5257 char *form = ++input_line_pointer; 5258 char c = get_symbol_end(); 5259 5260 if (strcmp (form, "mutex") == 0) 5261 type = 'm'; 5262 else if (strcmp (form, "clear") == 0) 5263 type = 'c'; 5264 else if (strcmp (form, "imply") == 0) 5265 type = 'i'; 5266 *input_line_pointer = c; 5267 } 5268 else 5269 { 5270 as_bad (_("Missing predicate relation type")); 5271 ignore_rest_of_line (); 5272 return; 5273 } 5274 if (type == 0) 5275 { 5276 as_bad (_("Unrecognized predicate relation type")); 5277 ignore_rest_of_line (); 5278 return; 5279 } 5280 if (*input_line_pointer == ',') 5281 ++input_line_pointer; 5282 SKIP_WHITESPACE (); 5283 } 5284 5285 SKIP_WHITESPACE (); 5286 while (1) 5287 { 5288 valueT bits = 1; 5289 int regno; 5290 expressionS pr, *pr1, *pr2; 5291 5292 expression_and_evaluate (&pr); 5293 if (pr.X_op == O_register 5294 && pr.X_add_number >= REG_P 5295 && pr.X_add_number <= REG_P + 63) 5296 { 5297 regno = pr.X_add_number - REG_P; 5298 bits <<= regno; 5299 count++; 5300 if (p1 == -1) 5301 p1 = regno; 5302 else if (p2 == -1) 5303 p2 = regno; 5304 } 5305 else if (type != 'i' 5306 && pr.X_op == O_subtract 5307 && (pr1 = symbol_get_value_expression (pr.X_add_symbol)) 5308 && pr1->X_op == O_register 5309 && pr1->X_add_number >= REG_P 5310 && pr1->X_add_number <= REG_P + 63 5311 && (pr2 = symbol_get_value_expression (pr.X_op_symbol)) 5312 && pr2->X_op == O_register 5313 && pr2->X_add_number >= REG_P 5314 && pr2->X_add_number <= REG_P + 63) 5315 { 5316 /* It's a range. */ 5317 int stop; 5318 5319 regno = pr1->X_add_number - REG_P; 5320 stop = pr2->X_add_number - REG_P; 5321 if (regno >= stop) 5322 { 5323 as_bad (_("Bad register range")); 5324 ignore_rest_of_line (); 5325 return; 5326 } 5327 bits = ((bits << stop) << 1) - (bits << regno); 5328 count += stop - regno + 1; 5329 } 5330 else 5331 { 5332 as_bad (_("Predicate register expected")); 5333 ignore_rest_of_line (); 5334 return; 5335 } 5336 if (mask & bits) 5337 as_warn (_("Duplicate predicate register ignored")); 5338 mask |= bits; 5339 if (*input_line_pointer != ',') 5340 break; 5341 ++input_line_pointer; 5342 SKIP_WHITESPACE (); 5343 } 5344 5345 switch (type) 5346 { 5347 case 'c': 5348 if (count == 0) 5349 mask = ~(valueT) 0; 5350 clear_qp_mutex (mask); 5351 clear_qp_implies (mask, (valueT) 0); 5352 break; 5353 case 'i': 5354 if (count != 2 || p1 == -1 || p2 == -1) 5355 as_bad (_("Predicate source and target required")); 5356 else if (p1 == 0 || p2 == 0) 5357 as_bad (_("Use of p0 is not valid in this context")); 5358 else 5359 add_qp_imply (p1, p2); 5360 break; 5361 case 'm': 5362 if (count < 2) 5363 { 5364 as_bad (_("At least two PR arguments expected")); 5365 break; 5366 } 5367 else if (mask & 1) 5368 { 5369 as_bad (_("Use of p0 is not valid in this context")); 5370 break; 5371 } 5372 add_qp_mutex (mask); 5373 break; 5374 case 's': 5375 /* note that we don't override any existing relations */ 5376 if (count == 0) 5377 { 5378 as_bad (_("At least one PR argument expected")); 5379 break; 5380 } 5381 if (md.debug_dv) 5382 { 5383 fprintf (stderr, "Safe across calls: "); 5384 print_prmask (mask); 5385 fprintf (stderr, "\n"); 5386 } 5387 qp_safe_across_calls = mask; 5388 break; 5389 } 5390 demand_empty_rest_of_line (); 5391} 5392 5393/* .entry label [, label [, ...]] 5394 Hint to DV code that the given labels are to be considered entry points. 5395 Otherwise, only global labels are considered entry points. */ 5396 5397static void 5398dot_entry (dummy) 5399 int dummy ATTRIBUTE_UNUSED; 5400{ 5401 const char *err; 5402 char *name; 5403 int c; 5404 symbolS *symbolP; 5405 5406 do 5407 { 5408 name = input_line_pointer; 5409 c = get_symbol_end (); 5410 symbolP = symbol_find_or_make (name); 5411 5412 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP); 5413 if (err) 5414 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"), 5415 name, err); 5416 5417 *input_line_pointer = c; 5418 SKIP_WHITESPACE (); 5419 c = *input_line_pointer; 5420 if (c == ',') 5421 { 5422 input_line_pointer++; 5423 SKIP_WHITESPACE (); 5424 if (*input_line_pointer == '\n') 5425 c = '\n'; 5426 } 5427 } 5428 while (c == ','); 5429 5430 demand_empty_rest_of_line (); 5431} 5432 5433/* .mem.offset offset, base 5434 "base" is used to distinguish between offsets from a different base. */ 5435 5436static void 5437dot_mem_offset (dummy) 5438 int dummy ATTRIBUTE_UNUSED; 5439{ 5440 md.mem_offset.hint = 1; 5441 md.mem_offset.offset = get_absolute_expression (); 5442 if (*input_line_pointer != ',') 5443 { 5444 as_bad (_("Comma expected")); 5445 ignore_rest_of_line (); 5446 return; 5447 } 5448 ++input_line_pointer; 5449 md.mem_offset.base = get_absolute_expression (); 5450 demand_empty_rest_of_line (); 5451} 5452 5453/* ia64-specific pseudo-ops: */ 5454const pseudo_typeS md_pseudo_table[] = 5455 { 5456 { "radix", dot_radix, 0 }, 5457 { "lcomm", s_lcomm_bytes, 1 }, 5458 { "loc", dot_loc, 0 }, 5459 { "bss", dot_special_section, SPECIAL_SECTION_BSS }, 5460 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS }, 5461 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA }, 5462 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA }, 5463 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT }, 5464 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND }, 5465 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO }, 5466 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY }, 5467 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY }, 5468 { "proc", dot_proc, 0 }, 5469 { "body", dot_body, 0 }, 5470 { "prologue", dot_prologue, 0 }, 5471 { "endp", dot_endp, 0 }, 5472 5473 { "fframe", dot_fframe, 0 }, 5474 { "vframe", dot_vframe, 0 }, 5475 { "vframesp", dot_vframesp, 0 }, 5476 { "vframepsp", dot_vframesp, 1 }, 5477 { "save", dot_save, 0 }, 5478 { "restore", dot_restore, 0 }, 5479 { "restorereg", dot_restorereg, 0 }, 5480 { "restorereg.p", dot_restorereg, 1 }, 5481 { "handlerdata", dot_handlerdata, 0 }, 5482 { "unwentry", dot_unwentry, 0 }, 5483 { "altrp", dot_altrp, 0 }, 5484 { "savesp", dot_savemem, 0 }, 5485 { "savepsp", dot_savemem, 1 }, 5486 { "save.g", dot_saveg, 0 }, 5487 { "save.f", dot_savef, 0 }, 5488 { "save.b", dot_saveb, 0 }, 5489 { "save.gf", dot_savegf, 0 }, 5490 { "spill", dot_spill, 0 }, 5491 { "spillreg", dot_spillreg, 0 }, 5492 { "spillsp", dot_spillmem, 0 }, 5493 { "spillpsp", dot_spillmem, 1 }, 5494 { "spillreg.p", dot_spillreg, 1 }, 5495 { "spillsp.p", dot_spillmem, ~0 }, 5496 { "spillpsp.p", dot_spillmem, ~1 }, 5497 { "label_state", dot_label_state, 0 }, 5498 { "copy_state", dot_copy_state, 0 }, 5499 { "unwabi", dot_unwabi, 0 }, 5500 { "personality", dot_personality, 0 }, 5501 { "mii", dot_template, 0x0 }, 5502 { "mli", dot_template, 0x2 }, /* old format, for compatibility */ 5503 { "mlx", dot_template, 0x2 }, 5504 { "mmi", dot_template, 0x4 }, 5505 { "mfi", dot_template, 0x6 }, 5506 { "mmf", dot_template, 0x7 }, 5507 { "mib", dot_template, 0x8 }, 5508 { "mbb", dot_template, 0x9 }, 5509 { "bbb", dot_template, 0xb }, 5510 { "mmb", dot_template, 0xc }, 5511 { "mfb", dot_template, 0xe }, 5512 { "align", dot_align, 0 }, 5513 { "regstk", dot_regstk, 0 }, 5514 { "rotr", dot_rot, DYNREG_GR }, 5515 { "rotf", dot_rot, DYNREG_FR }, 5516 { "rotp", dot_rot, DYNREG_PR }, 5517 { "lsb", dot_byteorder, 0 }, 5518 { "msb", dot_byteorder, 1 }, 5519 { "psr", dot_psr, 0 }, 5520 { "alias", dot_alias, 0 }, 5521 { "secalias", dot_alias, 1 }, 5522 { "ln", dot_ln, 0 }, /* source line info (for debugging) */ 5523 5524 { "xdata1", dot_xdata, 1 }, 5525 { "xdata2", dot_xdata, 2 }, 5526 { "xdata4", dot_xdata, 4 }, 5527 { "xdata8", dot_xdata, 8 }, 5528 { "xdata16", dot_xdata, 16 }, 5529 { "xreal4", dot_xfloat_cons, 'f' }, 5530 { "xreal8", dot_xfloat_cons, 'd' }, 5531 { "xreal10", dot_xfloat_cons, 'x' }, 5532 { "xreal16", dot_xfloat_cons, 'X' }, 5533 { "xstring", dot_xstringer, 0 }, 5534 { "xstringz", dot_xstringer, 1 }, 5535 5536 /* unaligned versions: */ 5537 { "xdata2.ua", dot_xdata_ua, 2 }, 5538 { "xdata4.ua", dot_xdata_ua, 4 }, 5539 { "xdata8.ua", dot_xdata_ua, 8 }, 5540 { "xdata16.ua", dot_xdata_ua, 16 }, 5541 { "xreal4.ua", dot_xfloat_cons_ua, 'f' }, 5542 { "xreal8.ua", dot_xfloat_cons_ua, 'd' }, 5543 { "xreal10.ua", dot_xfloat_cons_ua, 'x' }, 5544 { "xreal16.ua", dot_xfloat_cons_ua, 'X' }, 5545 5546 /* annotations/DV checking support */ 5547 { "entry", dot_entry, 0 }, 5548 { "mem.offset", dot_mem_offset, 0 }, 5549 { "pred.rel", dot_pred_rel, 0 }, 5550 { "pred.rel.clear", dot_pred_rel, 'c' }, 5551 { "pred.rel.imply", dot_pred_rel, 'i' }, 5552 { "pred.rel.mutex", dot_pred_rel, 'm' }, 5553 { "pred.safe_across_calls", dot_pred_rel, 's' }, 5554 { "reg.val", dot_reg_val, 0 }, 5555 { "serialize.data", dot_serialize, 0 }, 5556 { "serialize.instruction", dot_serialize, 1 }, 5557 { "auto", dot_dv_mode, 'a' }, 5558 { "explicit", dot_dv_mode, 'e' }, 5559 { "default", dot_dv_mode, 'd' }, 5560 5561 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work. 5562 IA-64 aligns data allocation pseudo-ops by default, so we have to 5563 tell it that these ones are supposed to be unaligned. Long term, 5564 should rewrite so that only IA-64 specific data allocation pseudo-ops 5565 are aligned by default. */ 5566 {"2byte", stmt_cons_ua, 2}, 5567 {"4byte", stmt_cons_ua, 4}, 5568 {"8byte", stmt_cons_ua, 8}, 5569 5570 { NULL, 0, 0 } 5571 }; 5572 5573static const struct pseudo_opcode 5574 { 5575 const char *name; 5576 void (*handler) (int); 5577 int arg; 5578 } 5579pseudo_opcode[] = 5580 { 5581 /* these are more like pseudo-ops, but don't start with a dot */ 5582 { "data1", cons, 1 }, 5583 { "data2", cons, 2 }, 5584 { "data4", cons, 4 }, 5585 { "data8", cons, 8 }, 5586 { "data16", cons, 16 }, 5587 { "real4", stmt_float_cons, 'f' }, 5588 { "real8", stmt_float_cons, 'd' }, 5589 { "real10", stmt_float_cons, 'x' }, 5590 { "real16", stmt_float_cons, 'X' }, 5591 { "string", stringer, 0 }, 5592 { "stringz", stringer, 1 }, 5593 5594 /* unaligned versions: */ 5595 { "data2.ua", stmt_cons_ua, 2 }, 5596 { "data4.ua", stmt_cons_ua, 4 }, 5597 { "data8.ua", stmt_cons_ua, 8 }, 5598 { "data16.ua", stmt_cons_ua, 16 }, 5599 { "real4.ua", float_cons, 'f' }, 5600 { "real8.ua", float_cons, 'd' }, 5601 { "real10.ua", float_cons, 'x' }, 5602 { "real16.ua", float_cons, 'X' }, 5603 }; 5604 5605/* Declare a register by creating a symbol for it and entering it in 5606 the symbol table. */ 5607 5608static symbolS * 5609declare_register (name, regnum) 5610 const char *name; 5611 unsigned int regnum; 5612{ 5613 const char *err; 5614 symbolS *sym; 5615 5616 sym = symbol_create (name, reg_section, regnum, &zero_address_frag); 5617 5618 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym); 5619 if (err) 5620 as_fatal ("Inserting \"%s\" into register table failed: %s", 5621 name, err); 5622 5623 return sym; 5624} 5625 5626static void 5627declare_register_set (prefix, num_regs, base_regnum) 5628 const char *prefix; 5629 unsigned int num_regs; 5630 unsigned int base_regnum; 5631{ 5632 char name[8]; 5633 unsigned int i; 5634 5635 for (i = 0; i < num_regs; ++i) 5636 { 5637 snprintf (name, sizeof (name), "%s%u", prefix, i); 5638 declare_register (name, base_regnum + i); 5639 } 5640} 5641 5642static unsigned int 5643operand_width (opnd) 5644 enum ia64_opnd opnd; 5645{ 5646 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd]; 5647 unsigned int bits = 0; 5648 int i; 5649 5650 bits = 0; 5651 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i) 5652 bits += odesc->field[i].bits; 5653 5654 return bits; 5655} 5656 5657static enum operand_match_result 5658operand_match (idesc, index, e) 5659 const struct ia64_opcode *idesc; 5660 int index; 5661 expressionS *e; 5662{ 5663 enum ia64_opnd opnd = idesc->operands[index]; 5664 int bits, relocatable = 0; 5665 struct insn_fix *fix; 5666 bfd_signed_vma val; 5667 5668 switch (opnd) 5669 { 5670 /* constants: */ 5671 5672 case IA64_OPND_AR_CCV: 5673 if (e->X_op == O_register && e->X_add_number == REG_AR + 32) 5674 return OPERAND_MATCH; 5675 break; 5676 5677 case IA64_OPND_AR_CSD: 5678 if (e->X_op == O_register && e->X_add_number == REG_AR + 25) 5679 return OPERAND_MATCH; 5680 break; 5681 5682 case IA64_OPND_AR_PFS: 5683 if (e->X_op == O_register && e->X_add_number == REG_AR + 64) 5684 return OPERAND_MATCH; 5685 break; 5686 5687 case IA64_OPND_GR0: 5688 if (e->X_op == O_register && e->X_add_number == REG_GR + 0) 5689 return OPERAND_MATCH; 5690 break; 5691 5692 case IA64_OPND_IP: 5693 if (e->X_op == O_register && e->X_add_number == REG_IP) 5694 return OPERAND_MATCH; 5695 break; 5696 5697 case IA64_OPND_PR: 5698 if (e->X_op == O_register && e->X_add_number == REG_PR) 5699 return OPERAND_MATCH; 5700 break; 5701 5702 case IA64_OPND_PR_ROT: 5703 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT) 5704 return OPERAND_MATCH; 5705 break; 5706 5707 case IA64_OPND_PSR: 5708 if (e->X_op == O_register && e->X_add_number == REG_PSR) 5709 return OPERAND_MATCH; 5710 break; 5711 5712 case IA64_OPND_PSR_L: 5713 if (e->X_op == O_register && e->X_add_number == REG_PSR_L) 5714 return OPERAND_MATCH; 5715 break; 5716 5717 case IA64_OPND_PSR_UM: 5718 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM) 5719 return OPERAND_MATCH; 5720 break; 5721 5722 case IA64_OPND_C1: 5723 if (e->X_op == O_constant) 5724 { 5725 if (e->X_add_number == 1) 5726 return OPERAND_MATCH; 5727 else 5728 return OPERAND_OUT_OF_RANGE; 5729 } 5730 break; 5731 5732 case IA64_OPND_C8: 5733 if (e->X_op == O_constant) 5734 { 5735 if (e->X_add_number == 8) 5736 return OPERAND_MATCH; 5737 else 5738 return OPERAND_OUT_OF_RANGE; 5739 } 5740 break; 5741 5742 case IA64_OPND_C16: 5743 if (e->X_op == O_constant) 5744 { 5745 if (e->X_add_number == 16) 5746 return OPERAND_MATCH; 5747 else 5748 return OPERAND_OUT_OF_RANGE; 5749 } 5750 break; 5751 5752 /* register operands: */ 5753 5754 case IA64_OPND_AR3: 5755 if (e->X_op == O_register && e->X_add_number >= REG_AR 5756 && e->X_add_number < REG_AR + 128) 5757 return OPERAND_MATCH; 5758 break; 5759 5760 case IA64_OPND_B1: 5761 case IA64_OPND_B2: 5762 if (e->X_op == O_register && e->X_add_number >= REG_BR 5763 && e->X_add_number < REG_BR + 8) 5764 return OPERAND_MATCH; 5765 break; 5766 5767 case IA64_OPND_CR3: 5768 if (e->X_op == O_register && e->X_add_number >= REG_CR 5769 && e->X_add_number < REG_CR + 128) 5770 return OPERAND_MATCH; 5771 break; 5772 5773 case IA64_OPND_F1: 5774 case IA64_OPND_F2: 5775 case IA64_OPND_F3: 5776 case IA64_OPND_F4: 5777 if (e->X_op == O_register && e->X_add_number >= REG_FR 5778 && e->X_add_number < REG_FR + 128) 5779 return OPERAND_MATCH; 5780 break; 5781 5782 case IA64_OPND_P1: 5783 case IA64_OPND_P2: 5784 if (e->X_op == O_register && e->X_add_number >= REG_P 5785 && e->X_add_number < REG_P + 64) 5786 return OPERAND_MATCH; 5787 break; 5788 5789 case IA64_OPND_R1: 5790 case IA64_OPND_R2: 5791 case IA64_OPND_R3: 5792 if (e->X_op == O_register && e->X_add_number >= REG_GR 5793 && e->X_add_number < REG_GR + 128) 5794 return OPERAND_MATCH; 5795 break; 5796 5797 case IA64_OPND_R3_2: 5798 if (e->X_op == O_register && e->X_add_number >= REG_GR) 5799 { 5800 if (e->X_add_number < REG_GR + 4) 5801 return OPERAND_MATCH; 5802 else if (e->X_add_number < REG_GR + 128) 5803 return OPERAND_OUT_OF_RANGE; 5804 } 5805 break; 5806 5807 /* indirect operands: */ 5808 case IA64_OPND_CPUID_R3: 5809 case IA64_OPND_DBR_R3: 5810 case IA64_OPND_DTR_R3: 5811 case IA64_OPND_ITR_R3: 5812 case IA64_OPND_IBR_R3: 5813 case IA64_OPND_MSR_R3: 5814 case IA64_OPND_PKR_R3: 5815 case IA64_OPND_PMC_R3: 5816 case IA64_OPND_PMD_R3: 5817 case IA64_OPND_RR_R3: 5818 if (e->X_op == O_index && e->X_op_symbol 5819 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID 5820 == opnd - IA64_OPND_CPUID_R3)) 5821 return OPERAND_MATCH; 5822 break; 5823 5824 case IA64_OPND_MR3: 5825 if (e->X_op == O_index && !e->X_op_symbol) 5826 return OPERAND_MATCH; 5827 break; 5828 5829 /* immediate operands: */ 5830 case IA64_OPND_CNT2a: 5831 case IA64_OPND_LEN4: 5832 case IA64_OPND_LEN6: 5833 bits = operand_width (idesc->operands[index]); 5834 if (e->X_op == O_constant) 5835 { 5836 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits)) 5837 return OPERAND_MATCH; 5838 else 5839 return OPERAND_OUT_OF_RANGE; 5840 } 5841 break; 5842 5843 case IA64_OPND_CNT2b: 5844 if (e->X_op == O_constant) 5845 { 5846 if ((bfd_vma) (e->X_add_number - 1) < 3) 5847 return OPERAND_MATCH; 5848 else 5849 return OPERAND_OUT_OF_RANGE; 5850 } 5851 break; 5852 5853 case IA64_OPND_CNT2c: 5854 val = e->X_add_number; 5855 if (e->X_op == O_constant) 5856 { 5857 if ((val == 0 || val == 7 || val == 15 || val == 16)) 5858 return OPERAND_MATCH; 5859 else 5860 return OPERAND_OUT_OF_RANGE; 5861 } 5862 break; 5863 5864 case IA64_OPND_SOR: 5865 /* SOR must be an integer multiple of 8 */ 5866 if (e->X_op == O_constant && e->X_add_number & 0x7) 5867 return OPERAND_OUT_OF_RANGE; 5868 case IA64_OPND_SOF: 5869 case IA64_OPND_SOL: 5870 if (e->X_op == O_constant) 5871 { 5872 if ((bfd_vma) e->X_add_number <= 96) 5873 return OPERAND_MATCH; 5874 else 5875 return OPERAND_OUT_OF_RANGE; 5876 } 5877 break; 5878 5879 case IA64_OPND_IMMU62: 5880 if (e->X_op == O_constant) 5881 { 5882 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62)) 5883 return OPERAND_MATCH; 5884 else 5885 return OPERAND_OUT_OF_RANGE; 5886 } 5887 else 5888 { 5889 /* FIXME -- need 62-bit relocation type */ 5890 as_bad (_("62-bit relocation not yet implemented")); 5891 } 5892 break; 5893 5894 case IA64_OPND_IMMU64: 5895 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup 5896 || e->X_op == O_subtract) 5897 { 5898 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; 5899 fix->code = BFD_RELOC_IA64_IMM64; 5900 if (e->X_op != O_subtract) 5901 { 5902 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); 5903 if (e->X_op == O_pseudo_fixup) 5904 e->X_op = O_symbol; 5905 } 5906 5907 fix->opnd = idesc->operands[index]; 5908 fix->expr = *e; 5909 fix->is_pcrel = 0; 5910 ++CURR_SLOT.num_fixups; 5911 return OPERAND_MATCH; 5912 } 5913 else if (e->X_op == O_constant) 5914 return OPERAND_MATCH; 5915 break; 5916 5917 case IA64_OPND_IMMU5b: 5918 if (e->X_op == O_constant) 5919 { 5920 val = e->X_add_number; 5921 if (val >= 32 && val <= 63) 5922 return OPERAND_MATCH; 5923 else 5924 return OPERAND_OUT_OF_RANGE; 5925 } 5926 break; 5927 5928 case IA64_OPND_CCNT5: 5929 case IA64_OPND_CNT5: 5930 case IA64_OPND_CNT6: 5931 case IA64_OPND_CPOS6a: 5932 case IA64_OPND_CPOS6b: 5933 case IA64_OPND_CPOS6c: 5934 case IA64_OPND_IMMU2: 5935 case IA64_OPND_IMMU7a: 5936 case IA64_OPND_IMMU7b: 5937 case IA64_OPND_IMMU21: 5938 case IA64_OPND_IMMU24: 5939 case IA64_OPND_MBTYPE4: 5940 case IA64_OPND_MHTYPE8: 5941 case IA64_OPND_POS6: 5942 bits = operand_width (idesc->operands[index]); 5943 if (e->X_op == O_constant) 5944 { 5945 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) 5946 return OPERAND_MATCH; 5947 else 5948 return OPERAND_OUT_OF_RANGE; 5949 } 5950 break; 5951 5952 case IA64_OPND_IMMU9: 5953 bits = operand_width (idesc->operands[index]); 5954 if (e->X_op == O_constant) 5955 { 5956 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits)) 5957 { 5958 int lobits = e->X_add_number & 0x3; 5959 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0) 5960 e->X_add_number |= (bfd_vma) 0x3; 5961 return OPERAND_MATCH; 5962 } 5963 else 5964 return OPERAND_OUT_OF_RANGE; 5965 } 5966 break; 5967 5968 case IA64_OPND_IMM44: 5969 /* least 16 bits must be zero */ 5970 if ((e->X_add_number & 0xffff) != 0) 5971 /* XXX technically, this is wrong: we should not be issuing warning 5972 messages until we're sure this instruction pattern is going to 5973 be used! */ 5974 as_warn (_("lower 16 bits of mask ignored")); 5975 5976 if (e->X_op == O_constant) 5977 { 5978 if (((e->X_add_number >= 0 5979 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44)) 5980 || (e->X_add_number < 0 5981 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44)))) 5982 { 5983 /* sign-extend */ 5984 if (e->X_add_number >= 0 5985 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0) 5986 { 5987 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1); 5988 } 5989 return OPERAND_MATCH; 5990 } 5991 else 5992 return OPERAND_OUT_OF_RANGE; 5993 } 5994 break; 5995 5996 case IA64_OPND_IMM17: 5997 /* bit 0 is a don't care (pr0 is hardwired to 1) */ 5998 if (e->X_op == O_constant) 5999 { 6000 if (((e->X_add_number >= 0 6001 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17)) 6002 || (e->X_add_number < 0 6003 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17)))) 6004 { 6005 /* sign-extend */ 6006 if (e->X_add_number >= 0 6007 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0) 6008 { 6009 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1); 6010 } 6011 return OPERAND_MATCH; 6012 } 6013 else 6014 return OPERAND_OUT_OF_RANGE; 6015 } 6016 break; 6017 6018 case IA64_OPND_IMM14: 6019 case IA64_OPND_IMM22: 6020 relocatable = 1; 6021 case IA64_OPND_IMM1: 6022 case IA64_OPND_IMM8: 6023 case IA64_OPND_IMM8U4: 6024 case IA64_OPND_IMM8M1: 6025 case IA64_OPND_IMM8M1U4: 6026 case IA64_OPND_IMM8M1U8: 6027 case IA64_OPND_IMM9a: 6028 case IA64_OPND_IMM9b: 6029 bits = operand_width (idesc->operands[index]); 6030 if (relocatable && (e->X_op == O_symbol 6031 || e->X_op == O_subtract 6032 || e->X_op == O_pseudo_fixup)) 6033 { 6034 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; 6035 6036 if (idesc->operands[index] == IA64_OPND_IMM14) 6037 fix->code = BFD_RELOC_IA64_IMM14; 6038 else 6039 fix->code = BFD_RELOC_IA64_IMM22; 6040 6041 if (e->X_op != O_subtract) 6042 { 6043 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); 6044 if (e->X_op == O_pseudo_fixup) 6045 e->X_op = O_symbol; 6046 } 6047 6048 fix->opnd = idesc->operands[index]; 6049 fix->expr = *e; 6050 fix->is_pcrel = 0; 6051 ++CURR_SLOT.num_fixups; 6052 return OPERAND_MATCH; 6053 } 6054 else if (e->X_op != O_constant 6055 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8)) 6056 return OPERAND_MISMATCH; 6057 6058 if (opnd == IA64_OPND_IMM8M1U4) 6059 { 6060 /* Zero is not valid for unsigned compares that take an adjusted 6061 constant immediate range. */ 6062 if (e->X_add_number == 0) 6063 return OPERAND_OUT_OF_RANGE; 6064 6065 /* Sign-extend 32-bit unsigned numbers, so that the following range 6066 checks will work. */ 6067 val = e->X_add_number; 6068 if (((val & (~(bfd_vma) 0 << 32)) == 0) 6069 && ((val & ((bfd_vma) 1 << 31)) != 0)) 6070 val = ((val << 32) >> 32); 6071 6072 /* Check for 0x100000000. This is valid because 6073 0x100000000-1 is the same as ((uint32_t) -1). */ 6074 if (val == ((bfd_signed_vma) 1 << 32)) 6075 return OPERAND_MATCH; 6076 6077 val = val - 1; 6078 } 6079 else if (opnd == IA64_OPND_IMM8M1U8) 6080 { 6081 /* Zero is not valid for unsigned compares that take an adjusted 6082 constant immediate range. */ 6083 if (e->X_add_number == 0) 6084 return OPERAND_OUT_OF_RANGE; 6085 6086 /* Check for 0x10000000000000000. */ 6087 if (e->X_op == O_big) 6088 { 6089 if (generic_bignum[0] == 0 6090 && generic_bignum[1] == 0 6091 && generic_bignum[2] == 0 6092 && generic_bignum[3] == 0 6093 && generic_bignum[4] == 1) 6094 return OPERAND_MATCH; 6095 else 6096 return OPERAND_OUT_OF_RANGE; 6097 } 6098 else 6099 val = e->X_add_number - 1; 6100 } 6101 else if (opnd == IA64_OPND_IMM8M1) 6102 val = e->X_add_number - 1; 6103 else if (opnd == IA64_OPND_IMM8U4) 6104 { 6105 /* Sign-extend 32-bit unsigned numbers, so that the following range 6106 checks will work. */ 6107 val = e->X_add_number; 6108 if (((val & (~(bfd_vma) 0 << 32)) == 0) 6109 && ((val & ((bfd_vma) 1 << 31)) != 0)) 6110 val = ((val << 32) >> 32); 6111 } 6112 else 6113 val = e->X_add_number; 6114 6115 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1))) 6116 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1)))) 6117 return OPERAND_MATCH; 6118 else 6119 return OPERAND_OUT_OF_RANGE; 6120 6121 case IA64_OPND_INC3: 6122 /* +/- 1, 4, 8, 16 */ 6123 val = e->X_add_number; 6124 if (val < 0) 6125 val = -val; 6126 if (e->X_op == O_constant) 6127 { 6128 if ((val == 1 || val == 4 || val == 8 || val == 16)) 6129 return OPERAND_MATCH; 6130 else 6131 return OPERAND_OUT_OF_RANGE; 6132 } 6133 break; 6134 6135 case IA64_OPND_TGT25: 6136 case IA64_OPND_TGT25b: 6137 case IA64_OPND_TGT25c: 6138 case IA64_OPND_TGT64: 6139 if (e->X_op == O_symbol) 6140 { 6141 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; 6142 if (opnd == IA64_OPND_TGT25) 6143 fix->code = BFD_RELOC_IA64_PCREL21F; 6144 else if (opnd == IA64_OPND_TGT25b) 6145 fix->code = BFD_RELOC_IA64_PCREL21M; 6146 else if (opnd == IA64_OPND_TGT25c) 6147 fix->code = BFD_RELOC_IA64_PCREL21B; 6148 else if (opnd == IA64_OPND_TGT64) 6149 fix->code = BFD_RELOC_IA64_PCREL60B; 6150 else 6151 abort (); 6152 6153 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); 6154 fix->opnd = idesc->operands[index]; 6155 fix->expr = *e; 6156 fix->is_pcrel = 1; 6157 ++CURR_SLOT.num_fixups; 6158 return OPERAND_MATCH; 6159 } 6160 case IA64_OPND_TAG13: 6161 case IA64_OPND_TAG13b: 6162 switch (e->X_op) 6163 { 6164 case O_constant: 6165 return OPERAND_MATCH; 6166 6167 case O_symbol: 6168 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; 6169 /* There are no external relocs for TAG13/TAG13b fields, so we 6170 create a dummy reloc. This will not live past md_apply_fix. */ 6171 fix->code = BFD_RELOC_UNUSED; 6172 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code); 6173 fix->opnd = idesc->operands[index]; 6174 fix->expr = *e; 6175 fix->is_pcrel = 1; 6176 ++CURR_SLOT.num_fixups; 6177 return OPERAND_MATCH; 6178 6179 default: 6180 break; 6181 } 6182 break; 6183 6184 case IA64_OPND_LDXMOV: 6185 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups; 6186 fix->code = BFD_RELOC_IA64_LDXMOV; 6187 fix->opnd = idesc->operands[index]; 6188 fix->expr = *e; 6189 fix->is_pcrel = 0; 6190 ++CURR_SLOT.num_fixups; 6191 return OPERAND_MATCH; 6192 6193 default: 6194 break; 6195 } 6196 return OPERAND_MISMATCH; 6197} 6198 6199static int 6200parse_operand (e, more) 6201 expressionS *e; 6202 int more; 6203{ 6204 int sep = '\0'; 6205 6206 memset (e, 0, sizeof (*e)); 6207 e->X_op = O_absent; 6208 SKIP_WHITESPACE (); 6209 expression_and_evaluate (e); 6210 sep = *input_line_pointer; 6211 if (more && (sep == ',' || sep == more)) 6212 ++input_line_pointer; 6213 return sep; 6214} 6215 6216/* Returns the next entry in the opcode table that matches the one in 6217 IDESC, and frees the entry in IDESC. If no matching entry is 6218 found, NULL is returned instead. */ 6219 6220static struct ia64_opcode * 6221get_next_opcode (struct ia64_opcode *idesc) 6222{ 6223 struct ia64_opcode *next = ia64_find_next_opcode (idesc); 6224 ia64_free_opcode (idesc); 6225 return next; 6226} 6227 6228/* Parse the operands for the opcode and find the opcode variant that 6229 matches the specified operands, or NULL if no match is possible. */ 6230 6231static struct ia64_opcode * 6232parse_operands (idesc) 6233 struct ia64_opcode *idesc; 6234{ 6235 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0; 6236 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0; 6237 int reg1, reg2; 6238 char reg_class; 6239 enum ia64_opnd expected_operand = IA64_OPND_NIL; 6240 enum operand_match_result result; 6241 char mnemonic[129]; 6242 char *first_arg = 0, *end, *saved_input_pointer; 6243 unsigned int sof; 6244 6245 assert (strlen (idesc->name) <= 128); 6246 6247 strcpy (mnemonic, idesc->name); 6248 if (idesc->operands[2] == IA64_OPND_SOF 6249 || idesc->operands[1] == IA64_OPND_SOF) 6250 { 6251 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we 6252 can't parse the first operand until we have parsed the 6253 remaining operands of the "alloc" instruction. */ 6254 SKIP_WHITESPACE (); 6255 first_arg = input_line_pointer; 6256 end = strchr (input_line_pointer, '='); 6257 if (!end) 6258 { 6259 as_bad ("Expected separator `='"); 6260 return 0; 6261 } 6262 input_line_pointer = end + 1; 6263 ++i; 6264 ++num_outputs; 6265 } 6266 6267 for (; ; ++i) 6268 { 6269 if (i < NELEMS (CURR_SLOT.opnd)) 6270 { 6271 sep = parse_operand (CURR_SLOT.opnd + i, '='); 6272 if (CURR_SLOT.opnd[i].X_op == O_absent) 6273 break; 6274 } 6275 else 6276 { 6277 expressionS dummy; 6278 6279 sep = parse_operand (&dummy, '='); 6280 if (dummy.X_op == O_absent) 6281 break; 6282 } 6283 6284 ++num_operands; 6285 6286 if (sep != '=' && sep != ',') 6287 break; 6288 6289 if (sep == '=') 6290 { 6291 if (num_outputs > 0) 6292 as_bad ("Duplicate equal sign (=) in instruction"); 6293 else 6294 num_outputs = i + 1; 6295 } 6296 } 6297 if (sep != '\0') 6298 { 6299 as_bad ("Illegal operand separator `%c'", sep); 6300 return 0; 6301 } 6302 6303 if (idesc->operands[2] == IA64_OPND_SOF 6304 || idesc->operands[1] == IA64_OPND_SOF) 6305 { 6306 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r. 6307 Note, however, that due to that mapping operand numbers in error 6308 messages for any of the constant operands will not be correct. */ 6309 know (strcmp (idesc->name, "alloc") == 0); 6310 /* The first operand hasn't been parsed/initialized, yet (but 6311 num_operands intentionally doesn't account for that). */ 6312 i = num_operands > 4 ? 2 : 1; 6313#define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \ 6314 ? CURR_SLOT.opnd[n].X_add_number \ 6315 : 0) 6316 sof = set_regstack (FORCE_CONST(i), 6317 FORCE_CONST(i + 1), 6318 FORCE_CONST(i + 2), 6319 FORCE_CONST(i + 3)); 6320#undef FORCE_CONST 6321 6322 /* now we can parse the first arg: */ 6323 saved_input_pointer = input_line_pointer; 6324 input_line_pointer = first_arg; 6325 sep = parse_operand (CURR_SLOT.opnd + 0, '='); 6326 if (sep != '=') 6327 --num_outputs; /* force error */ 6328 input_line_pointer = saved_input_pointer; 6329 6330 CURR_SLOT.opnd[i].X_add_number = sof; 6331 if (CURR_SLOT.opnd[i + 1].X_op == O_constant 6332 && CURR_SLOT.opnd[i + 2].X_op == O_constant) 6333 CURR_SLOT.opnd[i + 1].X_add_number 6334 = sof - CURR_SLOT.opnd[i + 2].X_add_number; 6335 else 6336 CURR_SLOT.opnd[i + 1].X_op = O_illegal; 6337 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3]; 6338 } 6339 6340 highest_unmatched_operand = -4; 6341 curr_out_of_range_pos = -1; 6342 error_pos = 0; 6343 for (; idesc; idesc = get_next_opcode (idesc)) 6344 { 6345 if (num_outputs != idesc->num_outputs) 6346 continue; /* mismatch in # of outputs */ 6347 if (highest_unmatched_operand < 0) 6348 highest_unmatched_operand |= 1; 6349 if (num_operands > NELEMS (idesc->operands) 6350 || (num_operands < NELEMS (idesc->operands) 6351 && idesc->operands[num_operands]) 6352 || (num_operands > 0 && !idesc->operands[num_operands - 1])) 6353 continue; /* mismatch in number of arguments */ 6354 if (highest_unmatched_operand < 0) 6355 highest_unmatched_operand |= 2; 6356 6357 CURR_SLOT.num_fixups = 0; 6358 6359 /* Try to match all operands. If we see an out-of-range operand, 6360 then continue trying to match the rest of the operands, since if 6361 the rest match, then this idesc will give the best error message. */ 6362 6363 out_of_range_pos = -1; 6364 for (i = 0; i < num_operands && idesc->operands[i]; ++i) 6365 { 6366 result = operand_match (idesc, i, CURR_SLOT.opnd + i); 6367 if (result != OPERAND_MATCH) 6368 { 6369 if (result != OPERAND_OUT_OF_RANGE) 6370 break; 6371 if (out_of_range_pos < 0) 6372 /* remember position of the first out-of-range operand: */ 6373 out_of_range_pos = i; 6374 } 6375 } 6376 6377 /* If we did not match all operands, or if at least one operand was 6378 out-of-range, then this idesc does not match. Keep track of which 6379 idesc matched the most operands before failing. If we have two 6380 idescs that failed at the same position, and one had an out-of-range 6381 operand, then prefer the out-of-range operand. Thus if we have 6382 "add r0=0x1000000,r1" we get an error saying the constant is out 6383 of range instead of an error saying that the constant should have been 6384 a register. */ 6385 6386 if (i != num_operands || out_of_range_pos >= 0) 6387 { 6388 if (i > highest_unmatched_operand 6389 || (i == highest_unmatched_operand 6390 && out_of_range_pos > curr_out_of_range_pos)) 6391 { 6392 highest_unmatched_operand = i; 6393 if (out_of_range_pos >= 0) 6394 { 6395 expected_operand = idesc->operands[out_of_range_pos]; 6396 error_pos = out_of_range_pos; 6397 } 6398 else 6399 { 6400 expected_operand = idesc->operands[i]; 6401 error_pos = i; 6402 } 6403 curr_out_of_range_pos = out_of_range_pos; 6404 } 6405 continue; 6406 } 6407 6408 break; 6409 } 6410 if (!idesc) 6411 { 6412 if (expected_operand) 6413 as_bad ("Operand %u of `%s' should be %s", 6414 error_pos + 1, mnemonic, 6415 elf64_ia64_operands[expected_operand].desc); 6416 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1)) 6417 as_bad ("Wrong number of output operands"); 6418 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2)) 6419 as_bad ("Wrong number of input operands"); 6420 else 6421 as_bad ("Operand mismatch"); 6422 return 0; 6423 } 6424 6425 /* Check that the instruction doesn't use 6426 - r0, f0, or f1 as output operands 6427 - the same predicate twice as output operands 6428 - r0 as address of a base update load or store 6429 - the same GR as output and address of a base update load 6430 - two even- or two odd-numbered FRs as output operands of a floating 6431 point parallel load. 6432 At most two (conflicting) output (or output-like) operands can exist, 6433 (floating point parallel loads have three outputs, but the base register, 6434 if updated, cannot conflict with the actual outputs). */ 6435 reg2 = reg1 = -1; 6436 for (i = 0; i < num_operands; ++i) 6437 { 6438 int regno = 0; 6439 6440 reg_class = 0; 6441 switch (idesc->operands[i]) 6442 { 6443 case IA64_OPND_R1: 6444 case IA64_OPND_R2: 6445 case IA64_OPND_R3: 6446 if (i < num_outputs) 6447 { 6448 if (CURR_SLOT.opnd[i].X_add_number == REG_GR) 6449 reg_class = 'r'; 6450 else if (reg1 < 0) 6451 reg1 = CURR_SLOT.opnd[i].X_add_number; 6452 else if (reg2 < 0) 6453 reg2 = CURR_SLOT.opnd[i].X_add_number; 6454 } 6455 break; 6456 case IA64_OPND_P1: 6457 case IA64_OPND_P2: 6458 if (i < num_outputs) 6459 { 6460 if (reg1 < 0) 6461 reg1 = CURR_SLOT.opnd[i].X_add_number; 6462 else if (reg2 < 0) 6463 reg2 = CURR_SLOT.opnd[i].X_add_number; 6464 } 6465 break; 6466 case IA64_OPND_F1: 6467 case IA64_OPND_F2: 6468 case IA64_OPND_F3: 6469 case IA64_OPND_F4: 6470 if (i < num_outputs) 6471 { 6472 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR 6473 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1) 6474 { 6475 reg_class = 'f'; 6476 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR; 6477 } 6478 else if (reg1 < 0) 6479 reg1 = CURR_SLOT.opnd[i].X_add_number; 6480 else if (reg2 < 0) 6481 reg2 = CURR_SLOT.opnd[i].X_add_number; 6482 } 6483 break; 6484 case IA64_OPND_MR3: 6485 if (idesc->flags & IA64_OPCODE_POSTINC) 6486 { 6487 if (CURR_SLOT.opnd[i].X_add_number == REG_GR) 6488 reg_class = 'm'; 6489 else if (reg1 < 0) 6490 reg1 = CURR_SLOT.opnd[i].X_add_number; 6491 else if (reg2 < 0) 6492 reg2 = CURR_SLOT.opnd[i].X_add_number; 6493 } 6494 break; 6495 default: 6496 break; 6497 } 6498 switch (reg_class) 6499 { 6500 case 0: 6501 break; 6502 default: 6503 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno); 6504 break; 6505 case 'm': 6506 as_warn ("Invalid use of `r%d' as base update address operand", regno); 6507 break; 6508 } 6509 } 6510 if (reg1 == reg2) 6511 { 6512 if (reg1 >= REG_GR && reg1 <= REG_GR + 127) 6513 { 6514 reg1 -= REG_GR; 6515 reg_class = 'r'; 6516 } 6517 else if (reg1 >= REG_P && reg1 <= REG_P + 63) 6518 { 6519 reg1 -= REG_P; 6520 reg_class = 'p'; 6521 } 6522 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127) 6523 { 6524 reg1 -= REG_FR; 6525 reg_class = 'f'; 6526 } 6527 else 6528 reg_class = 0; 6529 if (reg_class) 6530 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1); 6531 } 6532 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31 6533 && reg2 >= REG_FR && reg2 <= REG_FR + 31) 6534 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 6535 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)) 6536 && ! ((reg1 ^ reg2) & 1)) 6537 as_warn ("Invalid simultaneous use of `f%d' and `f%d'", 6538 reg1 - REG_FR, reg2 - REG_FR); 6539 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31 6540 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127) 6541 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127 6542 && reg2 >= REG_FR && reg2 <= REG_FR + 31)) 6543 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'", 6544 reg1 - REG_FR, reg2 - REG_FR); 6545 return idesc; 6546} 6547 6548static void 6549build_insn (slot, insnp) 6550 struct slot *slot; 6551 bfd_vma *insnp; 6552{ 6553 const struct ia64_operand *odesc, *o2desc; 6554 struct ia64_opcode *idesc = slot->idesc; 6555 bfd_vma insn; 6556 bfd_signed_vma val; 6557 const char *err; 6558 int i; 6559 6560 insn = idesc->opcode | slot->qp_regno; 6561 6562 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i) 6563 { 6564 if (slot->opnd[i].X_op == O_register 6565 || slot->opnd[i].X_op == O_constant 6566 || slot->opnd[i].X_op == O_index) 6567 val = slot->opnd[i].X_add_number; 6568 else if (slot->opnd[i].X_op == O_big) 6569 { 6570 /* This must be the value 0x10000000000000000. */ 6571 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8); 6572 val = 0; 6573 } 6574 else 6575 val = 0; 6576 6577 switch (idesc->operands[i]) 6578 { 6579 case IA64_OPND_IMMU64: 6580 *insnp++ = (val >> 22) & 0x1ffffffffffLL; 6581 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27) 6582 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21) 6583 | (((val >> 63) & 0x1) << 36)); 6584 continue; 6585 6586 case IA64_OPND_IMMU62: 6587 val &= 0x3fffffffffffffffULL; 6588 if (val != slot->opnd[i].X_add_number) 6589 as_warn (_("Value truncated to 62 bits")); 6590 *insnp++ = (val >> 21) & 0x1ffffffffffLL; 6591 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36)); 6592 continue; 6593 6594 case IA64_OPND_TGT64: 6595 val >>= 4; 6596 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2; 6597 insn |= ((((val >> 59) & 0x1) << 36) 6598 | (((val >> 0) & 0xfffff) << 13)); 6599 continue; 6600 6601 case IA64_OPND_AR3: 6602 val -= REG_AR; 6603 break; 6604 6605 case IA64_OPND_B1: 6606 case IA64_OPND_B2: 6607 val -= REG_BR; 6608 break; 6609 6610 case IA64_OPND_CR3: 6611 val -= REG_CR; 6612 break; 6613 6614 case IA64_OPND_F1: 6615 case IA64_OPND_F2: 6616 case IA64_OPND_F3: 6617 case IA64_OPND_F4: 6618 val -= REG_FR; 6619 break; 6620 6621 case IA64_OPND_P1: 6622 case IA64_OPND_P2: 6623 val -= REG_P; 6624 break; 6625 6626 case IA64_OPND_R1: 6627 case IA64_OPND_R2: 6628 case IA64_OPND_R3: 6629 case IA64_OPND_R3_2: 6630 case IA64_OPND_CPUID_R3: 6631 case IA64_OPND_DBR_R3: 6632 case IA64_OPND_DTR_R3: 6633 case IA64_OPND_ITR_R3: 6634 case IA64_OPND_IBR_R3: 6635 case IA64_OPND_MR3: 6636 case IA64_OPND_MSR_R3: 6637 case IA64_OPND_PKR_R3: 6638 case IA64_OPND_PMC_R3: 6639 case IA64_OPND_PMD_R3: 6640 case IA64_OPND_RR_R3: 6641 val -= REG_GR; 6642 break; 6643 6644 default: 6645 break; 6646 } 6647 6648 odesc = elf64_ia64_operands + idesc->operands[i]; 6649 err = (*odesc->insert) (odesc, val, &insn); 6650 if (err) 6651 as_bad_where (slot->src_file, slot->src_line, 6652 "Bad operand value: %s", err); 6653 if (idesc->flags & IA64_OPCODE_PSEUDO) 6654 { 6655 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3) 6656 && odesc == elf64_ia64_operands + IA64_OPND_F3) 6657 { 6658 o2desc = elf64_ia64_operands + IA64_OPND_F2; 6659 (*o2desc->insert) (o2desc, val, &insn); 6660 } 6661 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT) 6662 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a 6663 || odesc == elf64_ia64_operands + IA64_OPND_POS6)) 6664 { 6665 o2desc = elf64_ia64_operands + IA64_OPND_LEN6; 6666 (*o2desc->insert) (o2desc, 64 - val, &insn); 6667 } 6668 } 6669 } 6670 *insnp = insn; 6671} 6672 6673static void 6674emit_one_bundle () 6675{ 6676 int manual_bundling_off = 0, manual_bundling = 0; 6677 enum ia64_unit required_unit, insn_unit = 0; 6678 enum ia64_insn_type type[3], insn_type; 6679 unsigned int template, orig_template; 6680 bfd_vma insn[3] = { -1, -1, -1 }; 6681 struct ia64_opcode *idesc; 6682 int end_of_insn_group = 0, user_template = -1; 6683 int n, i, j, first, curr, last_slot; 6684 bfd_vma t0 = 0, t1 = 0; 6685 struct label_fix *lfix; 6686 bfd_boolean mark_label; 6687 struct insn_fix *ifix; 6688 char mnemonic[16]; 6689 fixS *fix; 6690 char *f; 6691 int addr_mod; 6692 6693 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS; 6694 know (first >= 0 && first < NUM_SLOTS); 6695 n = MIN (3, md.num_slots_in_use); 6696 6697 /* Determine template: user user_template if specified, best match 6698 otherwise: */ 6699 6700 if (md.slot[first].user_template >= 0) 6701 user_template = template = md.slot[first].user_template; 6702 else 6703 { 6704 /* Auto select appropriate template. */ 6705 memset (type, 0, sizeof (type)); 6706 curr = first; 6707 for (i = 0; i < n; ++i) 6708 { 6709 if (md.slot[curr].label_fixups && i != 0) 6710 break; 6711 type[i] = md.slot[curr].idesc->type; 6712 curr = (curr + 1) % NUM_SLOTS; 6713 } 6714 template = best_template[type[0]][type[1]][type[2]]; 6715 } 6716 6717 /* initialize instructions with appropriate nops: */ 6718 for (i = 0; i < 3; ++i) 6719 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]]; 6720 6721 f = frag_more (16); 6722 6723 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes 6724 from the start of the frag. */ 6725 addr_mod = frag_now_fix () & 15; 6726 if (frag_now->has_code && frag_now->insn_addr != addr_mod) 6727 as_bad (_("instruction address is not a multiple of 16")); 6728 frag_now->insn_addr = addr_mod; 6729 frag_now->has_code = 1; 6730 6731 /* now fill in slots with as many insns as possible: */ 6732 curr = first; 6733 idesc = md.slot[curr].idesc; 6734 end_of_insn_group = 0; 6735 last_slot = -1; 6736 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i) 6737 { 6738 /* If we have unwind records, we may need to update some now. */ 6739 unw_rec_list *ptr = md.slot[curr].unwind_record; 6740 unw_rec_list *end_ptr = NULL; 6741 6742 if (ptr) 6743 { 6744 /* Find the last prologue/body record in the list for the current 6745 insn, and set the slot number for all records up to that point. 6746 This needs to be done now, because prologue/body records refer to 6747 the current point, not the point after the instruction has been 6748 issued. This matters because there may have been nops emitted 6749 meanwhile. Any non-prologue non-body record followed by a 6750 prologue/body record must also refer to the current point. */ 6751 unw_rec_list *last_ptr; 6752 6753 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j) 6754 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record; 6755 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next) 6756 if (ptr->r.type == prologue || ptr->r.type == prologue_gr 6757 || ptr->r.type == body) 6758 last_ptr = ptr; 6759 if (last_ptr) 6760 { 6761 /* Make last_ptr point one after the last prologue/body 6762 record. */ 6763 last_ptr = last_ptr->next; 6764 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr; 6765 ptr = ptr->next) 6766 { 6767 ptr->slot_number = (unsigned long) f + i; 6768 ptr->slot_frag = frag_now; 6769 } 6770 /* Remove the initialized records, so that we won't accidentally 6771 update them again if we insert a nop and continue. */ 6772 md.slot[curr].unwind_record = last_ptr; 6773 } 6774 } 6775 6776 manual_bundling_off = md.slot[curr].manual_bundling_off; 6777 if (md.slot[curr].manual_bundling_on) 6778 { 6779 if (curr == first) 6780 manual_bundling = 1; 6781 else 6782 break; /* Need to start a new bundle. */ 6783 } 6784 6785 /* If this instruction specifies a template, then it must be the first 6786 instruction of a bundle. */ 6787 if (curr != first && md.slot[curr].user_template >= 0) 6788 break; 6789 6790 if (idesc->flags & IA64_OPCODE_SLOT2) 6791 { 6792 if (manual_bundling && !manual_bundling_off) 6793 { 6794 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 6795 "`%s' must be last in bundle", idesc->name); 6796 if (i < 2) 6797 manual_bundling = -1; /* Suppress meaningless post-loop errors. */ 6798 } 6799 i = 2; 6800 } 6801 if (idesc->flags & IA64_OPCODE_LAST) 6802 { 6803 int required_slot; 6804 unsigned int required_template; 6805 6806 /* If we need a stop bit after an M slot, our only choice is 6807 template 5 (M;;MI). If we need a stop bit after a B 6808 slot, our only choice is to place it at the end of the 6809 bundle, because the only available templates are MIB, 6810 MBB, BBB, MMB, and MFB. We don't handle anything other 6811 than M and B slots because these are the only kind of 6812 instructions that can have the IA64_OPCODE_LAST bit set. */ 6813 required_template = template; 6814 switch (idesc->type) 6815 { 6816 case IA64_TYPE_M: 6817 required_slot = 0; 6818 required_template = 5; 6819 break; 6820 6821 case IA64_TYPE_B: 6822 required_slot = 2; 6823 break; 6824 6825 default: 6826 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 6827 "Internal error: don't know how to force %s to end" 6828 "of instruction group", idesc->name); 6829 required_slot = i; 6830 break; 6831 } 6832 if (manual_bundling 6833 && (i > required_slot 6834 || (required_slot == 2 && !manual_bundling_off) 6835 || (user_template >= 0 6836 /* Changing from MMI to M;MI is OK. */ 6837 && (template ^ required_template) > 1))) 6838 { 6839 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 6840 "`%s' must be last in instruction group", 6841 idesc->name); 6842 if (i < 2 && required_slot == 2 && !manual_bundling_off) 6843 manual_bundling = -1; /* Suppress meaningless post-loop errors. */ 6844 } 6845 if (required_slot < i) 6846 /* Can't fit this instruction. */ 6847 break; 6848 6849 i = required_slot; 6850 if (required_template != template) 6851 { 6852 /* If we switch the template, we need to reset the NOPs 6853 after slot i. The slot-types of the instructions ahead 6854 of i never change, so we don't need to worry about 6855 changing NOPs in front of this slot. */ 6856 for (j = i; j < 3; ++j) 6857 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]]; 6858 6859 /* We just picked a template that includes the stop bit in the 6860 middle, so we don't need another one emitted later. */ 6861 md.slot[curr].end_of_insn_group = 0; 6862 } 6863 template = required_template; 6864 } 6865 if (curr != first && md.slot[curr].label_fixups) 6866 { 6867 if (manual_bundling) 6868 { 6869 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 6870 "Label must be first in a bundle"); 6871 manual_bundling = -1; /* Suppress meaningless post-loop errors. */ 6872 } 6873 /* This insn must go into the first slot of a bundle. */ 6874 break; 6875 } 6876 6877 if (end_of_insn_group && md.num_slots_in_use >= 1) 6878 { 6879 /* We need an instruction group boundary in the middle of a 6880 bundle. See if we can switch to an other template with 6881 an appropriate boundary. */ 6882 6883 orig_template = template; 6884 if (i == 1 && (user_template == 4 6885 || (user_template < 0 6886 && (ia64_templ_desc[template].exec_unit[0] 6887 == IA64_UNIT_M)))) 6888 { 6889 template = 5; 6890 end_of_insn_group = 0; 6891 } 6892 else if (i == 2 && (user_template == 0 6893 || (user_template < 0 6894 && (ia64_templ_desc[template].exec_unit[1] 6895 == IA64_UNIT_I))) 6896 /* This test makes sure we don't switch the template if 6897 the next instruction is one that needs to be first in 6898 an instruction group. Since all those instructions are 6899 in the M group, there is no way such an instruction can 6900 fit in this bundle even if we switch the template. The 6901 reason we have to check for this is that otherwise we 6902 may end up generating "MI;;I M.." which has the deadly 6903 effect that the second M instruction is no longer the 6904 first in the group! --davidm 99/12/16 */ 6905 && (idesc->flags & IA64_OPCODE_FIRST) == 0) 6906 { 6907 template = 1; 6908 end_of_insn_group = 0; 6909 } 6910 else if (i == 1 6911 && user_template == 0 6912 && !(idesc->flags & IA64_OPCODE_FIRST)) 6913 /* Use the next slot. */ 6914 continue; 6915 else if (curr != first) 6916 /* can't fit this insn */ 6917 break; 6918 6919 if (template != orig_template) 6920 /* if we switch the template, we need to reset the NOPs 6921 after slot i. The slot-types of the instructions ahead 6922 of i never change, so we don't need to worry about 6923 changing NOPs in front of this slot. */ 6924 for (j = i; j < 3; ++j) 6925 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]]; 6926 } 6927 required_unit = ia64_templ_desc[template].exec_unit[i]; 6928 6929 /* resolve dynamic opcodes such as "break", "hint", and "nop": */ 6930 if (idesc->type == IA64_TYPE_DYN) 6931 { 6932 enum ia64_opnd opnd1, opnd2; 6933 6934 if ((strcmp (idesc->name, "nop") == 0) 6935 || (strcmp (idesc->name, "break") == 0)) 6936 insn_unit = required_unit; 6937 else if (strcmp (idesc->name, "hint") == 0) 6938 { 6939 insn_unit = required_unit; 6940 if (required_unit == IA64_UNIT_B) 6941 { 6942 switch (md.hint_b) 6943 { 6944 case hint_b_ok: 6945 break; 6946 case hint_b_warning: 6947 as_warn ("hint in B unit may be treated as nop"); 6948 break; 6949 case hint_b_error: 6950 /* When manual bundling is off and there is no 6951 user template, we choose a different unit so 6952 that hint won't go into the current slot. We 6953 will fill the current bundle with nops and 6954 try to put hint into the next bundle. */ 6955 if (!manual_bundling && user_template < 0) 6956 insn_unit = IA64_UNIT_I; 6957 else 6958 as_bad ("hint in B unit can't be used"); 6959 break; 6960 } 6961 } 6962 } 6963 else if (strcmp (idesc->name, "chk.s") == 0 6964 || strcmp (idesc->name, "mov") == 0) 6965 { 6966 insn_unit = IA64_UNIT_M; 6967 if (required_unit == IA64_UNIT_I 6968 || (required_unit == IA64_UNIT_F && template == 6)) 6969 insn_unit = IA64_UNIT_I; 6970 } 6971 else 6972 as_fatal ("emit_one_bundle: unexpected dynamic op"); 6973 6974 snprintf (mnemonic, sizeof (mnemonic), "%s.%c", 6975 idesc->name, "?imbfxx"[insn_unit]); 6976 opnd1 = idesc->operands[0]; 6977 opnd2 = idesc->operands[1]; 6978 ia64_free_opcode (idesc); 6979 idesc = ia64_find_opcode (mnemonic); 6980 /* moves to/from ARs have collisions */ 6981 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3) 6982 { 6983 while (idesc != NULL 6984 && (idesc->operands[0] != opnd1 6985 || idesc->operands[1] != opnd2)) 6986 idesc = get_next_opcode (idesc); 6987 } 6988 md.slot[curr].idesc = idesc; 6989 } 6990 else 6991 { 6992 insn_type = idesc->type; 6993 insn_unit = IA64_UNIT_NIL; 6994 switch (insn_type) 6995 { 6996 case IA64_TYPE_A: 6997 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M) 6998 insn_unit = required_unit; 6999 break; 7000 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break; 7001 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break; 7002 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break; 7003 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break; 7004 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break; 7005 default: break; 7006 } 7007 } 7008 7009 if (insn_unit != required_unit) 7010 continue; /* Try next slot. */ 7011 7012 /* Now is a good time to fix up the labels for this insn. */ 7013 mark_label = FALSE; 7014 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next) 7015 { 7016 S_SET_VALUE (lfix->sym, frag_now_fix () - 16); 7017 symbol_set_frag (lfix->sym, frag_now); 7018 mark_label |= lfix->dw2_mark_labels; 7019 } 7020 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next) 7021 { 7022 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i); 7023 symbol_set_frag (lfix->sym, frag_now); 7024 } 7025 7026 if (debug_type == DEBUG_DWARF2 7027 || md.slot[curr].loc_directive_seen 7028 || mark_label) 7029 { 7030 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i; 7031 7032 md.slot[curr].loc_directive_seen = 0; 7033 if (mark_label) 7034 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK; 7035 7036 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line); 7037 } 7038 7039 build_insn (md.slot + curr, insn + i); 7040 7041 ptr = md.slot[curr].unwind_record; 7042 if (ptr) 7043 { 7044 /* Set slot numbers for all remaining unwind records belonging to the 7045 current insn. There can not be any prologue/body unwind records 7046 here. */ 7047 for (; ptr != end_ptr; ptr = ptr->next) 7048 { 7049 ptr->slot_number = (unsigned long) f + i; 7050 ptr->slot_frag = frag_now; 7051 } 7052 md.slot[curr].unwind_record = NULL; 7053 } 7054 7055 if (required_unit == IA64_UNIT_L) 7056 { 7057 know (i == 1); 7058 /* skip one slot for long/X-unit instructions */ 7059 ++i; 7060 } 7061 --md.num_slots_in_use; 7062 last_slot = i; 7063 7064 for (j = 0; j < md.slot[curr].num_fixups; ++j) 7065 { 7066 ifix = md.slot[curr].fixup + j; 7067 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8, 7068 &ifix->expr, ifix->is_pcrel, ifix->code); 7069 fix->tc_fix_data.opnd = ifix->opnd; 7070 fix->fx_file = md.slot[curr].src_file; 7071 fix->fx_line = md.slot[curr].src_line; 7072 } 7073 7074 end_of_insn_group = md.slot[curr].end_of_insn_group; 7075 7076 /* clear slot: */ 7077 ia64_free_opcode (md.slot[curr].idesc); 7078 memset (md.slot + curr, 0, sizeof (md.slot[curr])); 7079 md.slot[curr].user_template = -1; 7080 7081 if (manual_bundling_off) 7082 { 7083 manual_bundling = 0; 7084 break; 7085 } 7086 curr = (curr + 1) % NUM_SLOTS; 7087 idesc = md.slot[curr].idesc; 7088 } 7089 7090 /* A user template was specified, but the first following instruction did 7091 not fit. This can happen with or without manual bundling. */ 7092 if (md.num_slots_in_use > 0 && last_slot < 0) 7093 { 7094 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 7095 "`%s' does not fit into %s template", 7096 idesc->name, ia64_templ_desc[template].name); 7097 /* Drop first insn so we don't livelock. */ 7098 --md.num_slots_in_use; 7099 know (curr == first); 7100 ia64_free_opcode (md.slot[curr].idesc); 7101 memset (md.slot + curr, 0, sizeof (md.slot[curr])); 7102 md.slot[curr].user_template = -1; 7103 } 7104 else if (manual_bundling > 0) 7105 { 7106 if (md.num_slots_in_use > 0) 7107 { 7108 if (last_slot >= 2) 7109 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 7110 "`%s' does not fit into bundle", idesc->name); 7111 else 7112 { 7113 const char *where; 7114 7115 if (template == 2) 7116 where = "X slot"; 7117 else if (last_slot == 0) 7118 where = "slots 2 or 3"; 7119 else 7120 where = "slot 3"; 7121 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 7122 "`%s' can't go in %s of %s template", 7123 idesc->name, where, ia64_templ_desc[template].name); 7124 } 7125 } 7126 else 7127 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line, 7128 "Missing '}' at end of file"); 7129 } 7130 7131 know (md.num_slots_in_use < NUM_SLOTS); 7132 7133 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46); 7134 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); 7135 7136 number_to_chars_littleendian (f + 0, t0, 8); 7137 number_to_chars_littleendian (f + 8, t1, 8); 7138} 7139 7140int 7141md_parse_option (c, arg) 7142 int c; 7143 char *arg; 7144{ 7145 7146 switch (c) 7147 { 7148 /* Switches from the Intel assembler. */ 7149 case 'm': 7150 if (strcmp (arg, "ilp64") == 0 7151 || strcmp (arg, "lp64") == 0 7152 || strcmp (arg, "p64") == 0) 7153 { 7154 md.flags |= EF_IA_64_ABI64; 7155 } 7156 else if (strcmp (arg, "ilp32") == 0) 7157 { 7158 md.flags &= ~EF_IA_64_ABI64; 7159 } 7160 else if (strcmp (arg, "le") == 0) 7161 { 7162 md.flags &= ~EF_IA_64_BE; 7163 default_big_endian = 0; 7164 } 7165 else if (strcmp (arg, "be") == 0) 7166 { 7167 md.flags |= EF_IA_64_BE; 7168 default_big_endian = 1; 7169 } 7170 else if (strncmp (arg, "unwind-check=", 13) == 0) 7171 { 7172 arg += 13; 7173 if (strcmp (arg, "warning") == 0) 7174 md.unwind_check = unwind_check_warning; 7175 else if (strcmp (arg, "error") == 0) 7176 md.unwind_check = unwind_check_error; 7177 else 7178 return 0; 7179 } 7180 else if (strncmp (arg, "hint.b=", 7) == 0) 7181 { 7182 arg += 7; 7183 if (strcmp (arg, "ok") == 0) 7184 md.hint_b = hint_b_ok; 7185 else if (strcmp (arg, "warning") == 0) 7186 md.hint_b = hint_b_warning; 7187 else if (strcmp (arg, "error") == 0) 7188 md.hint_b = hint_b_error; 7189 else 7190 return 0; 7191 } 7192 else if (strncmp (arg, "tune=", 5) == 0) 7193 { 7194 arg += 5; 7195 if (strcmp (arg, "itanium1") == 0) 7196 md.tune = itanium1; 7197 else if (strcmp (arg, "itanium2") == 0) 7198 md.tune = itanium2; 7199 else 7200 return 0; 7201 } 7202 else 7203 return 0; 7204 break; 7205 7206 case 'N': 7207 if (strcmp (arg, "so") == 0) 7208 { 7209 /* Suppress signon message. */ 7210 } 7211 else if (strcmp (arg, "pi") == 0) 7212 { 7213 /* Reject privileged instructions. FIXME */ 7214 } 7215 else if (strcmp (arg, "us") == 0) 7216 { 7217 /* Allow union of signed and unsigned range. FIXME */ 7218 } 7219 else if (strcmp (arg, "close_fcalls") == 0) 7220 { 7221 /* Do not resolve global function calls. */ 7222 } 7223 else 7224 return 0; 7225 break; 7226 7227 case 'C': 7228 /* temp[="prefix"] Insert temporary labels into the object file 7229 symbol table prefixed by "prefix". 7230 Default prefix is ":temp:". 7231 */ 7232 break; 7233 7234 case 'a': 7235 /* indirect=<tgt> Assume unannotated indirect branches behavior 7236 according to <tgt> -- 7237 exit: branch out from the current context (default) 7238 labels: all labels in context may be branch targets 7239 */ 7240 if (strncmp (arg, "indirect=", 9) != 0) 7241 return 0; 7242 break; 7243 7244 case 'x': 7245 /* -X conflicts with an ignored option, use -x instead */ 7246 md.detect_dv = 1; 7247 if (!arg || strcmp (arg, "explicit") == 0) 7248 { 7249 /* set default mode to explicit */ 7250 md.default_explicit_mode = 1; 7251 break; 7252 } 7253 else if (strcmp (arg, "auto") == 0) 7254 { 7255 md.default_explicit_mode = 0; 7256 } 7257 else if (strcmp (arg, "none") == 0) 7258 { 7259 md.detect_dv = 0; 7260 } 7261 else if (strcmp (arg, "debug") == 0) 7262 { 7263 md.debug_dv = 1; 7264 } 7265 else if (strcmp (arg, "debugx") == 0) 7266 { 7267 md.default_explicit_mode = 1; 7268 md.debug_dv = 1; 7269 } 7270 else if (strcmp (arg, "debugn") == 0) 7271 { 7272 md.debug_dv = 1; 7273 md.detect_dv = 0; 7274 } 7275 else 7276 { 7277 as_bad (_("Unrecognized option '-x%s'"), arg); 7278 } 7279 break; 7280 7281 case 'S': 7282 /* nops Print nops statistics. */ 7283 break; 7284 7285 /* GNU specific switches for gcc. */ 7286 case OPTION_MCONSTANT_GP: 7287 md.flags |= EF_IA_64_CONS_GP; 7288 break; 7289 7290 case OPTION_MAUTO_PIC: 7291 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP; 7292 break; 7293 7294 default: 7295 return 0; 7296 } 7297 7298 return 1; 7299} 7300 7301void 7302md_show_usage (stream) 7303 FILE *stream; 7304{ 7305 fputs (_("\ 7306IA-64 options:\n\ 7307 --mconstant-gp mark output file as using the constant-GP model\n\ 7308 (sets ELF header flag EF_IA_64_CONS_GP)\n\ 7309 --mauto-pic mark output file as using the constant-GP model\n\ 7310 without function descriptors (sets ELF header flag\n\ 7311 EF_IA_64_NOFUNCDESC_CONS_GP)\n\ 7312 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\ 7313 -mle | -mbe select little- or big-endian byte order (default -mle)\n\ 7314 -mtune=[itanium1|itanium2]\n\ 7315 tune for a specific CPU (default -mtune=itanium2)\n\ 7316 -munwind-check=[warning|error]\n\ 7317 unwind directive check (default -munwind-check=warning)\n\ 7318 -mhint.b=[ok|warning|error]\n\ 7319 hint.b check (default -mhint.b=error)\n\ 7320 -x | -xexplicit turn on dependency violation checking\n\ 7321 -xauto automagically remove dependency violations (default)\n\ 7322 -xnone turn off dependency violation checking\n\ 7323 -xdebug debug dependency violation checker\n\ 7324 -xdebugn debug dependency violation checker but turn off\n\ 7325 dependency violation checking\n\ 7326 -xdebugx debug dependency violation checker and turn on\n\ 7327 dependency violation checking\n"), 7328 stream); 7329} 7330 7331void 7332ia64_after_parse_args () 7333{ 7334 if (debug_type == DEBUG_STABS) 7335 as_fatal (_("--gstabs is not supported for ia64")); 7336} 7337 7338/* Return true if TYPE fits in TEMPL at SLOT. */ 7339 7340static int 7341match (int templ, int type, int slot) 7342{ 7343 enum ia64_unit unit; 7344 int result; 7345 7346 unit = ia64_templ_desc[templ].exec_unit[slot]; 7347 switch (type) 7348 { 7349 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */ 7350 case IA64_TYPE_A: 7351 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M); 7352 break; 7353 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break; 7354 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break; 7355 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break; 7356 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break; 7357 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break; 7358 default: result = 0; break; 7359 } 7360 return result; 7361} 7362 7363/* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit 7364 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of 7365 type M or I would fit in TEMPL at SLOT. */ 7366 7367static inline int 7368extra_goodness (int templ, int slot) 7369{ 7370 switch (md.tune) 7371 { 7372 case itanium1: 7373 if (slot == 1 && match (templ, IA64_TYPE_F, slot)) 7374 return 2; 7375 else if (slot == 2 && match (templ, IA64_TYPE_B, slot)) 7376 return 1; 7377 else 7378 return 0; 7379 break; 7380 case itanium2: 7381 if (match (templ, IA64_TYPE_M, slot) 7382 || match (templ, IA64_TYPE_I, slot)) 7383 /* Favor M- and I-unit NOPs. We definitely want to avoid 7384 F-unit and B-unit may cause split-issue or less-than-optimal 7385 branch-prediction. */ 7386 return 2; 7387 else 7388 return 0; 7389 break; 7390 default: 7391 abort (); 7392 return 0; 7393 } 7394} 7395 7396/* This function is called once, at assembler startup time. It sets 7397 up all the tables, etc. that the MD part of the assembler will need 7398 that can be determined before arguments are parsed. */ 7399void 7400md_begin () 7401{ 7402 int i, j, k, t, goodness, best, ok; 7403 const char *err; 7404 char name[8]; 7405 7406 md.auto_align = 1; 7407 md.explicit_mode = md.default_explicit_mode; 7408 7409 bfd_set_section_alignment (stdoutput, text_section, 4); 7410 7411 /* Make sure function pointers get initialized. */ 7412 target_big_endian = -1; 7413 dot_byteorder (default_big_endian); 7414 7415 alias_hash = hash_new (); 7416 alias_name_hash = hash_new (); 7417 secalias_hash = hash_new (); 7418 secalias_name_hash = hash_new (); 7419 7420 pseudo_func[FUNC_DTP_MODULE].u.sym = 7421 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE, 7422 &zero_address_frag); 7423 7424 pseudo_func[FUNC_DTP_RELATIVE].u.sym = 7425 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE, 7426 &zero_address_frag); 7427 7428 pseudo_func[FUNC_FPTR_RELATIVE].u.sym = 7429 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE, 7430 &zero_address_frag); 7431 7432 pseudo_func[FUNC_GP_RELATIVE].u.sym = 7433 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE, 7434 &zero_address_frag); 7435 7436 pseudo_func[FUNC_LT_RELATIVE].u.sym = 7437 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE, 7438 &zero_address_frag); 7439 7440 pseudo_func[FUNC_LT_RELATIVE_X].u.sym = 7441 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X, 7442 &zero_address_frag); 7443 7444 pseudo_func[FUNC_PC_RELATIVE].u.sym = 7445 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE, 7446 &zero_address_frag); 7447 7448 pseudo_func[FUNC_PLT_RELATIVE].u.sym = 7449 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE, 7450 &zero_address_frag); 7451 7452 pseudo_func[FUNC_SEC_RELATIVE].u.sym = 7453 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE, 7454 &zero_address_frag); 7455 7456 pseudo_func[FUNC_SEG_RELATIVE].u.sym = 7457 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE, 7458 &zero_address_frag); 7459 7460 pseudo_func[FUNC_TP_RELATIVE].u.sym = 7461 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE, 7462 &zero_address_frag); 7463 7464 pseudo_func[FUNC_LTV_RELATIVE].u.sym = 7465 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE, 7466 &zero_address_frag); 7467 7468 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym = 7469 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE, 7470 &zero_address_frag); 7471 7472 pseudo_func[FUNC_LT_DTP_MODULE].u.sym = 7473 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE, 7474 &zero_address_frag); 7475 7476 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym = 7477 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE, 7478 &zero_address_frag); 7479 7480 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym = 7481 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE, 7482 &zero_address_frag); 7483 7484 pseudo_func[FUNC_IPLT_RELOC].u.sym = 7485 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC, 7486 &zero_address_frag); 7487 7488 if (md.tune != itanium1) 7489 { 7490 /* Convert MFI NOPs bundles into MMI NOPs bundles. */ 7491 le_nop[0] = 0x8; 7492 le_nop_stop[0] = 0x9; 7493 } 7494 7495 /* Compute the table of best templates. We compute goodness as a 7496 base 4 value, in which each match counts for 3. Match-failures 7497 result in NOPs and we use extra_goodness() to pick the execution 7498 units that are best suited for issuing the NOP. */ 7499 for (i = 0; i < IA64_NUM_TYPES; ++i) 7500 for (j = 0; j < IA64_NUM_TYPES; ++j) 7501 for (k = 0; k < IA64_NUM_TYPES; ++k) 7502 { 7503 best = 0; 7504 for (t = 0; t < NELEMS (ia64_templ_desc); ++t) 7505 { 7506 goodness = 0; 7507 if (match (t, i, 0)) 7508 { 7509 if (match (t, j, 1)) 7510 { 7511 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2)) 7512 goodness = 3 + 3 + 3; 7513 else 7514 goodness = 3 + 3 + extra_goodness (t, 2); 7515 } 7516 else if (match (t, j, 2)) 7517 goodness = 3 + 3 + extra_goodness (t, 1); 7518 else 7519 { 7520 goodness = 3; 7521 goodness += extra_goodness (t, 1); 7522 goodness += extra_goodness (t, 2); 7523 } 7524 } 7525 else if (match (t, i, 1)) 7526 { 7527 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2)) 7528 goodness = 3 + 3; 7529 else 7530 goodness = 3 + extra_goodness (t, 2); 7531 } 7532 else if (match (t, i, 2)) 7533 goodness = 3 + extra_goodness (t, 1); 7534 7535 if (goodness > best) 7536 { 7537 best = goodness; 7538 best_template[i][j][k] = t; 7539 } 7540 } 7541 } 7542 7543#ifdef DEBUG_TEMPLATES 7544 /* For debugging changes to the best_template calculations. We don't care 7545 about combinations with invalid instructions, so start the loops at 1. */ 7546 for (i = 0; i < IA64_NUM_TYPES; ++i) 7547 for (j = 0; j < IA64_NUM_TYPES; ++j) 7548 for (k = 0; k < IA64_NUM_TYPES; ++k) 7549 { 7550 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f', 7551 'x', 'd' }; 7552 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j], 7553 type_letter[k], 7554 ia64_templ_desc[best_template[i][j][k]].name); 7555 } 7556#endif 7557 7558 for (i = 0; i < NUM_SLOTS; ++i) 7559 md.slot[i].user_template = -1; 7560 7561 md.pseudo_hash = hash_new (); 7562 for (i = 0; i < NELEMS (pseudo_opcode); ++i) 7563 { 7564 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name, 7565 (void *) (pseudo_opcode + i)); 7566 if (err) 7567 as_fatal ("ia64.md_begin: can't hash `%s': %s", 7568 pseudo_opcode[i].name, err); 7569 } 7570 7571 md.reg_hash = hash_new (); 7572 md.dynreg_hash = hash_new (); 7573 md.const_hash = hash_new (); 7574 md.entry_hash = hash_new (); 7575 7576 /* general registers: */ 7577 declare_register_set ("r", 128, REG_GR); 7578 declare_register ("gp", REG_GR + 1); 7579 declare_register ("sp", REG_GR + 12); 7580 declare_register ("tp", REG_GR + 13); 7581 declare_register_set ("ret", 4, REG_GR + 8); 7582 7583 /* floating point registers: */ 7584 declare_register_set ("f", 128, REG_FR); 7585 declare_register_set ("farg", 8, REG_FR + 8); 7586 declare_register_set ("fret", 8, REG_FR + 8); 7587 7588 /* branch registers: */ 7589 declare_register_set ("b", 8, REG_BR); 7590 declare_register ("rp", REG_BR + 0); 7591 7592 /* predicate registers: */ 7593 declare_register_set ("p", 64, REG_P); 7594 declare_register ("pr", REG_PR); 7595 declare_register ("pr.rot", REG_PR_ROT); 7596 7597 /* application registers: */ 7598 declare_register_set ("ar", 128, REG_AR); 7599 for (i = 0; i < NELEMS (ar); ++i) 7600 declare_register (ar[i].name, REG_AR + ar[i].regnum); 7601 7602 /* control registers: */ 7603 declare_register_set ("cr", 128, REG_CR); 7604 for (i = 0; i < NELEMS (cr); ++i) 7605 declare_register (cr[i].name, REG_CR + cr[i].regnum); 7606 7607 declare_register ("ip", REG_IP); 7608 declare_register ("cfm", REG_CFM); 7609 declare_register ("psr", REG_PSR); 7610 declare_register ("psr.l", REG_PSR_L); 7611 declare_register ("psr.um", REG_PSR_UM); 7612 7613 for (i = 0; i < NELEMS (indirect_reg); ++i) 7614 { 7615 unsigned int regnum = indirect_reg[i].regnum; 7616 7617 md.indregsym[regnum - IND_CPUID] = declare_register (indirect_reg[i].name, regnum); 7618 } 7619 7620 /* pseudo-registers used to specify unwind info: */ 7621 declare_register ("psp", REG_PSP); 7622 7623 for (i = 0; i < NELEMS (const_bits); ++i) 7624 { 7625 err = hash_insert (md.const_hash, const_bits[i].name, 7626 (PTR) (const_bits + i)); 7627 if (err) 7628 as_fatal ("Inserting \"%s\" into constant hash table failed: %s", 7629 name, err); 7630 } 7631 7632 /* Set the architecture and machine depending on defaults and command line 7633 options. */ 7634 if (md.flags & EF_IA_64_ABI64) 7635 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64); 7636 else 7637 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32); 7638 7639 if (! ok) 7640 as_warn (_("Could not set architecture and machine")); 7641 7642 /* Set the pointer size and pointer shift size depending on md.flags */ 7643 7644 if (md.flags & EF_IA_64_ABI64) 7645 { 7646 md.pointer_size = 8; /* pointers are 8 bytes */ 7647 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */ 7648 } 7649 else 7650 { 7651 md.pointer_size = 4; /* pointers are 4 bytes */ 7652 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */ 7653 } 7654 7655 md.mem_offset.hint = 0; 7656 md.path = 0; 7657 md.maxpaths = 0; 7658 md.entry_labels = NULL; 7659} 7660 7661/* Set the default options in md. Cannot do this in md_begin because 7662 that is called after md_parse_option which is where we set the 7663 options in md based on command line options. */ 7664 7665void 7666ia64_init (argc, argv) 7667 int argc ATTRIBUTE_UNUSED; 7668 char **argv ATTRIBUTE_UNUSED; 7669{ 7670 md.flags = MD_FLAGS_DEFAULT; 7671 md.detect_dv = 1; 7672 /* FIXME: We should change it to unwind_check_error someday. */ 7673 md.unwind_check = unwind_check_warning; 7674 md.hint_b = hint_b_error; 7675 md.tune = itanium2; 7676} 7677 7678/* Return a string for the target object file format. */ 7679 7680const char * 7681ia64_target_format () 7682{ 7683 if (OUTPUT_FLAVOR == bfd_target_elf_flavour) 7684 { 7685 if (md.flags & EF_IA_64_BE) 7686 { 7687 if (md.flags & EF_IA_64_ABI64) 7688#if defined(TE_AIX50) 7689 return "elf64-ia64-aix-big"; 7690#elif defined(TE_HPUX) 7691 return "elf64-ia64-hpux-big"; 7692#else 7693 return "elf64-ia64-big"; 7694#endif 7695 else 7696#if defined(TE_AIX50) 7697 return "elf32-ia64-aix-big"; 7698#elif defined(TE_HPUX) 7699 return "elf32-ia64-hpux-big"; 7700#else 7701 return "elf32-ia64-big"; 7702#endif 7703 } 7704 else 7705 { 7706 if (md.flags & EF_IA_64_ABI64) 7707#if defined(TE_AIX50) 7708 return "elf64-ia64-aix-little"; 7709#elif defined(TE_FreeBSD) 7710 return "elf64-ia64-freebsd"; 7711#else 7712 return "elf64-ia64-little"; 7713#endif 7714 else 7715#ifdef TE_AIX50 7716 return "elf32-ia64-aix-little"; 7717#else 7718 return "elf32-ia64-little"; 7719#endif 7720 } 7721 } 7722 else 7723 return "unknown-format"; 7724} 7725 7726void 7727ia64_end_of_source () 7728{ 7729 /* terminate insn group upon reaching end of file: */ 7730 insn_group_break (1, 0, 0); 7731 7732 /* emits slots we haven't written yet: */ 7733 ia64_flush_insns (); 7734 7735 bfd_set_private_flags (stdoutput, md.flags); 7736 7737 md.mem_offset.hint = 0; 7738} 7739 7740void 7741ia64_start_line () 7742{ 7743 static int first; 7744 7745 if (!first) { 7746 /* Make sure we don't reference input_line_pointer[-1] when that's 7747 not valid. */ 7748 first = 1; 7749 return; 7750 } 7751 7752 if (md.qp.X_op == O_register) 7753 as_bad ("qualifying predicate not followed by instruction"); 7754 md.qp.X_op = O_absent; 7755 7756 if (ignore_input ()) 7757 return; 7758 7759 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';') 7760 { 7761 if (md.detect_dv && !md.explicit_mode) 7762 { 7763 static int warned; 7764 7765 if (!warned) 7766 { 7767 warned = 1; 7768 as_warn (_("Explicit stops are ignored in auto mode")); 7769 } 7770 } 7771 else 7772 insn_group_break (1, 0, 0); 7773 } 7774 else if (input_line_pointer[-1] == '{') 7775 { 7776 if (md.manual_bundling) 7777 as_warn ("Found '{' when manual bundling is already turned on"); 7778 else 7779 CURR_SLOT.manual_bundling_on = 1; 7780 md.manual_bundling = 1; 7781 7782 /* Bundling is only acceptable in explicit mode 7783 or when in default automatic mode. */ 7784 if (md.detect_dv && !md.explicit_mode) 7785 { 7786 if (!md.mode_explicitly_set 7787 && !md.default_explicit_mode) 7788 dot_dv_mode ('E'); 7789 else 7790 as_warn (_("Found '{' after explicit switch to automatic mode")); 7791 } 7792 } 7793 else if (input_line_pointer[-1] == '}') 7794 { 7795 if (!md.manual_bundling) 7796 as_warn ("Found '}' when manual bundling is off"); 7797 else 7798 PREV_SLOT.manual_bundling_off = 1; 7799 md.manual_bundling = 0; 7800 7801 /* switch back to automatic mode, if applicable */ 7802 if (md.detect_dv 7803 && md.explicit_mode 7804 && !md.mode_explicitly_set 7805 && !md.default_explicit_mode) 7806 dot_dv_mode ('A'); 7807 } 7808} 7809 7810/* This is a hook for ia64_frob_label, so that it can distinguish tags from 7811 labels. */ 7812static int defining_tag = 0; 7813 7814int 7815ia64_unrecognized_line (ch) 7816 int ch; 7817{ 7818 switch (ch) 7819 { 7820 case '(': 7821 expression_and_evaluate (&md.qp); 7822 if (*input_line_pointer++ != ')') 7823 { 7824 as_bad ("Expected ')'"); 7825 return 0; 7826 } 7827 if (md.qp.X_op != O_register) 7828 { 7829 as_bad ("Qualifying predicate expected"); 7830 return 0; 7831 } 7832 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64) 7833 { 7834 as_bad ("Predicate register expected"); 7835 return 0; 7836 } 7837 return 1; 7838 7839 case '[': 7840 { 7841 char *s; 7842 char c; 7843 symbolS *tag; 7844 int temp; 7845 7846 if (md.qp.X_op == O_register) 7847 { 7848 as_bad ("Tag must come before qualifying predicate."); 7849 return 0; 7850 } 7851 7852 /* This implements just enough of read_a_source_file in read.c to 7853 recognize labels. */ 7854 if (is_name_beginner (*input_line_pointer)) 7855 { 7856 s = input_line_pointer; 7857 c = get_symbol_end (); 7858 } 7859 else if (LOCAL_LABELS_FB 7860 && ISDIGIT (*input_line_pointer)) 7861 { 7862 temp = 0; 7863 while (ISDIGIT (*input_line_pointer)) 7864 temp = (temp * 10) + *input_line_pointer++ - '0'; 7865 fb_label_instance_inc (temp); 7866 s = fb_label_name (temp, 0); 7867 c = *input_line_pointer; 7868 } 7869 else 7870 { 7871 s = NULL; 7872 c = '\0'; 7873 } 7874 if (c != ':') 7875 { 7876 /* Put ':' back for error messages' sake. */ 7877 *input_line_pointer++ = ':'; 7878 as_bad ("Expected ':'"); 7879 return 0; 7880 } 7881 7882 defining_tag = 1; 7883 tag = colon (s); 7884 defining_tag = 0; 7885 /* Put ':' back for error messages' sake. */ 7886 *input_line_pointer++ = ':'; 7887 if (*input_line_pointer++ != ']') 7888 { 7889 as_bad ("Expected ']'"); 7890 return 0; 7891 } 7892 if (! tag) 7893 { 7894 as_bad ("Tag name expected"); 7895 return 0; 7896 } 7897 return 1; 7898 } 7899 7900 default: 7901 break; 7902 } 7903 7904 /* Not a valid line. */ 7905 return 0; 7906} 7907 7908void 7909ia64_frob_label (sym) 7910 struct symbol *sym; 7911{ 7912 struct label_fix *fix; 7913 7914 /* Tags need special handling since they are not bundle breaks like 7915 labels. */ 7916 if (defining_tag) 7917 { 7918 fix = obstack_alloc (¬es, sizeof (*fix)); 7919 fix->sym = sym; 7920 fix->next = CURR_SLOT.tag_fixups; 7921 fix->dw2_mark_labels = FALSE; 7922 CURR_SLOT.tag_fixups = fix; 7923 7924 return; 7925 } 7926 7927 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) 7928 { 7929 md.last_text_seg = now_seg; 7930 fix = obstack_alloc (¬es, sizeof (*fix)); 7931 fix->sym = sym; 7932 fix->next = CURR_SLOT.label_fixups; 7933 fix->dw2_mark_labels = dwarf2_loc_mark_labels; 7934 CURR_SLOT.label_fixups = fix; 7935 7936 /* Keep track of how many code entry points we've seen. */ 7937 if (md.path == md.maxpaths) 7938 { 7939 md.maxpaths += 20; 7940 md.entry_labels = (const char **) 7941 xrealloc ((void *) md.entry_labels, 7942 md.maxpaths * sizeof (char *)); 7943 } 7944 md.entry_labels[md.path++] = S_GET_NAME (sym); 7945 } 7946} 7947 7948#ifdef TE_HPUX 7949/* The HP-UX linker will give unresolved symbol errors for symbols 7950 that are declared but unused. This routine removes declared, 7951 unused symbols from an object. */ 7952int 7953ia64_frob_symbol (sym) 7954 struct symbol *sym; 7955{ 7956 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) && 7957 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT) 7958 || (S_GET_SEGMENT (sym) == &bfd_abs_section 7959 && ! S_IS_EXTERNAL (sym))) 7960 return 1; 7961 return 0; 7962} 7963#endif 7964 7965void 7966ia64_flush_pending_output () 7967{ 7968 if (!md.keep_pending_output 7969 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) 7970 { 7971 /* ??? This causes many unnecessary stop bits to be emitted. 7972 Unfortunately, it isn't clear if it is safe to remove this. */ 7973 insn_group_break (1, 0, 0); 7974 ia64_flush_insns (); 7975 } 7976} 7977 7978/* Do ia64-specific expression optimization. All that's done here is 7979 to transform index expressions that are either due to the indexing 7980 of rotating registers or due to the indexing of indirect register 7981 sets. */ 7982int 7983ia64_optimize_expr (l, op, r) 7984 expressionS *l; 7985 operatorT op; 7986 expressionS *r; 7987{ 7988 if (op != O_index) 7989 return 0; 7990 resolve_expression (l); 7991 if (l->X_op == O_register) 7992 { 7993 unsigned num_regs = l->X_add_number >> 16; 7994 7995 resolve_expression (r); 7996 if (num_regs) 7997 { 7998 /* Left side is a .rotX-allocated register. */ 7999 if (r->X_op != O_constant) 8000 { 8001 as_bad ("Rotating register index must be a non-negative constant"); 8002 r->X_add_number = 0; 8003 } 8004 else if ((valueT) r->X_add_number >= num_regs) 8005 { 8006 as_bad ("Index out of range 0..%u", num_regs - 1); 8007 r->X_add_number = 0; 8008 } 8009 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number; 8010 return 1; 8011 } 8012 else if (l->X_add_number >= IND_CPUID && l->X_add_number <= IND_RR) 8013 { 8014 if (r->X_op != O_register 8015 || r->X_add_number < REG_GR 8016 || r->X_add_number > REG_GR + 127) 8017 { 8018 as_bad ("Indirect register index must be a general register"); 8019 r->X_add_number = REG_GR; 8020 } 8021 l->X_op = O_index; 8022 l->X_op_symbol = md.indregsym[l->X_add_number - IND_CPUID]; 8023 l->X_add_number = r->X_add_number; 8024 return 1; 8025 } 8026 } 8027 as_bad ("Index can only be applied to rotating or indirect registers"); 8028 /* Fall back to some register use of which has as little as possible 8029 side effects, to minimize subsequent error messages. */ 8030 l->X_op = O_register; 8031 l->X_add_number = REG_GR + 3; 8032 return 1; 8033} 8034 8035int 8036ia64_parse_name (name, e, nextcharP) 8037 char *name; 8038 expressionS *e; 8039 char *nextcharP; 8040{ 8041 struct const_desc *cdesc; 8042 struct dynreg *dr = 0; 8043 unsigned int idx; 8044 struct symbol *sym; 8045 char *end; 8046 8047 if (*name == '@') 8048 { 8049 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE; 8050 8051 /* Find what relocation pseudo-function we're dealing with. */ 8052 for (idx = 0; idx < NELEMS (pseudo_func); ++idx) 8053 if (pseudo_func[idx].name 8054 && pseudo_func[idx].name[0] == name[1] 8055 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0) 8056 { 8057 pseudo_type = pseudo_func[idx].type; 8058 break; 8059 } 8060 switch (pseudo_type) 8061 { 8062 case PSEUDO_FUNC_RELOC: 8063 end = input_line_pointer; 8064 if (*nextcharP != '(') 8065 { 8066 as_bad ("Expected '('"); 8067 break; 8068 } 8069 /* Skip '('. */ 8070 ++input_line_pointer; 8071 expression (e); 8072 if (*input_line_pointer != ')') 8073 { 8074 as_bad ("Missing ')'"); 8075 goto done; 8076 } 8077 /* Skip ')'. */ 8078 ++input_line_pointer; 8079 if (e->X_op != O_symbol) 8080 { 8081 if (e->X_op != O_pseudo_fixup) 8082 { 8083 as_bad ("Not a symbolic expression"); 8084 goto done; 8085 } 8086 if (idx != FUNC_LT_RELATIVE) 8087 { 8088 as_bad ("Illegal combination of relocation functions"); 8089 goto done; 8090 } 8091 switch (S_GET_VALUE (e->X_op_symbol)) 8092 { 8093 case FUNC_FPTR_RELATIVE: 8094 idx = FUNC_LT_FPTR_RELATIVE; break; 8095 case FUNC_DTP_MODULE: 8096 idx = FUNC_LT_DTP_MODULE; break; 8097 case FUNC_DTP_RELATIVE: 8098 idx = FUNC_LT_DTP_RELATIVE; break; 8099 case FUNC_TP_RELATIVE: 8100 idx = FUNC_LT_TP_RELATIVE; break; 8101 default: 8102 as_bad ("Illegal combination of relocation functions"); 8103 goto done; 8104 } 8105 } 8106 /* Make sure gas doesn't get rid of local symbols that are used 8107 in relocs. */ 8108 e->X_op = O_pseudo_fixup; 8109 e->X_op_symbol = pseudo_func[idx].u.sym; 8110 done: 8111 *nextcharP = *input_line_pointer; 8112 break; 8113 8114 case PSEUDO_FUNC_CONST: 8115 e->X_op = O_constant; 8116 e->X_add_number = pseudo_func[idx].u.ival; 8117 break; 8118 8119 case PSEUDO_FUNC_REG: 8120 e->X_op = O_register; 8121 e->X_add_number = pseudo_func[idx].u.ival; 8122 break; 8123 8124 default: 8125 return 0; 8126 } 8127 return 1; 8128 } 8129 8130 /* first see if NAME is a known register name: */ 8131 sym = hash_find (md.reg_hash, name); 8132 if (sym) 8133 { 8134 e->X_op = O_register; 8135 e->X_add_number = S_GET_VALUE (sym); 8136 return 1; 8137 } 8138 8139 cdesc = hash_find (md.const_hash, name); 8140 if (cdesc) 8141 { 8142 e->X_op = O_constant; 8143 e->X_add_number = cdesc->value; 8144 return 1; 8145 } 8146 8147 /* check for inN, locN, or outN: */ 8148 idx = 0; 8149 switch (name[0]) 8150 { 8151 case 'i': 8152 if (name[1] == 'n' && ISDIGIT (name[2])) 8153 { 8154 dr = &md.in; 8155 idx = 2; 8156 } 8157 break; 8158 8159 case 'l': 8160 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3])) 8161 { 8162 dr = &md.loc; 8163 idx = 3; 8164 } 8165 break; 8166 8167 case 'o': 8168 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3])) 8169 { 8170 dr = &md.out; 8171 idx = 3; 8172 } 8173 break; 8174 8175 default: 8176 break; 8177 } 8178 8179 /* Ignore register numbers with leading zeroes, except zero itself. */ 8180 if (dr && (name[idx] != '0' || name[idx + 1] == '\0')) 8181 { 8182 unsigned long regnum; 8183 8184 /* The name is inN, locN, or outN; parse the register number. */ 8185 regnum = strtoul (name + idx, &end, 10); 8186 if (end > name + idx && *end == '\0' && regnum < 96) 8187 { 8188 if (regnum >= dr->num_regs) 8189 { 8190 if (!dr->num_regs) 8191 as_bad ("No current frame"); 8192 else 8193 as_bad ("Register number out of range 0..%u", 8194 dr->num_regs - 1); 8195 regnum = 0; 8196 } 8197 e->X_op = O_register; 8198 e->X_add_number = dr->base + regnum; 8199 return 1; 8200 } 8201 } 8202 8203 end = alloca (strlen (name) + 1); 8204 strcpy (end, name); 8205 name = ia64_canonicalize_symbol_name (end); 8206 if ((dr = hash_find (md.dynreg_hash, name))) 8207 { 8208 /* We've got ourselves the name of a rotating register set. 8209 Store the base register number in the low 16 bits of 8210 X_add_number and the size of the register set in the top 16 8211 bits. */ 8212 e->X_op = O_register; 8213 e->X_add_number = dr->base | (dr->num_regs << 16); 8214 return 1; 8215 } 8216 return 0; 8217} 8218 8219/* Remove the '#' suffix that indicates a symbol as opposed to a register. */ 8220 8221char * 8222ia64_canonicalize_symbol_name (name) 8223 char *name; 8224{ 8225 size_t len = strlen (name), full = len; 8226 8227 while (len > 0 && name[len - 1] == '#') 8228 --len; 8229 if (len <= 0) 8230 { 8231 if (full > 0) 8232 as_bad ("Standalone `#' is illegal"); 8233 } 8234 else if (len < full - 1) 8235 as_warn ("Redundant `#' suffix operators"); 8236 name[len] = '\0'; 8237 return name; 8238} 8239 8240/* Return true if idesc is a conditional branch instruction. This excludes 8241 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded 8242 because they always read/write resources regardless of the value of the 8243 qualifying predicate. br.ia must always use p0, and hence is always 8244 taken. Thus this function returns true for branches which can fall 8245 through, and which use no resources if they do fall through. */ 8246 8247static int 8248is_conditional_branch (idesc) 8249 struct ia64_opcode *idesc; 8250{ 8251 /* br is a conditional branch. Everything that starts with br. except 8252 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch. 8253 Everything that starts with brl is a conditional branch. */ 8254 return (idesc->name[0] == 'b' && idesc->name[1] == 'r' 8255 && (idesc->name[2] == '\0' 8256 || (idesc->name[2] == '.' && idesc->name[3] != 'i' 8257 && idesc->name[3] != 'c' && idesc->name[3] != 'w') 8258 || idesc->name[2] == 'l' 8259 /* br.cond, br.call, br.clr */ 8260 || (idesc->name[2] == '.' && idesc->name[3] == 'c' 8261 && (idesc->name[4] == 'a' || idesc->name[4] == 'o' 8262 || (idesc->name[4] == 'l' && idesc->name[5] == 'r'))))); 8263} 8264 8265/* Return whether the given opcode is a taken branch. If there's any doubt, 8266 returns zero. */ 8267 8268static int 8269is_taken_branch (idesc) 8270 struct ia64_opcode *idesc; 8271{ 8272 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0) 8273 || strncmp (idesc->name, "br.ia", 5) == 0); 8274} 8275 8276/* Return whether the given opcode is an interruption or rfi. If there's any 8277 doubt, returns zero. */ 8278 8279static int 8280is_interruption_or_rfi (idesc) 8281 struct ia64_opcode *idesc; 8282{ 8283 if (strcmp (idesc->name, "rfi") == 0) 8284 return 1; 8285 return 0; 8286} 8287 8288/* Returns the index of the given dependency in the opcode's list of chks, or 8289 -1 if there is no dependency. */ 8290 8291static int 8292depends_on (depind, idesc) 8293 int depind; 8294 struct ia64_opcode *idesc; 8295{ 8296 int i; 8297 const struct ia64_opcode_dependency *dep = idesc->dependencies; 8298 for (i = 0; i < dep->nchks; i++) 8299 { 8300 if (depind == DEP (dep->chks[i])) 8301 return i; 8302 } 8303 return -1; 8304} 8305 8306/* Determine a set of specific resources used for a particular resource 8307 class. Returns the number of specific resources identified For those 8308 cases which are not determinable statically, the resource returned is 8309 marked nonspecific. 8310 8311 Meanings of value in 'NOTE': 8312 1) only read/write when the register number is explicitly encoded in the 8313 insn. 8314 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only 8315 accesses CFM when qualifying predicate is in the rotating region. 8316 3) general register value is used to specify an indirect register; not 8317 determinable statically. 8318 4) only read the given resource when bits 7:0 of the indirect index 8319 register value does not match the register number of the resource; not 8320 determinable statically. 8321 5) all rules are implementation specific. 8322 6) only when both the index specified by the reader and the index specified 8323 by the writer have the same value in bits 63:61; not determinable 8324 statically. 8325 7) only access the specified resource when the corresponding mask bit is 8326 set 8327 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is 8328 only read when these insns reference FR2-31 8329 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only 8330 written when these insns write FR32-127 8331 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the 8332 instruction 8333 11) The target predicates are written independently of PR[qp], but source 8334 registers are only read if PR[qp] is true. Since the state of PR[qp] 8335 cannot statically be determined, all source registers are marked used. 8336 12) This insn only reads the specified predicate register when that 8337 register is the PR[qp]. 8338 13) This reference to ld-c only applies to teh GR whose value is loaded 8339 with data returned from memory, not the post-incremented address register. 8340 14) The RSE resource includes the implementation-specific RSE internal 8341 state resources. At least one (and possibly more) of these resources are 8342 read by each instruction listed in IC:rse-readers. At least one (and 8343 possibly more) of these resources are written by each insn listed in 8344 IC:rse-writers. 8345 15+16) Represents reserved instructions, which the assembler does not 8346 generate. 8347 17) CR[TPR] has a RAW dependency only between mov-to-CR-TPR and 8348 mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up. 8349 8350 Memory resources (i.e. locations in memory) are *not* marked or tracked by 8351 this code; there are no dependency violations based on memory access. 8352*/ 8353 8354#define MAX_SPECS 256 8355#define DV_CHK 1 8356#define DV_REG 0 8357 8358static int 8359specify_resource (dep, idesc, type, specs, note, path) 8360 const struct ia64_dependency *dep; 8361 struct ia64_opcode *idesc; 8362 int type; /* is this a DV chk or a DV reg? */ 8363 struct rsrc specs[MAX_SPECS]; /* returned specific resources */ 8364 int note; /* resource note for this insn's usage */ 8365 int path; /* which execution path to examine */ 8366{ 8367 int count = 0; 8368 int i; 8369 int rsrc_write = 0; 8370 struct rsrc tmpl; 8371 8372 if (dep->mode == IA64_DV_WAW 8373 || (dep->mode == IA64_DV_RAW && type == DV_REG) 8374 || (dep->mode == IA64_DV_WAR && type == DV_CHK)) 8375 rsrc_write = 1; 8376 8377 /* template for any resources we identify */ 8378 tmpl.dependency = dep; 8379 tmpl.note = note; 8380 tmpl.insn_srlz = tmpl.data_srlz = 0; 8381 tmpl.qp_regno = CURR_SLOT.qp_regno; 8382 tmpl.link_to_qp_branch = 1; 8383 tmpl.mem_offset.hint = 0; 8384 tmpl.mem_offset.offset = 0; 8385 tmpl.mem_offset.base = 0; 8386 tmpl.specific = 1; 8387 tmpl.index = -1; 8388 tmpl.cmp_type = CMP_NONE; 8389 tmpl.depind = 0; 8390 tmpl.file = NULL; 8391 tmpl.line = 0; 8392 tmpl.path = 0; 8393 8394#define UNHANDLED \ 8395as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \ 8396dep->name, idesc->name, (rsrc_write?"write":"read"), note) 8397#define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path) 8398 8399 /* we don't need to track these */ 8400 if (dep->semantics == IA64_DVS_NONE) 8401 return 0; 8402 8403 switch (dep->specifier) 8404 { 8405 case IA64_RS_AR_K: 8406 if (note == 1) 8407 { 8408 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) 8409 { 8410 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 8411 if (regno >= 0 && regno <= 7) 8412 { 8413 specs[count] = tmpl; 8414 specs[count++].index = regno; 8415 } 8416 } 8417 } 8418 else if (note == 0) 8419 { 8420 for (i = 0; i < 8; i++) 8421 { 8422 specs[count] = tmpl; 8423 specs[count++].index = i; 8424 } 8425 } 8426 else 8427 { 8428 UNHANDLED; 8429 } 8430 break; 8431 8432 case IA64_RS_AR_UNAT: 8433 /* This is a mov =AR or mov AR= instruction. */ 8434 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) 8435 { 8436 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 8437 if (regno == AR_UNAT) 8438 { 8439 specs[count++] = tmpl; 8440 } 8441 } 8442 else 8443 { 8444 /* This is a spill/fill, or other instruction that modifies the 8445 unat register. */ 8446 8447 /* Unless we can determine the specific bits used, mark the whole 8448 thing; bits 8:3 of the memory address indicate the bit used in 8449 UNAT. The .mem.offset hint may be used to eliminate a small 8450 subset of conflicts. */ 8451 specs[count] = tmpl; 8452 if (md.mem_offset.hint) 8453 { 8454 if (md.debug_dv) 8455 fprintf (stderr, " Using hint for spill/fill\n"); 8456 /* The index isn't actually used, just set it to something 8457 approximating the bit index. */ 8458 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F; 8459 specs[count].mem_offset.hint = 1; 8460 specs[count].mem_offset.offset = md.mem_offset.offset; 8461 specs[count++].mem_offset.base = md.mem_offset.base; 8462 } 8463 else 8464 { 8465 specs[count++].specific = 0; 8466 } 8467 } 8468 break; 8469 8470 case IA64_RS_AR: 8471 if (note == 1) 8472 { 8473 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) 8474 { 8475 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 8476 if ((regno >= 8 && regno <= 15) 8477 || (regno >= 20 && regno <= 23) 8478 || (regno >= 31 && regno <= 39) 8479 || (regno >= 41 && regno <= 47) 8480 || (regno >= 67 && regno <= 111)) 8481 { 8482 specs[count] = tmpl; 8483 specs[count++].index = regno; 8484 } 8485 } 8486 } 8487 else 8488 { 8489 UNHANDLED; 8490 } 8491 break; 8492 8493 case IA64_RS_ARb: 8494 if (note == 1) 8495 { 8496 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) 8497 { 8498 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 8499 if ((regno >= 48 && regno <= 63) 8500 || (regno >= 112 && regno <= 127)) 8501 { 8502 specs[count] = tmpl; 8503 specs[count++].index = regno; 8504 } 8505 } 8506 } 8507 else if (note == 0) 8508 { 8509 for (i = 48; i < 64; i++) 8510 { 8511 specs[count] = tmpl; 8512 specs[count++].index = i; 8513 } 8514 for (i = 112; i < 128; i++) 8515 { 8516 specs[count] = tmpl; 8517 specs[count++].index = i; 8518 } 8519 } 8520 else 8521 { 8522 UNHANDLED; 8523 } 8524 break; 8525 8526 case IA64_RS_BR: 8527 if (note != 1) 8528 { 8529 UNHANDLED; 8530 } 8531 else 8532 { 8533 if (rsrc_write) 8534 { 8535 for (i = 0; i < idesc->num_outputs; i++) 8536 if (idesc->operands[i] == IA64_OPND_B1 8537 || idesc->operands[i] == IA64_OPND_B2) 8538 { 8539 specs[count] = tmpl; 8540 specs[count++].index = 8541 CURR_SLOT.opnd[i].X_add_number - REG_BR; 8542 } 8543 } 8544 else 8545 { 8546 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) 8547 if (idesc->operands[i] == IA64_OPND_B1 8548 || idesc->operands[i] == IA64_OPND_B2) 8549 { 8550 specs[count] = tmpl; 8551 specs[count++].index = 8552 CURR_SLOT.opnd[i].X_add_number - REG_BR; 8553 } 8554 } 8555 } 8556 break; 8557 8558 case IA64_RS_CPUID: /* four or more registers */ 8559 if (note == 3) 8560 { 8561 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3) 8562 { 8563 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8564 if (regno >= 0 && regno < NELEMS (gr_values) 8565 && KNOWN (regno)) 8566 { 8567 specs[count] = tmpl; 8568 specs[count++].index = gr_values[regno].value & 0xFF; 8569 } 8570 else 8571 { 8572 specs[count] = tmpl; 8573 specs[count++].specific = 0; 8574 } 8575 } 8576 } 8577 else 8578 { 8579 UNHANDLED; 8580 } 8581 break; 8582 8583 case IA64_RS_DBR: /* four or more registers */ 8584 if (note == 3) 8585 { 8586 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3) 8587 { 8588 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8589 if (regno >= 0 && regno < NELEMS (gr_values) 8590 && KNOWN (regno)) 8591 { 8592 specs[count] = tmpl; 8593 specs[count++].index = gr_values[regno].value & 0xFF; 8594 } 8595 else 8596 { 8597 specs[count] = tmpl; 8598 specs[count++].specific = 0; 8599 } 8600 } 8601 } 8602 else if (note == 0 && !rsrc_write) 8603 { 8604 specs[count] = tmpl; 8605 specs[count++].specific = 0; 8606 } 8607 else 8608 { 8609 UNHANDLED; 8610 } 8611 break; 8612 8613 case IA64_RS_IBR: /* four or more registers */ 8614 if (note == 3) 8615 { 8616 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3) 8617 { 8618 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8619 if (regno >= 0 && regno < NELEMS (gr_values) 8620 && KNOWN (regno)) 8621 { 8622 specs[count] = tmpl; 8623 specs[count++].index = gr_values[regno].value & 0xFF; 8624 } 8625 else 8626 { 8627 specs[count] = tmpl; 8628 specs[count++].specific = 0; 8629 } 8630 } 8631 } 8632 else 8633 { 8634 UNHANDLED; 8635 } 8636 break; 8637 8638 case IA64_RS_MSR: 8639 if (note == 5) 8640 { 8641 /* These are implementation specific. Force all references to 8642 conflict with all other references. */ 8643 specs[count] = tmpl; 8644 specs[count++].specific = 0; 8645 } 8646 else 8647 { 8648 UNHANDLED; 8649 } 8650 break; 8651 8652 case IA64_RS_PKR: /* 16 or more registers */ 8653 if (note == 3 || note == 4) 8654 { 8655 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3) 8656 { 8657 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8658 if (regno >= 0 && regno < NELEMS (gr_values) 8659 && KNOWN (regno)) 8660 { 8661 if (note == 3) 8662 { 8663 specs[count] = tmpl; 8664 specs[count++].index = gr_values[regno].value & 0xFF; 8665 } 8666 else 8667 for (i = 0; i < NELEMS (gr_values); i++) 8668 { 8669 /* Uses all registers *except* the one in R3. */ 8670 if ((unsigned)i != (gr_values[regno].value & 0xFF)) 8671 { 8672 specs[count] = tmpl; 8673 specs[count++].index = i; 8674 } 8675 } 8676 } 8677 else 8678 { 8679 specs[count] = tmpl; 8680 specs[count++].specific = 0; 8681 } 8682 } 8683 } 8684 else if (note == 0) 8685 { 8686 /* probe et al. */ 8687 specs[count] = tmpl; 8688 specs[count++].specific = 0; 8689 } 8690 break; 8691 8692 case IA64_RS_PMC: /* four or more registers */ 8693 if (note == 3) 8694 { 8695 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3 8696 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3)) 8697 8698 { 8699 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write) 8700 ? 1 : !rsrc_write); 8701 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR; 8702 if (regno >= 0 && regno < NELEMS (gr_values) 8703 && KNOWN (regno)) 8704 { 8705 specs[count] = tmpl; 8706 specs[count++].index = gr_values[regno].value & 0xFF; 8707 } 8708 else 8709 { 8710 specs[count] = tmpl; 8711 specs[count++].specific = 0; 8712 } 8713 } 8714 } 8715 else 8716 { 8717 UNHANDLED; 8718 } 8719 break; 8720 8721 case IA64_RS_PMD: /* four or more registers */ 8722 if (note == 3) 8723 { 8724 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3) 8725 { 8726 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8727 if (regno >= 0 && regno < NELEMS (gr_values) 8728 && KNOWN (regno)) 8729 { 8730 specs[count] = tmpl; 8731 specs[count++].index = gr_values[regno].value & 0xFF; 8732 } 8733 else 8734 { 8735 specs[count] = tmpl; 8736 specs[count++].specific = 0; 8737 } 8738 } 8739 } 8740 else 8741 { 8742 UNHANDLED; 8743 } 8744 break; 8745 8746 case IA64_RS_RR: /* eight registers */ 8747 if (note == 6) 8748 { 8749 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3) 8750 { 8751 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR; 8752 if (regno >= 0 && regno < NELEMS (gr_values) 8753 && KNOWN (regno)) 8754 { 8755 specs[count] = tmpl; 8756 specs[count++].index = (gr_values[regno].value >> 61) & 0x7; 8757 } 8758 else 8759 { 8760 specs[count] = tmpl; 8761 specs[count++].specific = 0; 8762 } 8763 } 8764 } 8765 else if (note == 0 && !rsrc_write) 8766 { 8767 specs[count] = tmpl; 8768 specs[count++].specific = 0; 8769 } 8770 else 8771 { 8772 UNHANDLED; 8773 } 8774 break; 8775 8776 case IA64_RS_CR_IRR: 8777 if (note == 0) 8778 { 8779 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */ 8780 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR; 8781 if (rsrc_write 8782 && idesc->operands[1] == IA64_OPND_CR3 8783 && regno == CR_IVR) 8784 { 8785 for (i = 0; i < 4; i++) 8786 { 8787 specs[count] = tmpl; 8788 specs[count++].index = CR_IRR0 + i; 8789 } 8790 } 8791 } 8792 else if (note == 1) 8793 { 8794 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; 8795 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 8796 && regno >= CR_IRR0 8797 && regno <= CR_IRR3) 8798 { 8799 specs[count] = tmpl; 8800 specs[count++].index = regno; 8801 } 8802 } 8803 else 8804 { 8805 UNHANDLED; 8806 } 8807 break; 8808 8809 case IA64_RS_CR_LRR: 8810 if (note != 1) 8811 { 8812 UNHANDLED; 8813 } 8814 else 8815 { 8816 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; 8817 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3 8818 && (regno == CR_LRR0 || regno == CR_LRR1)) 8819 { 8820 specs[count] = tmpl; 8821 specs[count++].index = regno; 8822 } 8823 } 8824 break; 8825 8826 case IA64_RS_CR: 8827 if (note == 1) 8828 { 8829 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) 8830 { 8831 specs[count] = tmpl; 8832 specs[count++].index = 8833 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; 8834 } 8835 } 8836 else 8837 { 8838 UNHANDLED; 8839 } 8840 break; 8841 8842 case IA64_RS_FR: 8843 case IA64_RS_FRb: 8844 if (note != 1) 8845 { 8846 UNHANDLED; 8847 } 8848 else if (rsrc_write) 8849 { 8850 if (dep->specifier == IA64_RS_FRb 8851 && idesc->operands[0] == IA64_OPND_F1) 8852 { 8853 specs[count] = tmpl; 8854 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR; 8855 } 8856 } 8857 else 8858 { 8859 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++) 8860 { 8861 if (idesc->operands[i] == IA64_OPND_F2 8862 || idesc->operands[i] == IA64_OPND_F3 8863 || idesc->operands[i] == IA64_OPND_F4) 8864 { 8865 specs[count] = tmpl; 8866 specs[count++].index = 8867 CURR_SLOT.opnd[i].X_add_number - REG_FR; 8868 } 8869 } 8870 } 8871 break; 8872 8873 case IA64_RS_GR: 8874 if (note == 13) 8875 { 8876 /* This reference applies only to the GR whose value is loaded with 8877 data returned from memory. */ 8878 specs[count] = tmpl; 8879 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR; 8880 } 8881 else if (note == 1) 8882 { 8883 if (rsrc_write) 8884 { 8885 for (i = 0; i < idesc->num_outputs; i++) 8886 if (idesc->operands[i] == IA64_OPND_R1 8887 || idesc->operands[i] == IA64_OPND_R2 8888 || idesc->operands[i] == IA64_OPND_R3) 8889 { 8890 specs[count] = tmpl; 8891 specs[count++].index = 8892 CURR_SLOT.opnd[i].X_add_number - REG_GR; 8893 } 8894 if (idesc->flags & IA64_OPCODE_POSTINC) 8895 for (i = 0; i < NELEMS (idesc->operands); i++) 8896 if (idesc->operands[i] == IA64_OPND_MR3) 8897 { 8898 specs[count] = tmpl; 8899 specs[count++].index = 8900 CURR_SLOT.opnd[i].X_add_number - REG_GR; 8901 } 8902 } 8903 else 8904 { 8905 /* Look for anything that reads a GR. */ 8906 for (i = 0; i < NELEMS (idesc->operands); i++) 8907 { 8908 if (idesc->operands[i] == IA64_OPND_MR3 8909 || idesc->operands[i] == IA64_OPND_CPUID_R3 8910 || idesc->operands[i] == IA64_OPND_DBR_R3 8911 || idesc->operands[i] == IA64_OPND_IBR_R3 8912 || idesc->operands[i] == IA64_OPND_MSR_R3 8913 || idesc->operands[i] == IA64_OPND_PKR_R3 8914 || idesc->operands[i] == IA64_OPND_PMC_R3 8915 || idesc->operands[i] == IA64_OPND_PMD_R3 8916 || idesc->operands[i] == IA64_OPND_RR_R3 8917 || ((i >= idesc->num_outputs) 8918 && (idesc->operands[i] == IA64_OPND_R1 8919 || idesc->operands[i] == IA64_OPND_R2 8920 || idesc->operands[i] == IA64_OPND_R3 8921 /* addl source register. */ 8922 || idesc->operands[i] == IA64_OPND_R3_2))) 8923 { 8924 specs[count] = tmpl; 8925 specs[count++].index = 8926 CURR_SLOT.opnd[i].X_add_number - REG_GR; 8927 } 8928 } 8929 } 8930 } 8931 else 8932 { 8933 UNHANDLED; 8934 } 8935 break; 8936 8937 /* This is the same as IA64_RS_PRr, except that the register range is 8938 from 1 - 15, and there are no rotating register reads/writes here. */ 8939 case IA64_RS_PR: 8940 if (note == 0) 8941 { 8942 for (i = 1; i < 16; i++) 8943 { 8944 specs[count] = tmpl; 8945 specs[count++].index = i; 8946 } 8947 } 8948 else if (note == 7) 8949 { 8950 valueT mask = 0; 8951 /* Mark only those registers indicated by the mask. */ 8952 if (rsrc_write) 8953 { 8954 mask = CURR_SLOT.opnd[2].X_add_number; 8955 for (i = 1; i < 16; i++) 8956 if (mask & ((valueT) 1 << i)) 8957 { 8958 specs[count] = tmpl; 8959 specs[count++].index = i; 8960 } 8961 } 8962 else 8963 { 8964 UNHANDLED; 8965 } 8966 } 8967 else if (note == 11) /* note 11 implies note 1 as well */ 8968 { 8969 if (rsrc_write) 8970 { 8971 for (i = 0; i < idesc->num_outputs; i++) 8972 { 8973 if (idesc->operands[i] == IA64_OPND_P1 8974 || idesc->operands[i] == IA64_OPND_P2) 8975 { 8976 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; 8977 if (regno >= 1 && regno < 16) 8978 { 8979 specs[count] = tmpl; 8980 specs[count++].index = regno; 8981 } 8982 } 8983 } 8984 } 8985 else 8986 { 8987 UNHANDLED; 8988 } 8989 } 8990 else if (note == 12) 8991 { 8992 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) 8993 { 8994 specs[count] = tmpl; 8995 specs[count++].index = CURR_SLOT.qp_regno; 8996 } 8997 } 8998 else if (note == 1) 8999 { 9000 if (rsrc_write) 9001 { 9002 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; 9003 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; 9004 int or_andcm = strstr (idesc->name, "or.andcm") != NULL; 9005 int and_orcm = strstr (idesc->name, "and.orcm") != NULL; 9006 9007 if ((idesc->operands[0] == IA64_OPND_P1 9008 || idesc->operands[0] == IA64_OPND_P2) 9009 && p1 >= 1 && p1 < 16) 9010 { 9011 specs[count] = tmpl; 9012 specs[count].cmp_type = 9013 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); 9014 specs[count++].index = p1; 9015 } 9016 if ((idesc->operands[1] == IA64_OPND_P1 9017 || idesc->operands[1] == IA64_OPND_P2) 9018 && p2 >= 1 && p2 < 16) 9019 { 9020 specs[count] = tmpl; 9021 specs[count].cmp_type = 9022 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); 9023 specs[count++].index = p2; 9024 } 9025 } 9026 else 9027 { 9028 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16) 9029 { 9030 specs[count] = tmpl; 9031 specs[count++].index = CURR_SLOT.qp_regno; 9032 } 9033 if (idesc->operands[1] == IA64_OPND_PR) 9034 { 9035 for (i = 1; i < 16; i++) 9036 { 9037 specs[count] = tmpl; 9038 specs[count++].index = i; 9039 } 9040 } 9041 } 9042 } 9043 else 9044 { 9045 UNHANDLED; 9046 } 9047 break; 9048 9049 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are 9050 simplified cases of this. */ 9051 case IA64_RS_PRr: 9052 if (note == 0) 9053 { 9054 for (i = 16; i < 63; i++) 9055 { 9056 specs[count] = tmpl; 9057 specs[count++].index = i; 9058 } 9059 } 9060 else if (note == 7) 9061 { 9062 valueT mask = 0; 9063 /* Mark only those registers indicated by the mask. */ 9064 if (rsrc_write 9065 && idesc->operands[0] == IA64_OPND_PR) 9066 { 9067 mask = CURR_SLOT.opnd[2].X_add_number; 9068 if (mask & ((valueT) 1 << 16)) 9069 for (i = 16; i < 63; i++) 9070 { 9071 specs[count] = tmpl; 9072 specs[count++].index = i; 9073 } 9074 } 9075 else if (rsrc_write 9076 && idesc->operands[0] == IA64_OPND_PR_ROT) 9077 { 9078 for (i = 16; i < 63; i++) 9079 { 9080 specs[count] = tmpl; 9081 specs[count++].index = i; 9082 } 9083 } 9084 else 9085 { 9086 UNHANDLED; 9087 } 9088 } 9089 else if (note == 11) /* note 11 implies note 1 as well */ 9090 { 9091 if (rsrc_write) 9092 { 9093 for (i = 0; i < idesc->num_outputs; i++) 9094 { 9095 if (idesc->operands[i] == IA64_OPND_P1 9096 || idesc->operands[i] == IA64_OPND_P2) 9097 { 9098 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; 9099 if (regno >= 16 && regno < 63) 9100 { 9101 specs[count] = tmpl; 9102 specs[count++].index = regno; 9103 } 9104 } 9105 } 9106 } 9107 else 9108 { 9109 UNHANDLED; 9110 } 9111 } 9112 else if (note == 12) 9113 { 9114 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) 9115 { 9116 specs[count] = tmpl; 9117 specs[count++].index = CURR_SLOT.qp_regno; 9118 } 9119 } 9120 else if (note == 1) 9121 { 9122 if (rsrc_write) 9123 { 9124 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; 9125 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; 9126 int or_andcm = strstr (idesc->name, "or.andcm") != NULL; 9127 int and_orcm = strstr (idesc->name, "and.orcm") != NULL; 9128 9129 if ((idesc->operands[0] == IA64_OPND_P1 9130 || idesc->operands[0] == IA64_OPND_P2) 9131 && p1 >= 16 && p1 < 63) 9132 { 9133 specs[count] = tmpl; 9134 specs[count].cmp_type = 9135 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); 9136 specs[count++].index = p1; 9137 } 9138 if ((idesc->operands[1] == IA64_OPND_P1 9139 || idesc->operands[1] == IA64_OPND_P2) 9140 && p2 >= 16 && p2 < 63) 9141 { 9142 specs[count] = tmpl; 9143 specs[count].cmp_type = 9144 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); 9145 specs[count++].index = p2; 9146 } 9147 } 9148 else 9149 { 9150 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63) 9151 { 9152 specs[count] = tmpl; 9153 specs[count++].index = CURR_SLOT.qp_regno; 9154 } 9155 if (idesc->operands[1] == IA64_OPND_PR) 9156 { 9157 for (i = 16; i < 63; i++) 9158 { 9159 specs[count] = tmpl; 9160 specs[count++].index = i; 9161 } 9162 } 9163 } 9164 } 9165 else 9166 { 9167 UNHANDLED; 9168 } 9169 break; 9170 9171 case IA64_RS_PSR: 9172 /* Verify that the instruction is using the PSR bit indicated in 9173 dep->regindex. */ 9174 if (note == 0) 9175 { 9176 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM) 9177 { 9178 if (dep->regindex < 6) 9179 { 9180 specs[count++] = tmpl; 9181 } 9182 } 9183 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR) 9184 { 9185 if (dep->regindex < 32 9186 || dep->regindex == 35 9187 || dep->regindex == 36 9188 || (!rsrc_write && dep->regindex == PSR_CPL)) 9189 { 9190 specs[count++] = tmpl; 9191 } 9192 } 9193 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L) 9194 { 9195 if (dep->regindex < 32 9196 || dep->regindex == 35 9197 || dep->regindex == 36 9198 || (rsrc_write && dep->regindex == PSR_CPL)) 9199 { 9200 specs[count++] = tmpl; 9201 } 9202 } 9203 else 9204 { 9205 /* Several PSR bits have very specific dependencies. */ 9206 switch (dep->regindex) 9207 { 9208 default: 9209 specs[count++] = tmpl; 9210 break; 9211 case PSR_IC: 9212 if (rsrc_write) 9213 { 9214 specs[count++] = tmpl; 9215 } 9216 else 9217 { 9218 /* Only certain CR accesses use PSR.ic */ 9219 if (idesc->operands[0] == IA64_OPND_CR3 9220 || idesc->operands[1] == IA64_OPND_CR3) 9221 { 9222 int index = 9223 ((idesc->operands[0] == IA64_OPND_CR3) 9224 ? 0 : 1); 9225 int regno = 9226 CURR_SLOT.opnd[index].X_add_number - REG_CR; 9227 9228 switch (regno) 9229 { 9230 default: 9231 break; 9232 case CR_ITIR: 9233 case CR_IFS: 9234 case CR_IIM: 9235 case CR_IIP: 9236 case CR_IPSR: 9237 case CR_ISR: 9238 case CR_IFA: 9239 case CR_IHA: 9240 case CR_IIPA: 9241 specs[count++] = tmpl; 9242 break; 9243 } 9244 } 9245 } 9246 break; 9247 case PSR_CPL: 9248 if (rsrc_write) 9249 { 9250 specs[count++] = tmpl; 9251 } 9252 else 9253 { 9254 /* Only some AR accesses use cpl */ 9255 if (idesc->operands[0] == IA64_OPND_AR3 9256 || idesc->operands[1] == IA64_OPND_AR3) 9257 { 9258 int index = 9259 ((idesc->operands[0] == IA64_OPND_AR3) 9260 ? 0 : 1); 9261 int regno = 9262 CURR_SLOT.opnd[index].X_add_number - REG_AR; 9263 9264 if (regno == AR_ITC 9265 || (index == 0 9266 && (regno == AR_ITC 9267 || regno == AR_RSC 9268 || (regno >= AR_K0 9269 && regno <= AR_K7)))) 9270 { 9271 specs[count++] = tmpl; 9272 } 9273 } 9274 else 9275 { 9276 specs[count++] = tmpl; 9277 } 9278 break; 9279 } 9280 } 9281 } 9282 } 9283 else if (note == 7) 9284 { 9285 valueT mask = 0; 9286 if (idesc->operands[0] == IA64_OPND_IMMU24) 9287 { 9288 mask = CURR_SLOT.opnd[0].X_add_number; 9289 } 9290 else 9291 { 9292 UNHANDLED; 9293 } 9294 if (mask & ((valueT) 1 << dep->regindex)) 9295 { 9296 specs[count++] = tmpl; 9297 } 9298 } 9299 else if (note == 8) 9300 { 9301 int min = dep->regindex == PSR_DFL ? 2 : 32; 9302 int max = dep->regindex == PSR_DFL ? 31 : 127; 9303 /* dfh is read on FR32-127; dfl is read on FR2-31 */ 9304 for (i = 0; i < NELEMS (idesc->operands); i++) 9305 { 9306 if (idesc->operands[i] == IA64_OPND_F1 9307 || idesc->operands[i] == IA64_OPND_F2 9308 || idesc->operands[i] == IA64_OPND_F3 9309 || idesc->operands[i] == IA64_OPND_F4) 9310 { 9311 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; 9312 if (reg >= min && reg <= max) 9313 { 9314 specs[count++] = tmpl; 9315 } 9316 } 9317 } 9318 } 9319 else if (note == 9) 9320 { 9321 int min = dep->regindex == PSR_MFL ? 2 : 32; 9322 int max = dep->regindex == PSR_MFL ? 31 : 127; 9323 /* mfh is read on writes to FR32-127; mfl is read on writes to 9324 FR2-31 */ 9325 for (i = 0; i < idesc->num_outputs; i++) 9326 { 9327 if (idesc->operands[i] == IA64_OPND_F1) 9328 { 9329 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR; 9330 if (reg >= min && reg <= max) 9331 { 9332 specs[count++] = tmpl; 9333 } 9334 } 9335 } 9336 } 9337 else if (note == 10) 9338 { 9339 for (i = 0; i < NELEMS (idesc->operands); i++) 9340 { 9341 if (idesc->operands[i] == IA64_OPND_R1 9342 || idesc->operands[i] == IA64_OPND_R2 9343 || idesc->operands[i] == IA64_OPND_R3) 9344 { 9345 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; 9346 if (regno >= 16 && regno <= 31) 9347 { 9348 specs[count++] = tmpl; 9349 } 9350 } 9351 } 9352 } 9353 else 9354 { 9355 UNHANDLED; 9356 } 9357 break; 9358 9359 case IA64_RS_AR_FPSR: 9360 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3) 9361 { 9362 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 9363 if (regno == AR_FPSR) 9364 { 9365 specs[count++] = tmpl; 9366 } 9367 } 9368 else 9369 { 9370 specs[count++] = tmpl; 9371 } 9372 break; 9373 9374 case IA64_RS_ARX: 9375 /* Handle all AR[REG] resources */ 9376 if (note == 0 || note == 1) 9377 { 9378 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR; 9379 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3 9380 && regno == dep->regindex) 9381 { 9382 specs[count++] = tmpl; 9383 } 9384 /* other AR[REG] resources may be affected by AR accesses */ 9385 else if (idesc->operands[0] == IA64_OPND_AR3) 9386 { 9387 /* AR[] writes */ 9388 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR; 9389 switch (dep->regindex) 9390 { 9391 default: 9392 break; 9393 case AR_BSP: 9394 case AR_RNAT: 9395 if (regno == AR_BSPSTORE) 9396 { 9397 specs[count++] = tmpl; 9398 } 9399 case AR_RSC: 9400 if (!rsrc_write && 9401 (regno == AR_BSPSTORE 9402 || regno == AR_RNAT)) 9403 { 9404 specs[count++] = tmpl; 9405 } 9406 break; 9407 } 9408 } 9409 else if (idesc->operands[1] == IA64_OPND_AR3) 9410 { 9411 /* AR[] reads */ 9412 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR; 9413 switch (dep->regindex) 9414 { 9415 default: 9416 break; 9417 case AR_RSC: 9418 if (regno == AR_BSPSTORE || regno == AR_RNAT) 9419 { 9420 specs[count++] = tmpl; 9421 } 9422 break; 9423 } 9424 } 9425 else 9426 { 9427 specs[count++] = tmpl; 9428 } 9429 } 9430 else 9431 { 9432 UNHANDLED; 9433 } 9434 break; 9435 9436 case IA64_RS_CRX: 9437 /* Handle all CR[REG] resources. 9438 ??? FIXME: The rule 17 isn't really handled correctly. */ 9439 if (note == 0 || note == 1 || note == 17) 9440 { 9441 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3) 9442 { 9443 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR; 9444 if (regno == dep->regindex) 9445 { 9446 specs[count++] = tmpl; 9447 } 9448 else if (!rsrc_write) 9449 { 9450 /* Reads from CR[IVR] affect other resources. */ 9451 if (regno == CR_IVR) 9452 { 9453 if ((dep->regindex >= CR_IRR0 9454 && dep->regindex <= CR_IRR3) 9455 || dep->regindex == CR_TPR) 9456 { 9457 specs[count++] = tmpl; 9458 } 9459 } 9460 } 9461 } 9462 else 9463 { 9464 specs[count++] = tmpl; 9465 } 9466 } 9467 else 9468 { 9469 UNHANDLED; 9470 } 9471 break; 9472 9473 case IA64_RS_INSERVICE: 9474 /* look for write of EOI (67) or read of IVR (65) */ 9475 if ((idesc->operands[0] == IA64_OPND_CR3 9476 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI) 9477 || (idesc->operands[1] == IA64_OPND_CR3 9478 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR)) 9479 { 9480 specs[count++] = tmpl; 9481 } 9482 break; 9483 9484 case IA64_RS_GR0: 9485 if (note == 1) 9486 { 9487 specs[count++] = tmpl; 9488 } 9489 else 9490 { 9491 UNHANDLED; 9492 } 9493 break; 9494 9495 case IA64_RS_CFM: 9496 if (note != 2) 9497 { 9498 specs[count++] = tmpl; 9499 } 9500 else 9501 { 9502 /* Check if any of the registers accessed are in the rotating region. 9503 mov to/from pr accesses CFM only when qp_regno is in the rotating 9504 region */ 9505 for (i = 0; i < NELEMS (idesc->operands); i++) 9506 { 9507 if (idesc->operands[i] == IA64_OPND_R1 9508 || idesc->operands[i] == IA64_OPND_R2 9509 || idesc->operands[i] == IA64_OPND_R3) 9510 { 9511 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR; 9512 /* Assumes that md.rot.num_regs is always valid */ 9513 if (md.rot.num_regs > 0 9514 && num > 31 9515 && num < 31 + md.rot.num_regs) 9516 { 9517 specs[count] = tmpl; 9518 specs[count++].specific = 0; 9519 } 9520 } 9521 else if (idesc->operands[i] == IA64_OPND_F1 9522 || idesc->operands[i] == IA64_OPND_F2 9523 || idesc->operands[i] == IA64_OPND_F3 9524 || idesc->operands[i] == IA64_OPND_F4) 9525 { 9526 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR; 9527 if (num > 31) 9528 { 9529 specs[count] = tmpl; 9530 specs[count++].specific = 0; 9531 } 9532 } 9533 else if (idesc->operands[i] == IA64_OPND_P1 9534 || idesc->operands[i] == IA64_OPND_P2) 9535 { 9536 int num = CURR_SLOT.opnd[i].X_add_number - REG_P; 9537 if (num > 15) 9538 { 9539 specs[count] = tmpl; 9540 specs[count++].specific = 0; 9541 } 9542 } 9543 } 9544 if (CURR_SLOT.qp_regno > 15) 9545 { 9546 specs[count] = tmpl; 9547 specs[count++].specific = 0; 9548 } 9549 } 9550 break; 9551 9552 /* This is the same as IA64_RS_PRr, except simplified to account for 9553 the fact that there is only one register. */ 9554 case IA64_RS_PR63: 9555 if (note == 0) 9556 { 9557 specs[count++] = tmpl; 9558 } 9559 else if (note == 7) 9560 { 9561 valueT mask = 0; 9562 if (idesc->operands[2] == IA64_OPND_IMM17) 9563 mask = CURR_SLOT.opnd[2].X_add_number; 9564 if (mask & ((valueT) 1 << 63)) 9565 specs[count++] = tmpl; 9566 } 9567 else if (note == 11) 9568 { 9569 if ((idesc->operands[0] == IA64_OPND_P1 9570 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63) 9571 || (idesc->operands[1] == IA64_OPND_P2 9572 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63)) 9573 { 9574 specs[count++] = tmpl; 9575 } 9576 } 9577 else if (note == 12) 9578 { 9579 if (CURR_SLOT.qp_regno == 63) 9580 { 9581 specs[count++] = tmpl; 9582 } 9583 } 9584 else if (note == 1) 9585 { 9586 if (rsrc_write) 9587 { 9588 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; 9589 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; 9590 int or_andcm = strstr (idesc->name, "or.andcm") != NULL; 9591 int and_orcm = strstr (idesc->name, "and.orcm") != NULL; 9592 9593 if (p1 == 63 9594 && (idesc->operands[0] == IA64_OPND_P1 9595 || idesc->operands[0] == IA64_OPND_P2)) 9596 { 9597 specs[count] = tmpl; 9598 specs[count++].cmp_type = 9599 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE)); 9600 } 9601 if (p2 == 63 9602 && (idesc->operands[1] == IA64_OPND_P1 9603 || idesc->operands[1] == IA64_OPND_P2)) 9604 { 9605 specs[count] = tmpl; 9606 specs[count++].cmp_type = 9607 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE)); 9608 } 9609 } 9610 else 9611 { 9612 if (CURR_SLOT.qp_regno == 63) 9613 { 9614 specs[count++] = tmpl; 9615 } 9616 } 9617 } 9618 else 9619 { 9620 UNHANDLED; 9621 } 9622 break; 9623 9624 case IA64_RS_RSE: 9625 /* FIXME we can identify some individual RSE written resources, but RSE 9626 read resources have not yet been completely identified, so for now 9627 treat RSE as a single resource */ 9628 if (strncmp (idesc->name, "mov", 3) == 0) 9629 { 9630 if (rsrc_write) 9631 { 9632 if (idesc->operands[0] == IA64_OPND_AR3 9633 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE) 9634 { 9635 specs[count++] = tmpl; 9636 } 9637 } 9638 else 9639 { 9640 if (idesc->operands[0] == IA64_OPND_AR3) 9641 { 9642 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE 9643 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT) 9644 { 9645 specs[count++] = tmpl; 9646 } 9647 } 9648 else if (idesc->operands[1] == IA64_OPND_AR3) 9649 { 9650 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP 9651 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE 9652 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT) 9653 { 9654 specs[count++] = tmpl; 9655 } 9656 } 9657 } 9658 } 9659 else 9660 { 9661 specs[count++] = tmpl; 9662 } 9663 break; 9664 9665 case IA64_RS_ANY: 9666 /* FIXME -- do any of these need to be non-specific? */ 9667 specs[count++] = tmpl; 9668 break; 9669 9670 default: 9671 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier); 9672 break; 9673 } 9674 9675 return count; 9676} 9677 9678/* Clear branch flags on marked resources. This breaks the link between the 9679 QP of the marking instruction and a subsequent branch on the same QP. */ 9680 9681static void 9682clear_qp_branch_flag (mask) 9683 valueT mask; 9684{ 9685 int i; 9686 for (i = 0; i < regdepslen; i++) 9687 { 9688 valueT bit = ((valueT) 1 << regdeps[i].qp_regno); 9689 if ((bit & mask) != 0) 9690 { 9691 regdeps[i].link_to_qp_branch = 0; 9692 } 9693 } 9694} 9695 9696/* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove 9697 any mutexes which contain one of the PRs and create new ones when 9698 needed. */ 9699 9700static int 9701update_qp_mutex (valueT mask) 9702{ 9703 int i; 9704 int add = 0; 9705 9706 i = 0; 9707 while (i < qp_mutexeslen) 9708 { 9709 if ((qp_mutexes[i].prmask & mask) != 0) 9710 { 9711 /* If it destroys and creates the same mutex, do nothing. */ 9712 if (qp_mutexes[i].prmask == mask 9713 && qp_mutexes[i].path == md.path) 9714 { 9715 i++; 9716 add = -1; 9717 } 9718 else 9719 { 9720 int keep = 0; 9721 9722 if (md.debug_dv) 9723 { 9724 fprintf (stderr, " Clearing mutex relation"); 9725 print_prmask (qp_mutexes[i].prmask); 9726 fprintf (stderr, "\n"); 9727 } 9728 9729 /* Deal with the old mutex with more than 3+ PRs only if 9730 the new mutex on the same execution path with it. 9731 9732 FIXME: The 3+ mutex support is incomplete. 9733 dot_pred_rel () may be a better place to fix it. */ 9734 if (qp_mutexes[i].path == md.path) 9735 { 9736 /* If it is a proper subset of the mutex, create a 9737 new mutex. */ 9738 if (add == 0 9739 && (qp_mutexes[i].prmask & mask) == mask) 9740 add = 1; 9741 9742 qp_mutexes[i].prmask &= ~mask; 9743 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1)) 9744 { 9745 /* Modify the mutex if there are more than one 9746 PR left. */ 9747 keep = 1; 9748 i++; 9749 } 9750 } 9751 9752 if (keep == 0) 9753 /* Remove the mutex. */ 9754 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; 9755 } 9756 } 9757 else 9758 ++i; 9759 } 9760 9761 if (add == 1) 9762 add_qp_mutex (mask); 9763 9764 return add; 9765} 9766 9767/* Remove any mutexes which contain any of the PRs indicated in the mask. 9768 9769 Any changes to a PR clears the mutex relations which include that PR. */ 9770 9771static void 9772clear_qp_mutex (mask) 9773 valueT mask; 9774{ 9775 int i; 9776 9777 i = 0; 9778 while (i < qp_mutexeslen) 9779 { 9780 if ((qp_mutexes[i].prmask & mask) != 0) 9781 { 9782 if (md.debug_dv) 9783 { 9784 fprintf (stderr, " Clearing mutex relation"); 9785 print_prmask (qp_mutexes[i].prmask); 9786 fprintf (stderr, "\n"); 9787 } 9788 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen]; 9789 } 9790 else 9791 ++i; 9792 } 9793} 9794 9795/* Clear implies relations which contain PRs in the given masks. 9796 P1_MASK indicates the source of the implies relation, while P2_MASK 9797 indicates the implied PR. */ 9798 9799static void 9800clear_qp_implies (p1_mask, p2_mask) 9801 valueT p1_mask; 9802 valueT p2_mask; 9803{ 9804 int i; 9805 9806 i = 0; 9807 while (i < qp_implieslen) 9808 { 9809 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0 9810 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0) 9811 { 9812 if (md.debug_dv) 9813 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n", 9814 qp_implies[i].p1, qp_implies[i].p2); 9815 qp_implies[i] = qp_implies[--qp_implieslen]; 9816 } 9817 else 9818 ++i; 9819 } 9820} 9821 9822/* Add the PRs specified to the list of implied relations. */ 9823 9824static void 9825add_qp_imply (p1, p2) 9826 int p1, p2; 9827{ 9828 valueT mask; 9829 valueT bit; 9830 int i; 9831 9832 /* p0 is not meaningful here. */ 9833 if (p1 == 0 || p2 == 0) 9834 abort (); 9835 9836 if (p1 == p2) 9837 return; 9838 9839 /* If it exists already, ignore it. */ 9840 for (i = 0; i < qp_implieslen; i++) 9841 { 9842 if (qp_implies[i].p1 == p1 9843 && qp_implies[i].p2 == p2 9844 && qp_implies[i].path == md.path 9845 && !qp_implies[i].p2_branched) 9846 return; 9847 } 9848 9849 if (qp_implieslen == qp_impliestotlen) 9850 { 9851 qp_impliestotlen += 20; 9852 qp_implies = (struct qp_imply *) 9853 xrealloc ((void *) qp_implies, 9854 qp_impliestotlen * sizeof (struct qp_imply)); 9855 } 9856 if (md.debug_dv) 9857 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2); 9858 qp_implies[qp_implieslen].p1 = p1; 9859 qp_implies[qp_implieslen].p2 = p2; 9860 qp_implies[qp_implieslen].path = md.path; 9861 qp_implies[qp_implieslen++].p2_branched = 0; 9862 9863 /* Add in the implied transitive relations; for everything that p2 implies, 9864 make p1 imply that, too; for everything that implies p1, make it imply p2 9865 as well. */ 9866 for (i = 0; i < qp_implieslen; i++) 9867 { 9868 if (qp_implies[i].p1 == p2) 9869 add_qp_imply (p1, qp_implies[i].p2); 9870 if (qp_implies[i].p2 == p1) 9871 add_qp_imply (qp_implies[i].p1, p2); 9872 } 9873 /* Add in mutex relations implied by this implies relation; for each mutex 9874 relation containing p2, duplicate it and replace p2 with p1. */ 9875 bit = (valueT) 1 << p1; 9876 mask = (valueT) 1 << p2; 9877 for (i = 0; i < qp_mutexeslen; i++) 9878 { 9879 if (qp_mutexes[i].prmask & mask) 9880 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit); 9881 } 9882} 9883 9884/* Add the PRs specified in the mask to the mutex list; this means that only 9885 one of the PRs can be true at any time. PR0 should never be included in 9886 the mask. */ 9887 9888static void 9889add_qp_mutex (mask) 9890 valueT mask; 9891{ 9892 if (mask & 0x1) 9893 abort (); 9894 9895 if (qp_mutexeslen == qp_mutexestotlen) 9896 { 9897 qp_mutexestotlen += 20; 9898 qp_mutexes = (struct qpmutex *) 9899 xrealloc ((void *) qp_mutexes, 9900 qp_mutexestotlen * sizeof (struct qpmutex)); 9901 } 9902 if (md.debug_dv) 9903 { 9904 fprintf (stderr, " Registering mutex on"); 9905 print_prmask (mask); 9906 fprintf (stderr, "\n"); 9907 } 9908 qp_mutexes[qp_mutexeslen].path = md.path; 9909 qp_mutexes[qp_mutexeslen++].prmask = mask; 9910} 9911 9912static int 9913has_suffix_p (name, suffix) 9914 const char *name; 9915 const char *suffix; 9916{ 9917 size_t namelen = strlen (name); 9918 size_t sufflen = strlen (suffix); 9919 9920 if (namelen <= sufflen) 9921 return 0; 9922 return strcmp (name + namelen - sufflen, suffix) == 0; 9923} 9924 9925static void 9926clear_register_values () 9927{ 9928 int i; 9929 if (md.debug_dv) 9930 fprintf (stderr, " Clearing register values\n"); 9931 for (i = 1; i < NELEMS (gr_values); i++) 9932 gr_values[i].known = 0; 9933} 9934 9935/* Keep track of register values/changes which affect DV tracking. 9936 9937 optimization note: should add a flag to classes of insns where otherwise we 9938 have to examine a group of strings to identify them. */ 9939 9940static void 9941note_register_values (idesc) 9942 struct ia64_opcode *idesc; 9943{ 9944 valueT qp_changemask = 0; 9945 int i; 9946 9947 /* Invalidate values for registers being written to. */ 9948 for (i = 0; i < idesc->num_outputs; i++) 9949 { 9950 if (idesc->operands[i] == IA64_OPND_R1 9951 || idesc->operands[i] == IA64_OPND_R2 9952 || idesc->operands[i] == IA64_OPND_R3) 9953 { 9954 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; 9955 if (regno > 0 && regno < NELEMS (gr_values)) 9956 gr_values[regno].known = 0; 9957 } 9958 else if (idesc->operands[i] == IA64_OPND_R3_2) 9959 { 9960 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR; 9961 if (regno > 0 && regno < 4) 9962 gr_values[regno].known = 0; 9963 } 9964 else if (idesc->operands[i] == IA64_OPND_P1 9965 || idesc->operands[i] == IA64_OPND_P2) 9966 { 9967 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P; 9968 qp_changemask |= (valueT) 1 << regno; 9969 } 9970 else if (idesc->operands[i] == IA64_OPND_PR) 9971 { 9972 if (idesc->operands[2] & (valueT) 0x10000) 9973 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2]; 9974 else 9975 qp_changemask = idesc->operands[2]; 9976 break; 9977 } 9978 else if (idesc->operands[i] == IA64_OPND_PR_ROT) 9979 { 9980 if (idesc->operands[1] & ((valueT) 1 << 43)) 9981 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1]; 9982 else 9983 qp_changemask = idesc->operands[1]; 9984 qp_changemask &= ~(valueT) 0xFFFF; 9985 break; 9986 } 9987 } 9988 9989 /* Always clear qp branch flags on any PR change. */ 9990 /* FIXME there may be exceptions for certain compares. */ 9991 clear_qp_branch_flag (qp_changemask); 9992 9993 /* Invalidate rotating registers on insns which affect RRBs in CFM. */ 9994 if (idesc->flags & IA64_OPCODE_MOD_RRBS) 9995 { 9996 qp_changemask |= ~(valueT) 0xFFFF; 9997 if (strcmp (idesc->name, "clrrrb.pr") != 0) 9998 { 9999 for (i = 32; i < 32 + md.rot.num_regs; i++) 10000 gr_values[i].known = 0; 10001 } 10002 clear_qp_mutex (qp_changemask); 10003 clear_qp_implies (qp_changemask, qp_changemask); 10004 } 10005 /* After a call, all register values are undefined, except those marked 10006 as "safe". */ 10007 else if (strncmp (idesc->name, "br.call", 6) == 0 10008 || strncmp (idesc->name, "brl.call", 7) == 0) 10009 { 10010 /* FIXME keep GR values which are marked as "safe_across_calls" */ 10011 clear_register_values (); 10012 clear_qp_mutex (~qp_safe_across_calls); 10013 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls); 10014 clear_qp_branch_flag (~qp_safe_across_calls); 10015 } 10016 else if (is_interruption_or_rfi (idesc) 10017 || is_taken_branch (idesc)) 10018 { 10019 clear_register_values (); 10020 clear_qp_mutex (~(valueT) 0); 10021 clear_qp_implies (~(valueT) 0, ~(valueT) 0); 10022 } 10023 /* Look for mutex and implies relations. */ 10024 else if ((idesc->operands[0] == IA64_OPND_P1 10025 || idesc->operands[0] == IA64_OPND_P2) 10026 && (idesc->operands[1] == IA64_OPND_P1 10027 || idesc->operands[1] == IA64_OPND_P2)) 10028 { 10029 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P; 10030 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P; 10031 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0; 10032 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0; 10033 10034 /* If both PRs are PR0, we can't really do anything. */ 10035 if (p1 == 0 && p2 == 0) 10036 { 10037 if (md.debug_dv) 10038 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n"); 10039 } 10040 /* In general, clear mutexes and implies which include P1 or P2, 10041 with the following exceptions. */ 10042 else if (has_suffix_p (idesc->name, ".or.andcm") 10043 || has_suffix_p (idesc->name, ".and.orcm")) 10044 { 10045 clear_qp_implies (p2mask, p1mask); 10046 } 10047 else if (has_suffix_p (idesc->name, ".andcm") 10048 || has_suffix_p (idesc->name, ".and")) 10049 { 10050 clear_qp_implies (0, p1mask | p2mask); 10051 } 10052 else if (has_suffix_p (idesc->name, ".orcm") 10053 || has_suffix_p (idesc->name, ".or")) 10054 { 10055 clear_qp_mutex (p1mask | p2mask); 10056 clear_qp_implies (p1mask | p2mask, 0); 10057 } 10058 else 10059 { 10060 int added = 0; 10061 10062 clear_qp_implies (p1mask | p2mask, p1mask | p2mask); 10063 10064 /* If one of the PRs is PR0, we call clear_qp_mutex. */ 10065 if (p1 == 0 || p2 == 0) 10066 clear_qp_mutex (p1mask | p2mask); 10067 else 10068 added = update_qp_mutex (p1mask | p2mask); 10069 10070 if (CURR_SLOT.qp_regno == 0 10071 || has_suffix_p (idesc->name, ".unc")) 10072 { 10073 if (added == 0 && p1 && p2) 10074 add_qp_mutex (p1mask | p2mask); 10075 if (CURR_SLOT.qp_regno != 0) 10076 { 10077 if (p1) 10078 add_qp_imply (p1, CURR_SLOT.qp_regno); 10079 if (p2) 10080 add_qp_imply (p2, CURR_SLOT.qp_regno); 10081 } 10082 } 10083 } 10084 } 10085 /* Look for mov imm insns into GRs. */ 10086 else if (idesc->operands[0] == IA64_OPND_R1 10087 && (idesc->operands[1] == IA64_OPND_IMM22 10088 || idesc->operands[1] == IA64_OPND_IMMU64) 10089 && CURR_SLOT.opnd[1].X_op == O_constant 10090 && (strcmp (idesc->name, "mov") == 0 10091 || strcmp (idesc->name, "movl") == 0)) 10092 { 10093 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; 10094 if (regno > 0 && regno < NELEMS (gr_values)) 10095 { 10096 gr_values[regno].known = 1; 10097 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number; 10098 gr_values[regno].path = md.path; 10099 if (md.debug_dv) 10100 { 10101 fprintf (stderr, " Know gr%d = ", regno); 10102 fprintf_vma (stderr, gr_values[regno].value); 10103 fputs ("\n", stderr); 10104 } 10105 } 10106 } 10107 /* Look for dep.z imm insns. */ 10108 else if (idesc->operands[0] == IA64_OPND_R1 10109 && idesc->operands[1] == IA64_OPND_IMM8 10110 && strcmp (idesc->name, "dep.z") == 0) 10111 { 10112 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR; 10113 if (regno > 0 && regno < NELEMS (gr_values)) 10114 { 10115 valueT value = CURR_SLOT.opnd[1].X_add_number; 10116 10117 if (CURR_SLOT.opnd[3].X_add_number < 64) 10118 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1; 10119 value <<= CURR_SLOT.opnd[2].X_add_number; 10120 gr_values[regno].known = 1; 10121 gr_values[regno].value = value; 10122 gr_values[regno].path = md.path; 10123 if (md.debug_dv) 10124 { 10125 fprintf (stderr, " Know gr%d = ", regno); 10126 fprintf_vma (stderr, gr_values[regno].value); 10127 fputs ("\n", stderr); 10128 } 10129 } 10130 } 10131 else 10132 { 10133 clear_qp_mutex (qp_changemask); 10134 clear_qp_implies (qp_changemask, qp_changemask); 10135 } 10136} 10137 10138/* Return whether the given predicate registers are currently mutex. */ 10139 10140static int 10141qp_mutex (p1, p2, path) 10142 int p1; 10143 int p2; 10144 int path; 10145{ 10146 int i; 10147 valueT mask; 10148 10149 if (p1 != p2) 10150 { 10151 mask = ((valueT) 1 << p1) | (valueT) 1 << p2; 10152 for (i = 0; i < qp_mutexeslen; i++) 10153 { 10154 if (qp_mutexes[i].path >= path 10155 && (qp_mutexes[i].prmask & mask) == mask) 10156 return 1; 10157 } 10158 } 10159 return 0; 10160} 10161 10162/* Return whether the given resource is in the given insn's list of chks 10163 Return 1 if the conflict is absolutely determined, 2 if it's a potential 10164 conflict. */ 10165 10166static int 10167resources_match (rs, idesc, note, qp_regno, path) 10168 struct rsrc *rs; 10169 struct ia64_opcode *idesc; 10170 int note; 10171 int qp_regno; 10172 int path; 10173{ 10174 struct rsrc specs[MAX_SPECS]; 10175 int count; 10176 10177 /* If the marked resource's qp_regno and the given qp_regno are mutex, 10178 we don't need to check. One exception is note 11, which indicates that 10179 target predicates are written regardless of PR[qp]. */ 10180 if (qp_mutex (rs->qp_regno, qp_regno, path) 10181 && note != 11) 10182 return 0; 10183 10184 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path); 10185 while (count-- > 0) 10186 { 10187 /* UNAT checking is a bit more specific than other resources */ 10188 if (rs->dependency->specifier == IA64_RS_AR_UNAT 10189 && specs[count].mem_offset.hint 10190 && rs->mem_offset.hint) 10191 { 10192 if (rs->mem_offset.base == specs[count].mem_offset.base) 10193 { 10194 if (((rs->mem_offset.offset >> 3) & 0x3F) == 10195 ((specs[count].mem_offset.offset >> 3) & 0x3F)) 10196 return 1; 10197 else 10198 continue; 10199 } 10200 } 10201 10202 /* Skip apparent PR write conflicts where both writes are an AND or both 10203 writes are an OR. */ 10204 if (rs->dependency->specifier == IA64_RS_PR 10205 || rs->dependency->specifier == IA64_RS_PRr 10206 || rs->dependency->specifier == IA64_RS_PR63) 10207 { 10208 if (specs[count].cmp_type != CMP_NONE 10209 && specs[count].cmp_type == rs->cmp_type) 10210 { 10211 if (md.debug_dv) 10212 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n", 10213 dv_mode[rs->dependency->mode], 10214 rs->dependency->specifier != IA64_RS_PR63 ? 10215 specs[count].index : 63); 10216 continue; 10217 } 10218 if (md.debug_dv) 10219 fprintf (stderr, 10220 " %s on parallel compare conflict %s vs %s on PR%d\n", 10221 dv_mode[rs->dependency->mode], 10222 dv_cmp_type[rs->cmp_type], 10223 dv_cmp_type[specs[count].cmp_type], 10224 rs->dependency->specifier != IA64_RS_PR63 ? 10225 specs[count].index : 63); 10226 10227 } 10228 10229 /* If either resource is not specific, conservatively assume a conflict 10230 */ 10231 if (!specs[count].specific || !rs->specific) 10232 return 2; 10233 else if (specs[count].index == rs->index) 10234 return 1; 10235 } 10236 10237 return 0; 10238} 10239 10240/* Indicate an instruction group break; if INSERT_STOP is non-zero, then 10241 insert a stop to create the break. Update all resource dependencies 10242 appropriately. If QP_REGNO is non-zero, only apply the break to resources 10243 which use the same QP_REGNO and have the link_to_qp_branch flag set. 10244 If SAVE_CURRENT is non-zero, don't affect resources marked by the current 10245 instruction. */ 10246 10247static void 10248insn_group_break (insert_stop, qp_regno, save_current) 10249 int insert_stop; 10250 int qp_regno; 10251 int save_current; 10252{ 10253 int i; 10254 10255 if (insert_stop && md.num_slots_in_use > 0) 10256 PREV_SLOT.end_of_insn_group = 1; 10257 10258 if (md.debug_dv) 10259 { 10260 fprintf (stderr, " Insn group break%s", 10261 (insert_stop ? " (w/stop)" : "")); 10262 if (qp_regno != 0) 10263 fprintf (stderr, " effective for QP=%d", qp_regno); 10264 fprintf (stderr, "\n"); 10265 } 10266 10267 i = 0; 10268 while (i < regdepslen) 10269 { 10270 const struct ia64_dependency *dep = regdeps[i].dependency; 10271 10272 if (qp_regno != 0 10273 && regdeps[i].qp_regno != qp_regno) 10274 { 10275 ++i; 10276 continue; 10277 } 10278 10279 if (save_current 10280 && CURR_SLOT.src_file == regdeps[i].file 10281 && CURR_SLOT.src_line == regdeps[i].line) 10282 { 10283 ++i; 10284 continue; 10285 } 10286 10287 /* clear dependencies which are automatically cleared by a stop, or 10288 those that have reached the appropriate state of insn serialization */ 10289 if (dep->semantics == IA64_DVS_IMPLIED 10290 || dep->semantics == IA64_DVS_IMPLIEDF 10291 || regdeps[i].insn_srlz == STATE_SRLZ) 10292 { 10293 print_dependency ("Removing", i); 10294 regdeps[i] = regdeps[--regdepslen]; 10295 } 10296 else 10297 { 10298 if (dep->semantics == IA64_DVS_DATA 10299 || dep->semantics == IA64_DVS_INSTR 10300 || dep->semantics == IA64_DVS_SPECIFIC) 10301 { 10302 if (regdeps[i].insn_srlz == STATE_NONE) 10303 regdeps[i].insn_srlz = STATE_STOP; 10304 if (regdeps[i].data_srlz == STATE_NONE) 10305 regdeps[i].data_srlz = STATE_STOP; 10306 } 10307 ++i; 10308 } 10309 } 10310} 10311 10312/* Add the given resource usage spec to the list of active dependencies. */ 10313 10314static void 10315mark_resource (idesc, dep, spec, depind, path) 10316 struct ia64_opcode *idesc ATTRIBUTE_UNUSED; 10317 const struct ia64_dependency *dep ATTRIBUTE_UNUSED; 10318 struct rsrc *spec; 10319 int depind; 10320 int path; 10321{ 10322 if (regdepslen == regdepstotlen) 10323 { 10324 regdepstotlen += 20; 10325 regdeps = (struct rsrc *) 10326 xrealloc ((void *) regdeps, 10327 regdepstotlen * sizeof (struct rsrc)); 10328 } 10329 10330 regdeps[regdepslen] = *spec; 10331 regdeps[regdepslen].depind = depind; 10332 regdeps[regdepslen].path = path; 10333 regdeps[regdepslen].file = CURR_SLOT.src_file; 10334 regdeps[regdepslen].line = CURR_SLOT.src_line; 10335 10336 print_dependency ("Adding", regdepslen); 10337 10338 ++regdepslen; 10339} 10340 10341static void 10342print_dependency (action, depind) 10343 const char *action; 10344 int depind; 10345{ 10346 if (md.debug_dv) 10347 { 10348 fprintf (stderr, " %s %s '%s'", 10349 action, dv_mode[(regdeps[depind].dependency)->mode], 10350 (regdeps[depind].dependency)->name); 10351 if (regdeps[depind].specific && regdeps[depind].index >= 0) 10352 fprintf (stderr, " (%d)", regdeps[depind].index); 10353 if (regdeps[depind].mem_offset.hint) 10354 { 10355 fputs (" ", stderr); 10356 fprintf_vma (stderr, regdeps[depind].mem_offset.base); 10357 fputs ("+", stderr); 10358 fprintf_vma (stderr, regdeps[depind].mem_offset.offset); 10359 } 10360 fprintf (stderr, "\n"); 10361 } 10362} 10363 10364static void 10365instruction_serialization () 10366{ 10367 int i; 10368 if (md.debug_dv) 10369 fprintf (stderr, " Instruction serialization\n"); 10370 for (i = 0; i < regdepslen; i++) 10371 if (regdeps[i].insn_srlz == STATE_STOP) 10372 regdeps[i].insn_srlz = STATE_SRLZ; 10373} 10374 10375static void 10376data_serialization () 10377{ 10378 int i = 0; 10379 if (md.debug_dv) 10380 fprintf (stderr, " Data serialization\n"); 10381 while (i < regdepslen) 10382 { 10383 if (regdeps[i].data_srlz == STATE_STOP 10384 /* Note: as of 991210, all "other" dependencies are cleared by a 10385 data serialization. This might change with new tables */ 10386 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER) 10387 { 10388 print_dependency ("Removing", i); 10389 regdeps[i] = regdeps[--regdepslen]; 10390 } 10391 else 10392 ++i; 10393 } 10394} 10395 10396/* Insert stops and serializations as needed to avoid DVs. */ 10397 10398static void 10399remove_marked_resource (rs) 10400 struct rsrc *rs; 10401{ 10402 switch (rs->dependency->semantics) 10403 { 10404 case IA64_DVS_SPECIFIC: 10405 if (md.debug_dv) 10406 fprintf (stderr, "Implementation-specific, assume worst case...\n"); 10407 /* ...fall through... */ 10408 case IA64_DVS_INSTR: 10409 if (md.debug_dv) 10410 fprintf (stderr, "Inserting instr serialization\n"); 10411 if (rs->insn_srlz < STATE_STOP) 10412 insn_group_break (1, 0, 0); 10413 if (rs->insn_srlz < STATE_SRLZ) 10414 { 10415 struct slot oldslot = CURR_SLOT; 10416 /* Manually jam a srlz.i insn into the stream */ 10417 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); 10418 CURR_SLOT.user_template = -1; 10419 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i"); 10420 instruction_serialization (); 10421 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; 10422 if (++md.num_slots_in_use >= NUM_SLOTS) 10423 emit_one_bundle (); 10424 CURR_SLOT = oldslot; 10425 } 10426 insn_group_break (1, 0, 0); 10427 break; 10428 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all 10429 "other" types of DV are eliminated 10430 by a data serialization */ 10431 case IA64_DVS_DATA: 10432 if (md.debug_dv) 10433 fprintf (stderr, "Inserting data serialization\n"); 10434 if (rs->data_srlz < STATE_STOP) 10435 insn_group_break (1, 0, 0); 10436 { 10437 struct slot oldslot = CURR_SLOT; 10438 /* Manually jam a srlz.d insn into the stream */ 10439 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT)); 10440 CURR_SLOT.user_template = -1; 10441 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d"); 10442 data_serialization (); 10443 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; 10444 if (++md.num_slots_in_use >= NUM_SLOTS) 10445 emit_one_bundle (); 10446 CURR_SLOT = oldslot; 10447 } 10448 break; 10449 case IA64_DVS_IMPLIED: 10450 case IA64_DVS_IMPLIEDF: 10451 if (md.debug_dv) 10452 fprintf (stderr, "Inserting stop\n"); 10453 insn_group_break (1, 0, 0); 10454 break; 10455 default: 10456 break; 10457 } 10458} 10459 10460/* Check the resources used by the given opcode against the current dependency 10461 list. 10462 10463 The check is run once for each execution path encountered. In this case, 10464 a unique execution path is the sequence of instructions following a code 10465 entry point, e.g. the following has three execution paths, one starting 10466 at L0, one at L1, and one at L2. 10467 10468 L0: nop 10469 L1: add 10470 L2: add 10471 br.ret 10472*/ 10473 10474static void 10475check_dependencies (idesc) 10476 struct ia64_opcode *idesc; 10477{ 10478 const struct ia64_opcode_dependency *opdeps = idesc->dependencies; 10479 int path; 10480 int i; 10481 10482 /* Note that the number of marked resources may change within the 10483 loop if in auto mode. */ 10484 i = 0; 10485 while (i < regdepslen) 10486 { 10487 struct rsrc *rs = ®deps[i]; 10488 const struct ia64_dependency *dep = rs->dependency; 10489 int chkind; 10490 int note; 10491 int start_over = 0; 10492 10493 if (dep->semantics == IA64_DVS_NONE 10494 || (chkind = depends_on (rs->depind, idesc)) == -1) 10495 { 10496 ++i; 10497 continue; 10498 } 10499 10500 note = NOTE (opdeps->chks[chkind]); 10501 10502 /* Check this resource against each execution path seen thus far. */ 10503 for (path = 0; path <= md.path; path++) 10504 { 10505 int matchtype; 10506 10507 /* If the dependency wasn't on the path being checked, ignore it. */ 10508 if (rs->path < path) 10509 continue; 10510 10511 /* If the QP for this insn implies a QP which has branched, don't 10512 bother checking. Ed. NOTE: I don't think this check is terribly 10513 useful; what's the point of generating code which will only be 10514 reached if its QP is zero? 10515 This code was specifically inserted to handle the following code, 10516 based on notes from Intel's DV checking code, where p1 implies p2. 10517 10518 mov r4 = 2 10519 (p2) br.cond L 10520 (p1) mov r4 = 7 10521 */ 10522 if (CURR_SLOT.qp_regno != 0) 10523 { 10524 int skip = 0; 10525 int implies; 10526 for (implies = 0; implies < qp_implieslen; implies++) 10527 { 10528 if (qp_implies[implies].path >= path 10529 && qp_implies[implies].p1 == CURR_SLOT.qp_regno 10530 && qp_implies[implies].p2_branched) 10531 { 10532 skip = 1; 10533 break; 10534 } 10535 } 10536 if (skip) 10537 continue; 10538 } 10539 10540 if ((matchtype = resources_match (rs, idesc, note, 10541 CURR_SLOT.qp_regno, path)) != 0) 10542 { 10543 char msg[1024]; 10544 char pathmsg[256] = ""; 10545 char indexmsg[256] = ""; 10546 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0); 10547 10548 if (path != 0) 10549 snprintf (pathmsg, sizeof (pathmsg), 10550 " when entry is at label '%s'", 10551 md.entry_labels[path - 1]); 10552 if (matchtype == 1 && rs->index >= 0) 10553 snprintf (indexmsg, sizeof (indexmsg), 10554 ", specific resource number is %d", 10555 rs->index); 10556 snprintf (msg, sizeof (msg), 10557 "Use of '%s' %s %s dependency '%s' (%s)%s%s", 10558 idesc->name, 10559 (certain ? "violates" : "may violate"), 10560 dv_mode[dep->mode], dep->name, 10561 dv_sem[dep->semantics], 10562 pathmsg, indexmsg); 10563 10564 if (md.explicit_mode) 10565 { 10566 as_warn ("%s", msg); 10567 if (path < md.path) 10568 as_warn (_("Only the first path encountering the conflict " 10569 "is reported")); 10570 as_warn_where (rs->file, rs->line, 10571 _("This is the location of the " 10572 "conflicting usage")); 10573 /* Don't bother checking other paths, to avoid duplicating 10574 the same warning */ 10575 break; 10576 } 10577 else 10578 { 10579 if (md.debug_dv) 10580 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line); 10581 10582 remove_marked_resource (rs); 10583 10584 /* since the set of dependencies has changed, start over */ 10585 /* FIXME -- since we're removing dvs as we go, we 10586 probably don't really need to start over... */ 10587 start_over = 1; 10588 break; 10589 } 10590 } 10591 } 10592 if (start_over) 10593 i = 0; 10594 else 10595 ++i; 10596 } 10597} 10598 10599/* Register new dependencies based on the given opcode. */ 10600 10601static void 10602mark_resources (idesc) 10603 struct ia64_opcode *idesc; 10604{ 10605 int i; 10606 const struct ia64_opcode_dependency *opdeps = idesc->dependencies; 10607 int add_only_qp_reads = 0; 10608 10609 /* A conditional branch only uses its resources if it is taken; if it is 10610 taken, we stop following that path. The other branch types effectively 10611 *always* write their resources. If it's not taken, register only QP 10612 reads. */ 10613 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc)) 10614 { 10615 add_only_qp_reads = 1; 10616 } 10617 10618 if (md.debug_dv) 10619 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name); 10620 10621 for (i = 0; i < opdeps->nregs; i++) 10622 { 10623 const struct ia64_dependency *dep; 10624 struct rsrc specs[MAX_SPECS]; 10625 int note; 10626 int path; 10627 int count; 10628 10629 dep = ia64_find_dependency (opdeps->regs[i]); 10630 note = NOTE (opdeps->regs[i]); 10631 10632 if (add_only_qp_reads 10633 && !(dep->mode == IA64_DV_WAR 10634 && (dep->specifier == IA64_RS_PR 10635 || dep->specifier == IA64_RS_PRr 10636 || dep->specifier == IA64_RS_PR63))) 10637 continue; 10638 10639 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path); 10640 10641 while (count-- > 0) 10642 { 10643 mark_resource (idesc, dep, &specs[count], 10644 DEP (opdeps->regs[i]), md.path); 10645 } 10646 10647 /* The execution path may affect register values, which may in turn 10648 affect which indirect-access resources are accessed. */ 10649 switch (dep->specifier) 10650 { 10651 default: 10652 break; 10653 case IA64_RS_CPUID: 10654 case IA64_RS_DBR: 10655 case IA64_RS_IBR: 10656 case IA64_RS_MSR: 10657 case IA64_RS_PKR: 10658 case IA64_RS_PMC: 10659 case IA64_RS_PMD: 10660 case IA64_RS_RR: 10661 for (path = 0; path < md.path; path++) 10662 { 10663 count = specify_resource (dep, idesc, DV_REG, specs, note, path); 10664 while (count-- > 0) 10665 mark_resource (idesc, dep, &specs[count], 10666 DEP (opdeps->regs[i]), path); 10667 } 10668 break; 10669 } 10670 } 10671} 10672 10673/* Remove dependencies when they no longer apply. */ 10674 10675static void 10676update_dependencies (idesc) 10677 struct ia64_opcode *idesc; 10678{ 10679 int i; 10680 10681 if (strcmp (idesc->name, "srlz.i") == 0) 10682 { 10683 instruction_serialization (); 10684 } 10685 else if (strcmp (idesc->name, "srlz.d") == 0) 10686 { 10687 data_serialization (); 10688 } 10689 else if (is_interruption_or_rfi (idesc) 10690 || is_taken_branch (idesc)) 10691 { 10692 /* Although technically the taken branch doesn't clear dependencies 10693 which require a srlz.[id], we don't follow the branch; the next 10694 instruction is assumed to start with a clean slate. */ 10695 regdepslen = 0; 10696 md.path = 0; 10697 } 10698 else if (is_conditional_branch (idesc) 10699 && CURR_SLOT.qp_regno != 0) 10700 { 10701 int is_call = strstr (idesc->name, ".call") != NULL; 10702 10703 for (i = 0; i < qp_implieslen; i++) 10704 { 10705 /* If the conditional branch's predicate is implied by the predicate 10706 in an existing dependency, remove that dependency. */ 10707 if (qp_implies[i].p2 == CURR_SLOT.qp_regno) 10708 { 10709 int depind = 0; 10710 /* Note that this implied predicate takes a branch so that if 10711 a later insn generates a DV but its predicate implies this 10712 one, we can avoid the false DV warning. */ 10713 qp_implies[i].p2_branched = 1; 10714 while (depind < regdepslen) 10715 { 10716 if (regdeps[depind].qp_regno == qp_implies[i].p1) 10717 { 10718 print_dependency ("Removing", depind); 10719 regdeps[depind] = regdeps[--regdepslen]; 10720 } 10721 else 10722 ++depind; 10723 } 10724 } 10725 } 10726 /* Any marked resources which have this same predicate should be 10727 cleared, provided that the QP hasn't been modified between the 10728 marking instruction and the branch. */ 10729 if (is_call) 10730 { 10731 insn_group_break (0, CURR_SLOT.qp_regno, 1); 10732 } 10733 else 10734 { 10735 i = 0; 10736 while (i < regdepslen) 10737 { 10738 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno 10739 && regdeps[i].link_to_qp_branch 10740 && (regdeps[i].file != CURR_SLOT.src_file 10741 || regdeps[i].line != CURR_SLOT.src_line)) 10742 { 10743 /* Treat like a taken branch */ 10744 print_dependency ("Removing", i); 10745 regdeps[i] = regdeps[--regdepslen]; 10746 } 10747 else 10748 ++i; 10749 } 10750 } 10751 } 10752} 10753 10754/* Examine the current instruction for dependency violations. */ 10755 10756static int 10757check_dv (idesc) 10758 struct ia64_opcode *idesc; 10759{ 10760 if (md.debug_dv) 10761 { 10762 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n", 10763 idesc->name, CURR_SLOT.src_line, 10764 idesc->dependencies->nchks, 10765 idesc->dependencies->nregs); 10766 } 10767 10768 /* Look through the list of currently marked resources; if the current 10769 instruction has the dependency in its chks list which uses that resource, 10770 check against the specific resources used. */ 10771 check_dependencies (idesc); 10772 10773 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads), 10774 then add them to the list of marked resources. */ 10775 mark_resources (idesc); 10776 10777 /* There are several types of dependency semantics, and each has its own 10778 requirements for being cleared 10779 10780 Instruction serialization (insns separated by interruption, rfi, or 10781 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR. 10782 10783 Data serialization (instruction serialization, or writer + srlz.d + 10784 reader, where writer and srlz.d are in separate groups) clears 10785 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to 10786 always be the case). 10787 10788 Instruction group break (groups separated by stop, taken branch, 10789 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF. 10790 */ 10791 update_dependencies (idesc); 10792 10793 /* Sometimes, knowing a register value allows us to avoid giving a false DV 10794 warning. Keep track of as many as possible that are useful. */ 10795 note_register_values (idesc); 10796 10797 /* We don't need or want this anymore. */ 10798 md.mem_offset.hint = 0; 10799 10800 return 0; 10801} 10802 10803/* Translate one line of assembly. Pseudo ops and labels do not show 10804 here. */ 10805void 10806md_assemble (str) 10807 char *str; 10808{ 10809 char *saved_input_line_pointer, *mnemonic; 10810 const struct pseudo_opcode *pdesc; 10811 struct ia64_opcode *idesc; 10812 unsigned char qp_regno; 10813 unsigned int flags; 10814 int ch; 10815 10816 saved_input_line_pointer = input_line_pointer; 10817 input_line_pointer = str; 10818 10819 /* extract the opcode (mnemonic): */ 10820 10821 mnemonic = input_line_pointer; 10822 ch = get_symbol_end (); 10823 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic); 10824 if (pdesc) 10825 { 10826 *input_line_pointer = ch; 10827 (*pdesc->handler) (pdesc->arg); 10828 goto done; 10829 } 10830 10831 /* Find the instruction descriptor matching the arguments. */ 10832 10833 idesc = ia64_find_opcode (mnemonic); 10834 *input_line_pointer = ch; 10835 if (!idesc) 10836 { 10837 as_bad ("Unknown opcode `%s'", mnemonic); 10838 goto done; 10839 } 10840 10841 idesc = parse_operands (idesc); 10842 if (!idesc) 10843 goto done; 10844 10845 /* Handle the dynamic ops we can handle now: */ 10846 if (idesc->type == IA64_TYPE_DYN) 10847 { 10848 if (strcmp (idesc->name, "add") == 0) 10849 { 10850 if (CURR_SLOT.opnd[2].X_op == O_register 10851 && CURR_SLOT.opnd[2].X_add_number < 4) 10852 mnemonic = "addl"; 10853 else 10854 mnemonic = "adds"; 10855 ia64_free_opcode (idesc); 10856 idesc = ia64_find_opcode (mnemonic); 10857 } 10858 else if (strcmp (idesc->name, "mov") == 0) 10859 { 10860 enum ia64_opnd opnd1, opnd2; 10861 int rop; 10862 10863 opnd1 = idesc->operands[0]; 10864 opnd2 = idesc->operands[1]; 10865 if (opnd1 == IA64_OPND_AR3) 10866 rop = 0; 10867 else if (opnd2 == IA64_OPND_AR3) 10868 rop = 1; 10869 else 10870 abort (); 10871 if (CURR_SLOT.opnd[rop].X_op == O_register) 10872 { 10873 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) 10874 mnemonic = "mov.i"; 10875 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) 10876 mnemonic = "mov.m"; 10877 else 10878 rop = -1; 10879 } 10880 else 10881 abort (); 10882 if (rop >= 0) 10883 { 10884 ia64_free_opcode (idesc); 10885 idesc = ia64_find_opcode (mnemonic); 10886 while (idesc != NULL 10887 && (idesc->operands[0] != opnd1 10888 || idesc->operands[1] != opnd2)) 10889 idesc = get_next_opcode (idesc); 10890 } 10891 } 10892 } 10893 else if (strcmp (idesc->name, "mov.i") == 0 10894 || strcmp (idesc->name, "mov.m") == 0) 10895 { 10896 enum ia64_opnd opnd1, opnd2; 10897 int rop; 10898 10899 opnd1 = idesc->operands[0]; 10900 opnd2 = idesc->operands[1]; 10901 if (opnd1 == IA64_OPND_AR3) 10902 rop = 0; 10903 else if (opnd2 == IA64_OPND_AR3) 10904 rop = 1; 10905 else 10906 abort (); 10907 if (CURR_SLOT.opnd[rop].X_op == O_register) 10908 { 10909 char unit = 'a'; 10910 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number)) 10911 unit = 'i'; 10912 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number)) 10913 unit = 'm'; 10914 if (unit != 'a' && unit != idesc->name [4]) 10915 as_bad ("AR %d can only be accessed by %c-unit", 10916 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR), 10917 TOUPPER (unit)); 10918 } 10919 } 10920 else if (strcmp (idesc->name, "hint.b") == 0) 10921 { 10922 switch (md.hint_b) 10923 { 10924 case hint_b_ok: 10925 break; 10926 case hint_b_warning: 10927 as_warn ("hint.b may be treated as nop"); 10928 break; 10929 case hint_b_error: 10930 as_bad ("hint.b shouldn't be used"); 10931 break; 10932 } 10933 } 10934 10935 qp_regno = 0; 10936 if (md.qp.X_op == O_register) 10937 { 10938 qp_regno = md.qp.X_add_number - REG_P; 10939 md.qp.X_op = O_absent; 10940 } 10941 10942 flags = idesc->flags; 10943 10944 if ((flags & IA64_OPCODE_FIRST) != 0) 10945 { 10946 /* The alignment frag has to end with a stop bit only if the 10947 next instruction after the alignment directive has to be 10948 the first instruction in an instruction group. */ 10949 if (align_frag) 10950 { 10951 while (align_frag->fr_type != rs_align_code) 10952 { 10953 align_frag = align_frag->fr_next; 10954 if (!align_frag) 10955 break; 10956 } 10957 /* align_frag can be NULL if there are directives in 10958 between. */ 10959 if (align_frag && align_frag->fr_next == frag_now) 10960 align_frag->tc_frag_data = 1; 10961 } 10962 10963 insn_group_break (1, 0, 0); 10964 } 10965 align_frag = NULL; 10966 10967 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) 10968 { 10969 as_bad ("`%s' cannot be predicated", idesc->name); 10970 goto done; 10971 } 10972 10973 /* Build the instruction. */ 10974 CURR_SLOT.qp_regno = qp_regno; 10975 CURR_SLOT.idesc = idesc; 10976 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line); 10977 dwarf2_where (&CURR_SLOT.debug_line); 10978 10979 /* Add unwind entries, if there are any. */ 10980 if (unwind.current_entry) 10981 { 10982 CURR_SLOT.unwind_record = unwind.current_entry; 10983 unwind.current_entry = NULL; 10984 } 10985 if (unwind.pending_saves) 10986 { 10987 if (unwind.pending_saves->next) 10988 { 10989 /* Attach the next pending save to the next slot so that its 10990 slot number will get set correctly. */ 10991 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR); 10992 unwind.pending_saves = &unwind.pending_saves->next->r.record.p; 10993 } 10994 else 10995 unwind.pending_saves = NULL; 10996 } 10997 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym)) 10998 unwind.insn = 1; 10999 11000 /* Check for dependency violations. */ 11001 if (md.detect_dv) 11002 check_dv (idesc); 11003 11004 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS; 11005 if (++md.num_slots_in_use >= NUM_SLOTS) 11006 emit_one_bundle (); 11007 11008 if ((flags & IA64_OPCODE_LAST) != 0) 11009 insn_group_break (1, 0, 0); 11010 11011 md.last_text_seg = now_seg; 11012 11013 done: 11014 input_line_pointer = saved_input_line_pointer; 11015} 11016 11017/* Called when symbol NAME cannot be found in the symbol table. 11018 Should be used for dynamic valued symbols only. */ 11019 11020symbolS * 11021md_undefined_symbol (name) 11022 char *name ATTRIBUTE_UNUSED; 11023{ 11024 return 0; 11025} 11026 11027/* Called for any expression that can not be recognized. When the 11028 function is called, `input_line_pointer' will point to the start of 11029 the expression. */ 11030 11031void 11032md_operand (e) 11033 expressionS *e; 11034{ 11035 switch (*input_line_pointer) 11036 { 11037 case '[': 11038 ++input_line_pointer; 11039 expression_and_evaluate (e); 11040 if (*input_line_pointer != ']') 11041 { 11042 as_bad ("Closing bracket missing"); 11043 goto err; 11044 } 11045 else 11046 { 11047 if (e->X_op != O_register 11048 || e->X_add_number < REG_GR 11049 || e->X_add_number > REG_GR + 127) 11050 { 11051 as_bad ("Index must be a general register"); 11052 e->X_add_number = REG_GR; 11053 } 11054 11055 ++input_line_pointer; 11056 e->X_op = O_index; 11057 } 11058 break; 11059 11060 default: 11061 break; 11062 } 11063 return; 11064 11065 err: 11066 ignore_rest_of_line (); 11067} 11068 11069/* Return 1 if it's OK to adjust a reloc by replacing the symbol with 11070 a section symbol plus some offset. For relocs involving @fptr(), 11071 directives we don't want such adjustments since we need to have the 11072 original symbol's name in the reloc. */ 11073int 11074ia64_fix_adjustable (fix) 11075 fixS *fix; 11076{ 11077 /* Prevent all adjustments to global symbols */ 11078 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy)) 11079 return 0; 11080 11081 switch (fix->fx_r_type) 11082 { 11083 case BFD_RELOC_IA64_FPTR64I: 11084 case BFD_RELOC_IA64_FPTR32MSB: 11085 case BFD_RELOC_IA64_FPTR32LSB: 11086 case BFD_RELOC_IA64_FPTR64MSB: 11087 case BFD_RELOC_IA64_FPTR64LSB: 11088 case BFD_RELOC_IA64_LTOFF_FPTR22: 11089 case BFD_RELOC_IA64_LTOFF_FPTR64I: 11090 return 0; 11091 default: 11092 break; 11093 } 11094 11095 return 1; 11096} 11097 11098int 11099ia64_force_relocation (fix) 11100 fixS *fix; 11101{ 11102 switch (fix->fx_r_type) 11103 { 11104 case BFD_RELOC_IA64_FPTR64I: 11105 case BFD_RELOC_IA64_FPTR32MSB: 11106 case BFD_RELOC_IA64_FPTR32LSB: 11107 case BFD_RELOC_IA64_FPTR64MSB: 11108 case BFD_RELOC_IA64_FPTR64LSB: 11109 11110 case BFD_RELOC_IA64_LTOFF22: 11111 case BFD_RELOC_IA64_LTOFF64I: 11112 case BFD_RELOC_IA64_LTOFF_FPTR22: 11113 case BFD_RELOC_IA64_LTOFF_FPTR64I: 11114 case BFD_RELOC_IA64_PLTOFF22: 11115 case BFD_RELOC_IA64_PLTOFF64I: 11116 case BFD_RELOC_IA64_PLTOFF64MSB: 11117 case BFD_RELOC_IA64_PLTOFF64LSB: 11118 11119 case BFD_RELOC_IA64_LTOFF22X: 11120 case BFD_RELOC_IA64_LDXMOV: 11121 return 1; 11122 11123 default: 11124 break; 11125 } 11126 11127 return generic_force_reloc (fix); 11128} 11129 11130/* Decide from what point a pc-relative relocation is relative to, 11131 relative to the pc-relative fixup. Er, relatively speaking. */ 11132long 11133ia64_pcrel_from_section (fix, sec) 11134 fixS *fix; 11135 segT sec; 11136{ 11137 unsigned long off = fix->fx_frag->fr_address + fix->fx_where; 11138 11139 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE) 11140 off &= ~0xfUL; 11141 11142 return off; 11143} 11144 11145 11146/* Used to emit section-relative relocs for the dwarf2 debug data. */ 11147void 11148ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size) 11149{ 11150 expressionS expr; 11151 11152 expr.X_op = O_pseudo_fixup; 11153 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym; 11154 expr.X_add_number = 0; 11155 expr.X_add_symbol = symbol; 11156 emit_expr (&expr, size); 11157} 11158 11159/* This is called whenever some data item (not an instruction) needs a 11160 fixup. We pick the right reloc code depending on the byteorder 11161 currently in effect. */ 11162void 11163ia64_cons_fix_new (f, where, nbytes, exp) 11164 fragS *f; 11165 int where; 11166 int nbytes; 11167 expressionS *exp; 11168{ 11169 bfd_reloc_code_real_type code; 11170 fixS *fix; 11171 11172 switch (nbytes) 11173 { 11174 /* There are no reloc for 8 and 16 bit quantities, but we allow 11175 them here since they will work fine as long as the expression 11176 is fully defined at the end of the pass over the source file. */ 11177 case 1: code = BFD_RELOC_8; break; 11178 case 2: code = BFD_RELOC_16; break; 11179 case 4: 11180 if (target_big_endian) 11181 code = BFD_RELOC_IA64_DIR32MSB; 11182 else 11183 code = BFD_RELOC_IA64_DIR32LSB; 11184 break; 11185 11186 case 8: 11187 /* In 32-bit mode, data8 could mean function descriptors too. */ 11188 if (exp->X_op == O_pseudo_fixup 11189 && exp->X_op_symbol 11190 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC 11191 && !(md.flags & EF_IA_64_ABI64)) 11192 { 11193 if (target_big_endian) 11194 code = BFD_RELOC_IA64_IPLTMSB; 11195 else 11196 code = BFD_RELOC_IA64_IPLTLSB; 11197 exp->X_op = O_symbol; 11198 break; 11199 } 11200 else 11201 { 11202 if (target_big_endian) 11203 code = BFD_RELOC_IA64_DIR64MSB; 11204 else 11205 code = BFD_RELOC_IA64_DIR64LSB; 11206 break; 11207 } 11208 11209 case 16: 11210 if (exp->X_op == O_pseudo_fixup 11211 && exp->X_op_symbol 11212 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC) 11213 { 11214 if (target_big_endian) 11215 code = BFD_RELOC_IA64_IPLTMSB; 11216 else 11217 code = BFD_RELOC_IA64_IPLTLSB; 11218 exp->X_op = O_symbol; 11219 break; 11220 } 11221 /* FALLTHRU */ 11222 11223 default: 11224 as_bad ("Unsupported fixup size %d", nbytes); 11225 ignore_rest_of_line (); 11226 return; 11227 } 11228 11229 if (exp->X_op == O_pseudo_fixup) 11230 { 11231 exp->X_op = O_symbol; 11232 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code); 11233 /* ??? If code unchanged, unsupported. */ 11234 } 11235 11236 fix = fix_new_exp (f, where, nbytes, exp, 0, code); 11237 /* We need to store the byte order in effect in case we're going 11238 to fix an 8 or 16 bit relocation (for which there no real 11239 relocs available). See md_apply_fix(). */ 11240 fix->tc_fix_data.bigendian = target_big_endian; 11241} 11242 11243/* Return the actual relocation we wish to associate with the pseudo 11244 reloc described by SYM and R_TYPE. SYM should be one of the 11245 symbols in the pseudo_func array, or NULL. */ 11246 11247static bfd_reloc_code_real_type 11248ia64_gen_real_reloc_type (sym, r_type) 11249 struct symbol *sym; 11250 bfd_reloc_code_real_type r_type; 11251{ 11252 bfd_reloc_code_real_type new = 0; 11253 const char *type = NULL, *suffix = ""; 11254 11255 if (sym == NULL) 11256 { 11257 return r_type; 11258 } 11259 11260 switch (S_GET_VALUE (sym)) 11261 { 11262 case FUNC_FPTR_RELATIVE: 11263 switch (r_type) 11264 { 11265 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break; 11266 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break; 11267 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break; 11268 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break; 11269 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break; 11270 default: type = "FPTR"; break; 11271 } 11272 break; 11273 11274 case FUNC_GP_RELATIVE: 11275 switch (r_type) 11276 { 11277 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break; 11278 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break; 11279 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break; 11280 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break; 11281 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break; 11282 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break; 11283 default: type = "GPREL"; break; 11284 } 11285 break; 11286 11287 case FUNC_LT_RELATIVE: 11288 switch (r_type) 11289 { 11290 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break; 11291 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break; 11292 default: type = "LTOFF"; break; 11293 } 11294 break; 11295 11296 case FUNC_LT_RELATIVE_X: 11297 switch (r_type) 11298 { 11299 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break; 11300 default: type = "LTOFF"; suffix = "X"; break; 11301 } 11302 break; 11303 11304 case FUNC_PC_RELATIVE: 11305 switch (r_type) 11306 { 11307 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break; 11308 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break; 11309 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break; 11310 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break; 11311 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break; 11312 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break; 11313 default: type = "PCREL"; break; 11314 } 11315 break; 11316 11317 case FUNC_PLT_RELATIVE: 11318 switch (r_type) 11319 { 11320 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break; 11321 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break; 11322 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break; 11323 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break; 11324 default: type = "PLTOFF"; break; 11325 } 11326 break; 11327 11328 case FUNC_SEC_RELATIVE: 11329 switch (r_type) 11330 { 11331 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break; 11332 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break; 11333 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break; 11334 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break; 11335 default: type = "SECREL"; break; 11336 } 11337 break; 11338 11339 case FUNC_SEG_RELATIVE: 11340 switch (r_type) 11341 { 11342 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break; 11343 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break; 11344 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break; 11345 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break; 11346 default: type = "SEGREL"; break; 11347 } 11348 break; 11349 11350 case FUNC_LTV_RELATIVE: 11351 switch (r_type) 11352 { 11353 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break; 11354 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break; 11355 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break; 11356 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break; 11357 default: type = "LTV"; break; 11358 } 11359 break; 11360 11361 case FUNC_LT_FPTR_RELATIVE: 11362 switch (r_type) 11363 { 11364 case BFD_RELOC_IA64_IMM22: 11365 new = BFD_RELOC_IA64_LTOFF_FPTR22; break; 11366 case BFD_RELOC_IA64_IMM64: 11367 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break; 11368 case BFD_RELOC_IA64_DIR32MSB: 11369 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break; 11370 case BFD_RELOC_IA64_DIR32LSB: 11371 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break; 11372 case BFD_RELOC_IA64_DIR64MSB: 11373 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break; 11374 case BFD_RELOC_IA64_DIR64LSB: 11375 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break; 11376 default: 11377 type = "LTOFF_FPTR"; break; 11378 } 11379 break; 11380 11381 case FUNC_TP_RELATIVE: 11382 switch (r_type) 11383 { 11384 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break; 11385 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break; 11386 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break; 11387 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break; 11388 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break; 11389 default: type = "TPREL"; break; 11390 } 11391 break; 11392 11393 case FUNC_LT_TP_RELATIVE: 11394 switch (r_type) 11395 { 11396 case BFD_RELOC_IA64_IMM22: 11397 new = BFD_RELOC_IA64_LTOFF_TPREL22; break; 11398 default: 11399 type = "LTOFF_TPREL"; break; 11400 } 11401 break; 11402 11403 case FUNC_DTP_MODULE: 11404 switch (r_type) 11405 { 11406 case BFD_RELOC_IA64_DIR64MSB: 11407 new = BFD_RELOC_IA64_DTPMOD64MSB; break; 11408 case BFD_RELOC_IA64_DIR64LSB: 11409 new = BFD_RELOC_IA64_DTPMOD64LSB; break; 11410 default: 11411 type = "DTPMOD"; break; 11412 } 11413 break; 11414 11415 case FUNC_LT_DTP_MODULE: 11416 switch (r_type) 11417 { 11418 case BFD_RELOC_IA64_IMM22: 11419 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break; 11420 default: 11421 type = "LTOFF_DTPMOD"; break; 11422 } 11423 break; 11424 11425 case FUNC_DTP_RELATIVE: 11426 switch (r_type) 11427 { 11428 case BFD_RELOC_IA64_DIR32MSB: 11429 new = BFD_RELOC_IA64_DTPREL32MSB; break; 11430 case BFD_RELOC_IA64_DIR32LSB: 11431 new = BFD_RELOC_IA64_DTPREL32LSB; break; 11432 case BFD_RELOC_IA64_DIR64MSB: 11433 new = BFD_RELOC_IA64_DTPREL64MSB; break; 11434 case BFD_RELOC_IA64_DIR64LSB: 11435 new = BFD_RELOC_IA64_DTPREL64LSB; break; 11436 case BFD_RELOC_IA64_IMM14: 11437 new = BFD_RELOC_IA64_DTPREL14; break; 11438 case BFD_RELOC_IA64_IMM22: 11439 new = BFD_RELOC_IA64_DTPREL22; break; 11440 case BFD_RELOC_IA64_IMM64: 11441 new = BFD_RELOC_IA64_DTPREL64I; break; 11442 default: 11443 type = "DTPREL"; break; 11444 } 11445 break; 11446 11447 case FUNC_LT_DTP_RELATIVE: 11448 switch (r_type) 11449 { 11450 case BFD_RELOC_IA64_IMM22: 11451 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break; 11452 default: 11453 type = "LTOFF_DTPREL"; break; 11454 } 11455 break; 11456 11457 case FUNC_IPLT_RELOC: 11458 switch (r_type) 11459 { 11460 case BFD_RELOC_IA64_IPLTMSB: return r_type; 11461 case BFD_RELOC_IA64_IPLTLSB: return r_type; 11462 default: type = "IPLT"; break; 11463 } 11464 break; 11465 11466 default: 11467 abort (); 11468 } 11469 11470 if (new) 11471 return new; 11472 else 11473 { 11474 int width; 11475 11476 if (!type) 11477 abort (); 11478 switch (r_type) 11479 { 11480 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break; 11481 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break; 11482 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break; 11483 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break; 11484 case BFD_RELOC_UNUSED: width = 13; break; 11485 case BFD_RELOC_IA64_IMM14: width = 14; break; 11486 case BFD_RELOC_IA64_IMM22: width = 22; break; 11487 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break; 11488 default: abort (); 11489 } 11490 11491 /* This should be an error, but since previously there wasn't any 11492 diagnostic here, dont't make it fail because of this for now. */ 11493 as_warn ("Cannot express %s%d%s relocation", type, width, suffix); 11494 return r_type; 11495 } 11496} 11497 11498/* Here is where generate the appropriate reloc for pseudo relocation 11499 functions. */ 11500void 11501ia64_validate_fix (fix) 11502 fixS *fix; 11503{ 11504 switch (fix->fx_r_type) 11505 { 11506 case BFD_RELOC_IA64_FPTR64I: 11507 case BFD_RELOC_IA64_FPTR32MSB: 11508 case BFD_RELOC_IA64_FPTR64LSB: 11509 case BFD_RELOC_IA64_LTOFF_FPTR22: 11510 case BFD_RELOC_IA64_LTOFF_FPTR64I: 11511 if (fix->fx_offset != 0) 11512 as_bad_where (fix->fx_file, fix->fx_line, 11513 "No addend allowed in @fptr() relocation"); 11514 break; 11515 default: 11516 break; 11517 } 11518} 11519 11520static void 11521fix_insn (fix, odesc, value) 11522 fixS *fix; 11523 const struct ia64_operand *odesc; 11524 valueT value; 11525{ 11526 bfd_vma insn[3], t0, t1, control_bits; 11527 const char *err; 11528 char *fixpos; 11529 long slot; 11530 11531 slot = fix->fx_where & 0x3; 11532 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot); 11533 11534 /* Bundles are always in little-endian byte order */ 11535 t0 = bfd_getl64 (fixpos); 11536 t1 = bfd_getl64 (fixpos + 8); 11537 control_bits = t0 & 0x1f; 11538 insn[0] = (t0 >> 5) & 0x1ffffffffffLL; 11539 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); 11540 insn[2] = (t1 >> 23) & 0x1ffffffffffLL; 11541 11542 err = NULL; 11543 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) 11544 { 11545 insn[1] = (value >> 22) & 0x1ffffffffffLL; 11546 insn[2] |= (((value & 0x7f) << 13) 11547 | (((value >> 7) & 0x1ff) << 27) 11548 | (((value >> 16) & 0x1f) << 22) 11549 | (((value >> 21) & 0x1) << 21) 11550 | (((value >> 63) & 0x1) << 36)); 11551 } 11552 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) 11553 { 11554 if (value & ~0x3fffffffffffffffULL) 11555 err = "integer operand out of range"; 11556 insn[1] = (value >> 21) & 0x1ffffffffffLL; 11557 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36)); 11558 } 11559 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) 11560 { 11561 value >>= 4; 11562 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2; 11563 insn[2] |= ((((value >> 59) & 0x1) << 36) 11564 | (((value >> 0) & 0xfffff) << 13)); 11565 } 11566 else 11567 err = (*odesc->insert) (odesc, value, insn + slot); 11568 11569 if (err) 11570 as_bad_where (fix->fx_file, fix->fx_line, "%s", err); 11571 11572 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46); 11573 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23); 11574 number_to_chars_littleendian (fixpos + 0, t0, 8); 11575 number_to_chars_littleendian (fixpos + 8, t1, 8); 11576} 11577 11578/* Attempt to simplify or even eliminate a fixup. The return value is 11579 ignored; perhaps it was once meaningful, but now it is historical. 11580 To indicate that a fixup has been eliminated, set FIXP->FX_DONE. 11581 11582 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry 11583 (if possible). */ 11584 11585void 11586md_apply_fix (fix, valP, seg) 11587 fixS *fix; 11588 valueT *valP; 11589 segT seg ATTRIBUTE_UNUSED; 11590{ 11591 char *fixpos; 11592 valueT value = *valP; 11593 11594 fixpos = fix->fx_frag->fr_literal + fix->fx_where; 11595 11596 if (fix->fx_pcrel) 11597 { 11598 switch (fix->fx_r_type) 11599 { 11600 case BFD_RELOC_IA64_PCREL21B: break; 11601 case BFD_RELOC_IA64_PCREL21BI: break; 11602 case BFD_RELOC_IA64_PCREL21F: break; 11603 case BFD_RELOC_IA64_PCREL21M: break; 11604 case BFD_RELOC_IA64_PCREL60B: break; 11605 case BFD_RELOC_IA64_PCREL22: break; 11606 case BFD_RELOC_IA64_PCREL64I: break; 11607 case BFD_RELOC_IA64_PCREL32MSB: break; 11608 case BFD_RELOC_IA64_PCREL32LSB: break; 11609 case BFD_RELOC_IA64_PCREL64MSB: break; 11610 case BFD_RELOC_IA64_PCREL64LSB: break; 11611 default: 11612 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym, 11613 fix->fx_r_type); 11614 break; 11615 } 11616 } 11617 if (fix->fx_addsy) 11618 { 11619 switch (fix->fx_r_type) 11620 { 11621 case BFD_RELOC_UNUSED: 11622 /* This must be a TAG13 or TAG13b operand. There are no external 11623 relocs defined for them, so we must give an error. */ 11624 as_bad_where (fix->fx_file, fix->fx_line, 11625 "%s must have a constant value", 11626 elf64_ia64_operands[fix->tc_fix_data.opnd].desc); 11627 fix->fx_done = 1; 11628 return; 11629 11630 case BFD_RELOC_IA64_TPREL14: 11631 case BFD_RELOC_IA64_TPREL22: 11632 case BFD_RELOC_IA64_TPREL64I: 11633 case BFD_RELOC_IA64_LTOFF_TPREL22: 11634 case BFD_RELOC_IA64_LTOFF_DTPMOD22: 11635 case BFD_RELOC_IA64_DTPREL14: 11636 case BFD_RELOC_IA64_DTPREL22: 11637 case BFD_RELOC_IA64_DTPREL64I: 11638 case BFD_RELOC_IA64_LTOFF_DTPREL22: 11639 S_SET_THREAD_LOCAL (fix->fx_addsy); 11640 break; 11641 11642 default: 11643 break; 11644 } 11645 } 11646 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL) 11647 { 11648 if (fix->tc_fix_data.bigendian) 11649 number_to_chars_bigendian (fixpos, value, fix->fx_size); 11650 else 11651 number_to_chars_littleendian (fixpos, value, fix->fx_size); 11652 fix->fx_done = 1; 11653 } 11654 else 11655 { 11656 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value); 11657 fix->fx_done = 1; 11658 } 11659} 11660 11661/* Generate the BFD reloc to be stuck in the object file from the 11662 fixup used internally in the assembler. */ 11663 11664arelent * 11665tc_gen_reloc (sec, fixp) 11666 asection *sec ATTRIBUTE_UNUSED; 11667 fixS *fixp; 11668{ 11669 arelent *reloc; 11670 11671 reloc = xmalloc (sizeof (*reloc)); 11672 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 11673 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 11674 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 11675 reloc->addend = fixp->fx_offset; 11676 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 11677 11678 if (!reloc->howto) 11679 { 11680 as_bad_where (fixp->fx_file, fixp->fx_line, 11681 "Cannot represent %s relocation in object file", 11682 bfd_get_reloc_code_name (fixp->fx_r_type)); 11683 } 11684 return reloc; 11685} 11686 11687/* Turn a string in input_line_pointer into a floating point constant 11688 of type TYPE, and store the appropriate bytes in *LIT. The number 11689 of LITTLENUMS emitted is stored in *SIZE. An error message is 11690 returned, or NULL on OK. */ 11691 11692#define MAX_LITTLENUMS 5 11693 11694char * 11695md_atof (type, lit, size) 11696 int type; 11697 char *lit; 11698 int *size; 11699{ 11700 LITTLENUM_TYPE words[MAX_LITTLENUMS]; 11701 char *t; 11702 int prec; 11703 11704 switch (type) 11705 { 11706 /* IEEE floats */ 11707 case 'f': 11708 case 'F': 11709 case 's': 11710 case 'S': 11711 prec = 2; 11712 break; 11713 11714 case 'd': 11715 case 'D': 11716 case 'r': 11717 case 'R': 11718 prec = 4; 11719 break; 11720 11721 case 'x': 11722 case 'X': 11723 case 'p': 11724 case 'P': 11725 prec = 5; 11726 break; 11727 11728 default: 11729 *size = 0; 11730 return "Bad call to MD_ATOF()"; 11731 } 11732 t = atof_ieee (input_line_pointer, type, words); 11733 if (t) 11734 input_line_pointer = t; 11735 11736 (*ia64_float_to_chars) (lit, words, prec); 11737 11738 if (type == 'X') 11739 { 11740 /* It is 10 byte floating point with 6 byte padding. */ 11741 memset (&lit [10], 0, 6); 11742 *size = 8 * sizeof (LITTLENUM_TYPE); 11743 } 11744 else 11745 *size = prec * sizeof (LITTLENUM_TYPE); 11746 11747 return 0; 11748} 11749 11750/* Handle ia64 specific semantics of the align directive. */ 11751 11752void 11753ia64_md_do_align (n, fill, len, max) 11754 int n ATTRIBUTE_UNUSED; 11755 const char *fill ATTRIBUTE_UNUSED; 11756 int len ATTRIBUTE_UNUSED; 11757 int max ATTRIBUTE_UNUSED; 11758{ 11759 if (subseg_text_p (now_seg)) 11760 ia64_flush_insns (); 11761} 11762 11763/* This is called from HANDLE_ALIGN in write.c. Fill in the contents 11764 of an rs_align_code fragment. */ 11765 11766void 11767ia64_handle_align (fragp) 11768 fragS *fragp; 11769{ 11770 int bytes; 11771 char *p; 11772 const unsigned char *nop; 11773 11774 if (fragp->fr_type != rs_align_code) 11775 return; 11776 11777 /* Check if this frag has to end with a stop bit. */ 11778 nop = fragp->tc_frag_data ? le_nop_stop : le_nop; 11779 11780 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; 11781 p = fragp->fr_literal + fragp->fr_fix; 11782 11783 /* If no paddings are needed, we check if we need a stop bit. */ 11784 if (!bytes && fragp->tc_frag_data) 11785 { 11786 if (fragp->fr_fix < 16) 11787#if 1 11788 /* FIXME: It won't work with 11789 .align 16 11790 alloc r32=ar.pfs,1,2,4,0 11791 */ 11792 ; 11793#else 11794 as_bad_where (fragp->fr_file, fragp->fr_line, 11795 _("Can't add stop bit to mark end of instruction group")); 11796#endif 11797 else 11798 /* Bundles are always in little-endian byte order. Make sure 11799 the previous bundle has the stop bit. */ 11800 *(p - 16) |= 1; 11801 } 11802 11803 /* Make sure we are on a 16-byte boundary, in case someone has been 11804 putting data into a text section. */ 11805 if (bytes & 15) 11806 { 11807 int fix = bytes & 15; 11808 memset (p, 0, fix); 11809 p += fix; 11810 bytes -= fix; 11811 fragp->fr_fix += fix; 11812 } 11813 11814 /* Instruction bundles are always little-endian. */ 11815 memcpy (p, nop, 16); 11816 fragp->fr_var = 16; 11817} 11818 11819static void 11820ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words, 11821 int prec) 11822{ 11823 while (prec--) 11824 { 11825 number_to_chars_bigendian (lit, (long) (*words++), 11826 sizeof (LITTLENUM_TYPE)); 11827 lit += sizeof (LITTLENUM_TYPE); 11828 } 11829} 11830 11831static void 11832ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words, 11833 int prec) 11834{ 11835 while (prec--) 11836 { 11837 number_to_chars_littleendian (lit, (long) (words[prec]), 11838 sizeof (LITTLENUM_TYPE)); 11839 lit += sizeof (LITTLENUM_TYPE); 11840 } 11841} 11842 11843void 11844ia64_elf_section_change_hook (void) 11845{ 11846 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND 11847 && elf_linked_to_section (now_seg) == NULL) 11848 elf_linked_to_section (now_seg) = text_section; 11849 dot_byteorder (-1); 11850} 11851 11852/* Check if a label should be made global. */ 11853void 11854ia64_check_label (symbolS *label) 11855{ 11856 if (*input_line_pointer == ':') 11857 { 11858 S_SET_EXTERNAL (label); 11859 input_line_pointer++; 11860 } 11861} 11862 11863/* Used to remember where .alias and .secalias directives are seen. We 11864 will rename symbol and section names when we are about to output 11865 the relocatable file. */ 11866struct alias 11867{ 11868 char *file; /* The file where the directive is seen. */ 11869 unsigned int line; /* The line number the directive is at. */ 11870 const char *name; /* The original name of the symbol. */ 11871}; 11872 11873/* Called for .alias and .secalias directives. If SECTION is 1, it is 11874 .secalias. Otherwise, it is .alias. */ 11875static void 11876dot_alias (int section) 11877{ 11878 char *name, *alias; 11879 char delim; 11880 char *end_name; 11881 int len; 11882 const char *error_string; 11883 struct alias *h; 11884 const char *a; 11885 struct hash_control *ahash, *nhash; 11886 const char *kind; 11887 11888 name = input_line_pointer; 11889 delim = get_symbol_end (); 11890 end_name = input_line_pointer; 11891 *end_name = delim; 11892 11893 if (name == end_name) 11894 { 11895 as_bad (_("expected symbol name")); 11896 ignore_rest_of_line (); 11897 return; 11898 } 11899 11900 SKIP_WHITESPACE (); 11901 11902 if (*input_line_pointer != ',') 11903 { 11904 *end_name = 0; 11905 as_bad (_("expected comma after \"%s\""), name); 11906 *end_name = delim; 11907 ignore_rest_of_line (); 11908 return; 11909 } 11910 11911 input_line_pointer++; 11912 *end_name = 0; 11913 ia64_canonicalize_symbol_name (name); 11914 11915 /* We call demand_copy_C_string to check if alias string is valid. 11916 There should be a closing `"' and no `\0' in the string. */ 11917 alias = demand_copy_C_string (&len); 11918 if (alias == NULL) 11919 { 11920 ignore_rest_of_line (); 11921 return; 11922 } 11923 11924 /* Make a copy of name string. */ 11925 len = strlen (name) + 1; 11926 obstack_grow (¬es, name, len); 11927 name = obstack_finish (¬es); 11928 11929 if (section) 11930 { 11931 kind = "section"; 11932 ahash = secalias_hash; 11933 nhash = secalias_name_hash; 11934 } 11935 else 11936 { 11937 kind = "symbol"; 11938 ahash = alias_hash; 11939 nhash = alias_name_hash; 11940 } 11941 11942 /* Check if alias has been used before. */ 11943 h = (struct alias *) hash_find (ahash, alias); 11944 if (h) 11945 { 11946 if (strcmp (h->name, name)) 11947 as_bad (_("`%s' is already the alias of %s `%s'"), 11948 alias, kind, h->name); 11949 goto out; 11950 } 11951 11952 /* Check if name already has an alias. */ 11953 a = (const char *) hash_find (nhash, name); 11954 if (a) 11955 { 11956 if (strcmp (a, alias)) 11957 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a); 11958 goto out; 11959 } 11960 11961 h = (struct alias *) xmalloc (sizeof (struct alias)); 11962 as_where (&h->file, &h->line); 11963 h->name = name; 11964 11965 error_string = hash_jam (ahash, alias, (PTR) h); 11966 if (error_string) 11967 { 11968 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"), 11969 alias, kind, error_string); 11970 goto out; 11971 } 11972 11973 error_string = hash_jam (nhash, name, (PTR) alias); 11974 if (error_string) 11975 { 11976 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"), 11977 alias, kind, error_string); 11978out: 11979 obstack_free (¬es, name); 11980 obstack_free (¬es, alias); 11981 } 11982 11983 demand_empty_rest_of_line (); 11984} 11985 11986/* It renames the original symbol name to its alias. */ 11987static void 11988do_alias (const char *alias, PTR value) 11989{ 11990 struct alias *h = (struct alias *) value; 11991 symbolS *sym = symbol_find (h->name); 11992 11993 if (sym == NULL) 11994 as_warn_where (h->file, h->line, 11995 _("symbol `%s' aliased to `%s' is not used"), 11996 h->name, alias); 11997 else 11998 S_SET_NAME (sym, (char *) alias); 11999} 12000 12001/* Called from write_object_file. */ 12002void 12003ia64_adjust_symtab (void) 12004{ 12005 hash_traverse (alias_hash, do_alias); 12006} 12007 12008/* It renames the original section name to its alias. */ 12009static void 12010do_secalias (const char *alias, PTR value) 12011{ 12012 struct alias *h = (struct alias *) value; 12013 segT sec = bfd_get_section_by_name (stdoutput, h->name); 12014 12015 if (sec == NULL) 12016 as_warn_where (h->file, h->line, 12017 _("section `%s' aliased to `%s' is not used"), 12018 h->name, alias); 12019 else 12020 sec->name = alias; 12021} 12022 12023/* Called from write_object_file. */ 12024void 12025ia64_frob_file (void) 12026{ 12027 hash_traverse (secalias_hash, do_secalias); 12028} 12029