trap.h revision 77957
177957Sbenno/* 277957Sbenno * Copyright (C) 1995, 1996 Wolfgang Solfrank. 377957Sbenno * Copyright (C) 1995, 1996 TooLs GmbH. 477957Sbenno * All rights reserved. 577957Sbenno * 677957Sbenno * Redistribution and use in source and binary forms, with or without 777957Sbenno * modification, are permitted provided that the following conditions 877957Sbenno * are met: 977957Sbenno * 1. Redistributions of source code must retain the above copyright 1077957Sbenno * notice, this list of conditions and the following disclaimer. 1177957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1277957Sbenno * notice, this list of conditions and the following disclaimer in the 1377957Sbenno * documentation and/or other materials provided with the distribution. 1477957Sbenno * 3. All advertising materials mentioning features or use of this software 1577957Sbenno * must display the following acknowledgement: 1677957Sbenno * This product includes software developed by TooLs GmbH. 1777957Sbenno * 4. The name of TooLs GmbH may not be used to endorse or promote products 1877957Sbenno * derived from this software without specific prior written permission. 1977957Sbenno * 2077957Sbenno * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 2177957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 2277957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2377957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2477957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 2577957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 2677957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 2777957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 2877957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 2977957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3077957Sbenno * 3177957Sbenno * $NetBSD: trap.h,v 1.3 2000/05/25 21:10:14 is Exp $ 3277957Sbenno * $FreeBSD: head/sys/powerpc/include/trap.h 77957 2001-06-10 02:39:37Z benno $ 3377957Sbenno */ 3477957Sbenno 3577957Sbenno#ifndef _POWERPC_TRAP_H_ 3677957Sbenno#define _POWERPC_TRAP_H_ 3777957Sbenno 3877957Sbenno#define EXC_RSVD 0x0000 /* Reserved */ 3977957Sbenno#define EXC_RST 0x0100 /* Reset */ 4077957Sbenno#define EXC_MCHK 0x0200 /* Machine Check */ 4177957Sbenno#define EXC_DSI 0x0300 /* Data Storage Interrupt */ 4277957Sbenno#define EXC_ISI 0x0400 /* Instruction Storage Interrupt */ 4377957Sbenno#define EXC_EXI 0x0500 /* External Interrupt */ 4477957Sbenno#define EXC_ALI 0x0600 /* Alignment Interrupt */ 4577957Sbenno#define EXC_PGM 0x0700 /* Program Interrupt */ 4677957Sbenno#define EXC_FPU 0x0800 /* Floating-point Unavailable */ 4777957Sbenno#define EXC_DECR 0x0900 /* Decrementer Interrupt */ 4877957Sbenno#define EXC_SC 0x0c00 /* System Call */ 4977957Sbenno#define EXC_TRC 0x0d00 /* Trace */ 5077957Sbenno#define EXC_FPA 0x0e00 /* Floating-point Assist */ 5177957Sbenno 5277957Sbenno/* The following are only available on 604: */ 5377957Sbenno#define EXC_PERF 0x0f00 /* Performance Monitoring */ 5477957Sbenno#define EXC_BPT 0x1300 /* Instruction Breakpoint */ 5577957Sbenno#define EXC_SMI 0x1400 /* System Managment Interrupt */ 5677957Sbenno 5777957Sbenno/* And these are only on the 603: */ 5877957Sbenno#define EXC_IMISS 0x1000 /* Instruction translation miss */ 5977957Sbenno#define EXC_DLMISS 0x1100 /* Data load translation miss */ 6077957Sbenno#define EXC_DSMISS 0x1200 /* Data store translation miss */ 6177957Sbenno 6277957Sbenno#define EXC_LAST 0x2f00 /* Last possible exception vector */ 6377957Sbenno 6477957Sbenno#define EXC_AST 0x3000 /* Fake AST vector */ 6577957Sbenno 6677957Sbenno/* Trap was in user mode */ 6777957Sbenno#define EXC_USER 0x10000 6877957Sbenno 6977957Sbenno 7077957Sbenno/* 7177957Sbenno * EXC_ALI sets bits in the DSISR and DAR to provide enough 7277957Sbenno * information to recover from the unaligned access without needing to 7377957Sbenno * parse the offending instruction. This includes certain bits of the 7477957Sbenno * opcode, and information about what registers are used. The opcode 7577957Sbenno * indicator values below come from Appendix F of Book III of "The 7677957Sbenno * PowerPC Architecture". 7777957Sbenno */ 7877957Sbenno 7977957Sbenno#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f) 8077957Sbenno#define EXC_ALI_LFD 0x09 8177957Sbenno#define EXC_ALI_STFD 0x0b 8277957Sbenno 8377957Sbenno/* Macros to extract register information */ 8477957Sbenno#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */ 8577957Sbenno#define EXC_ALI_RA(dsisr) (dsisr & 0x1f) 8677957Sbenno 8777957Sbenno#ifndef LOCORE 8877957Sbenno 8977957Sbennovoid trap(struct trapframe *); 9077957Sbenno 9177957Sbenno#endif /* !LOCORE */ 9277957Sbenno 9377957Sbenno#endif /* _POWERPC_TRAP_H_ */ 94