trap.h revision 77957
1/* 2 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3 * Copyright (C) 1995, 1996 TooLs GmbH. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by TooLs GmbH. 17 * 4. The name of TooLs GmbH may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $NetBSD: trap.h,v 1.3 2000/05/25 21:10:14 is Exp $ 32 * $FreeBSD: head/sys/powerpc/include/trap.h 77957 2001-06-10 02:39:37Z benno $ 33 */ 34 35#ifndef _POWERPC_TRAP_H_ 36#define _POWERPC_TRAP_H_ 37 38#define EXC_RSVD 0x0000 /* Reserved */ 39#define EXC_RST 0x0100 /* Reset */ 40#define EXC_MCHK 0x0200 /* Machine Check */ 41#define EXC_DSI 0x0300 /* Data Storage Interrupt */ 42#define EXC_ISI 0x0400 /* Instruction Storage Interrupt */ 43#define EXC_EXI 0x0500 /* External Interrupt */ 44#define EXC_ALI 0x0600 /* Alignment Interrupt */ 45#define EXC_PGM 0x0700 /* Program Interrupt */ 46#define EXC_FPU 0x0800 /* Floating-point Unavailable */ 47#define EXC_DECR 0x0900 /* Decrementer Interrupt */ 48#define EXC_SC 0x0c00 /* System Call */ 49#define EXC_TRC 0x0d00 /* Trace */ 50#define EXC_FPA 0x0e00 /* Floating-point Assist */ 51 52/* The following are only available on 604: */ 53#define EXC_PERF 0x0f00 /* Performance Monitoring */ 54#define EXC_BPT 0x1300 /* Instruction Breakpoint */ 55#define EXC_SMI 0x1400 /* System Managment Interrupt */ 56 57/* And these are only on the 603: */ 58#define EXC_IMISS 0x1000 /* Instruction translation miss */ 59#define EXC_DLMISS 0x1100 /* Data load translation miss */ 60#define EXC_DSMISS 0x1200 /* Data store translation miss */ 61 62#define EXC_LAST 0x2f00 /* Last possible exception vector */ 63 64#define EXC_AST 0x3000 /* Fake AST vector */ 65 66/* Trap was in user mode */ 67#define EXC_USER 0x10000 68 69 70/* 71 * EXC_ALI sets bits in the DSISR and DAR to provide enough 72 * information to recover from the unaligned access without needing to 73 * parse the offending instruction. This includes certain bits of the 74 * opcode, and information about what registers are used. The opcode 75 * indicator values below come from Appendix F of Book III of "The 76 * PowerPC Architecture". 77 */ 78 79#define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f) 80#define EXC_ALI_LFD 0x09 81#define EXC_ALI_STFD 0x0b 82 83/* Macros to extract register information */ 84#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */ 85#define EXC_ALI_RA(dsisr) (dsisr & 0x1f) 86 87#ifndef LOCORE 88 89void trap(struct trapframe *); 90 91#endif /* !LOCORE */ 92 93#endif /* _POWERPC_TRAP_H_ */ 94