1/* 2 * Copyright (c) 2015, The Linux Foundation. All rights reserved. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14#ifndef _DT_BINDINGS_CLK_MSM_MMCC_8996_H 15#define _DT_BINDINGS_CLK_MSM_MMCC_8996_H 16 17#define MMPLL0_EARLY 0 18#define MMPLL0_PLL 1 19#define MMPLL1_EARLY 2 20#define MMPLL1_PLL 3 21#define MMPLL2_EARLY 4 22#define MMPLL2_PLL 5 23#define MMPLL3_EARLY 6 24#define MMPLL3_PLL 7 25#define MMPLL4_EARLY 8 26#define MMPLL4_PLL 9 27#define MMPLL5_EARLY 10 28#define MMPLL5_PLL 11 29#define MMPLL8_EARLY 12 30#define MMPLL8_PLL 13 31#define MMPLL9_EARLY 14 32#define MMPLL9_PLL 15 33#define AHB_CLK_SRC 16 34#define AXI_CLK_SRC 17 35#define MAXI_CLK_SRC 18 36#define DSA_CORE_CLK_SRC 19 37#define GFX3D_CLK_SRC 20 38#define RBBMTIMER_CLK_SRC 21 39#define ISENSE_CLK_SRC 22 40#define RBCPR_CLK_SRC 23 41#define VIDEO_CORE_CLK_SRC 24 42#define VIDEO_SUBCORE0_CLK_SRC 25 43#define VIDEO_SUBCORE1_CLK_SRC 26 44#define PCLK0_CLK_SRC 27 45#define PCLK1_CLK_SRC 28 46#define MDP_CLK_SRC 29 47#define EXTPCLK_CLK_SRC 30 48#define VSYNC_CLK_SRC 31 49#define HDMI_CLK_SRC 32 50#define BYTE0_CLK_SRC 33 51#define BYTE1_CLK_SRC 34 52#define ESC0_CLK_SRC 35 53#define ESC1_CLK_SRC 36 54#define CAMSS_GP0_CLK_SRC 37 55#define CAMSS_GP1_CLK_SRC 38 56#define MCLK0_CLK_SRC 39 57#define MCLK1_CLK_SRC 40 58#define MCLK2_CLK_SRC 41 59#define MCLK3_CLK_SRC 42 60#define CCI_CLK_SRC 43 61#define CSI0PHYTIMER_CLK_SRC 44 62#define CSI1PHYTIMER_CLK_SRC 45 63#define CSI2PHYTIMER_CLK_SRC 46 64#define CSIPHY0_3P_CLK_SRC 47 65#define CSIPHY1_3P_CLK_SRC 48 66#define CSIPHY2_3P_CLK_SRC 49 67#define JPEG0_CLK_SRC 50 68#define JPEG2_CLK_SRC 51 69#define JPEG_DMA_CLK_SRC 52 70#define VFE0_CLK_SRC 53 71#define VFE1_CLK_SRC 54 72#define CPP_CLK_SRC 55 73#define CSI0_CLK_SRC 56 74#define CSI1_CLK_SRC 57 75#define CSI2_CLK_SRC 58 76#define CSI3_CLK_SRC 59 77#define FD_CORE_CLK_SRC 60 78#define MMSS_CXO_CLK 61 79#define MMSS_SLEEPCLK_CLK 62 80#define MMSS_MMAGIC_AHB_CLK 63 81#define MMSS_MMAGIC_CFG_AHB_CLK 64 82#define MMSS_MISC_AHB_CLK 65 83#define MMSS_MISC_CXO_CLK 66 84#define MMSS_BTO_AHB_CLK 67 85#define MMSS_MMAGIC_AXI_CLK 68 86#define MMSS_S0_AXI_CLK 69 87#define MMSS_MMAGIC_MAXI_CLK 70 88#define DSA_CORE_CLK 71 89#define DSA_NOC_CFG_AHB_CLK 72 90#define MMAGIC_CAMSS_AXI_CLK 73 91#define MMAGIC_CAMSS_NOC_CFG_AHB_CLK 74 92#define THROTTLE_CAMSS_CXO_CLK 75 93#define THROTTLE_CAMSS_AHB_CLK 76 94#define THROTTLE_CAMSS_AXI_CLK 77 95#define SMMU_VFE_AHB_CLK 78 96#define SMMU_VFE_AXI_CLK 79 97#define SMMU_CPP_AHB_CLK 80 98#define SMMU_CPP_AXI_CLK 81 99#define SMMU_JPEG_AHB_CLK 82 100#define SMMU_JPEG_AXI_CLK 83 101#define MMAGIC_MDSS_AXI_CLK 84 102#define MMAGIC_MDSS_NOC_CFG_AHB_CLK 85 103#define THROTTLE_MDSS_CXO_CLK 86 104#define THROTTLE_MDSS_AHB_CLK 87 105#define THROTTLE_MDSS_AXI_CLK 88 106#define SMMU_ROT_AHB_CLK 89 107#define SMMU_ROT_AXI_CLK 90 108#define SMMU_MDP_AHB_CLK 91 109#define SMMU_MDP_AXI_CLK 92 110#define MMAGIC_VIDEO_AXI_CLK 93 111#define MMAGIC_VIDEO_NOC_CFG_AHB_CLK 94 112#define THROTTLE_VIDEO_CXO_CLK 95 113#define THROTTLE_VIDEO_AHB_CLK 96 114#define THROTTLE_VIDEO_AXI_CLK 97 115#define SMMU_VIDEO_AHB_CLK 98 116#define SMMU_VIDEO_AXI_CLK 99 117#define MMAGIC_BIMC_AXI_CLK 100 118#define MMAGIC_BIMC_NOC_CFG_AHB_CLK 101 119#define GPU_GX_GFX3D_CLK 102 120#define GPU_GX_RBBMTIMER_CLK 103 121#define GPU_AHB_CLK 104 122#define GPU_AON_ISENSE_CLK 105 123#define VMEM_MAXI_CLK 106 124#define VMEM_AHB_CLK 107 125#define MMSS_RBCPR_CLK 108 126#define MMSS_RBCPR_AHB_CLK 109 127#define VIDEO_CORE_CLK 110 128#define VIDEO_AXI_CLK 111 129#define VIDEO_MAXI_CLK 112 130#define VIDEO_AHB_CLK 113 131#define VIDEO_SUBCORE0_CLK 114 132#define VIDEO_SUBCORE1_CLK 115 133#define MDSS_AHB_CLK 116 134#define MDSS_HDMI_AHB_CLK 117 135#define MDSS_AXI_CLK 118 136#define MDSS_PCLK0_CLK 119 137#define MDSS_PCLK1_CLK 120 138#define MDSS_MDP_CLK 121 139#define MDSS_EXTPCLK_CLK 122 140#define MDSS_VSYNC_CLK 123 141#define MDSS_HDMI_CLK 124 142#define MDSS_BYTE0_CLK 125 143#define MDSS_BYTE1_CLK 126 144#define MDSS_ESC0_CLK 127 145#define MDSS_ESC1_CLK 128 146#define CAMSS_TOP_AHB_CLK 129 147#define CAMSS_AHB_CLK 130 148#define CAMSS_MICRO_AHB_CLK 131 149#define CAMSS_GP0_CLK 132 150#define CAMSS_GP1_CLK 133 151#define CAMSS_MCLK0_CLK 134 152#define CAMSS_MCLK1_CLK 135 153#define CAMSS_MCLK2_CLK 136 154#define CAMSS_MCLK3_CLK 137 155#define CAMSS_CCI_CLK 138 156#define CAMSS_CCI_AHB_CLK 139 157#define CAMSS_CSI0PHYTIMER_CLK 140 158#define CAMSS_CSI1PHYTIMER_CLK 141 159#define CAMSS_CSI2PHYTIMER_CLK 142 160#define CAMSS_CSIPHY0_3P_CLK 143 161#define CAMSS_CSIPHY1_3P_CLK 144 162#define CAMSS_CSIPHY2_3P_CLK 145 163#define CAMSS_JPEG0_CLK 146 164#define CAMSS_JPEG2_CLK 147 165#define CAMSS_JPEG_DMA_CLK 148 166#define CAMSS_JPEG_AHB_CLK 149 167#define CAMSS_JPEG_AXI_CLK 150 168#define CAMSS_VFE_AHB_CLK 151 169#define CAMSS_VFE_AXI_CLK 152 170#define CAMSS_VFE0_CLK 153 171#define CAMSS_VFE0_STREAM_CLK 154 172#define CAMSS_VFE0_AHB_CLK 155 173#define CAMSS_VFE1_CLK 156 174#define CAMSS_VFE1_STREAM_CLK 157 175#define CAMSS_VFE1_AHB_CLK 158 176#define CAMSS_CSI_VFE0_CLK 159 177#define CAMSS_CSI_VFE1_CLK 160 178#define CAMSS_CPP_VBIF_AHB_CLK 161 179#define CAMSS_CPP_AXI_CLK 162 180#define CAMSS_CPP_CLK 163 181#define CAMSS_CPP_AHB_CLK 164 182#define CAMSS_CSI0_CLK 165 183#define CAMSS_CSI0_AHB_CLK 166 184#define CAMSS_CSI0PHY_CLK 167 185#define CAMSS_CSI0RDI_CLK 168 186#define CAMSS_CSI0PIX_CLK 169 187#define CAMSS_CSI1_CLK 170 188#define CAMSS_CSI1_AHB_CLK 171 189#define CAMSS_CSI1PHY_CLK 172 190#define CAMSS_CSI1RDI_CLK 173 191#define CAMSS_CSI1PIX_CLK 174 192#define CAMSS_CSI2_CLK 175 193#define CAMSS_CSI2_AHB_CLK 176 194#define CAMSS_CSI2PHY_CLK 177 195#define CAMSS_CSI2RDI_CLK 178 196#define CAMSS_CSI2PIX_CLK 179 197#define CAMSS_CSI3_CLK 180 198#define CAMSS_CSI3_AHB_CLK 181 199#define CAMSS_CSI3PHY_CLK 182 200#define CAMSS_CSI3RDI_CLK 183 201#define CAMSS_CSI3PIX_CLK 184 202#define CAMSS_ISPIF_AHB_CLK 185 203#define FD_CORE_CLK 186 204#define FD_CORE_UAR_CLK 187 205#define FD_AHB_CLK 188 206#define MMSS_SPDM_CSI0_CLK 189 207#define MMSS_SPDM_JPEG_DMA_CLK 190 208#define MMSS_SPDM_CPP_CLK 191 209#define MMSS_SPDM_PCLK0_CLK 192 210#define MMSS_SPDM_AHB_CLK 193 211#define MMSS_SPDM_GFX3D_CLK 194 212#define MMSS_SPDM_PCLK1_CLK 195 213#define MMSS_SPDM_JPEG2_CLK 196 214#define MMSS_SPDM_DEBUG_CLK 197 215#define MMSS_SPDM_VFE1_CLK 198 216#define MMSS_SPDM_VFE0_CLK 199 217#define MMSS_SPDM_VIDEO_CORE_CLK 200 218#define MMSS_SPDM_AXI_CLK 201 219#define MMSS_SPDM_MDP_CLK 202 220#define MMSS_SPDM_JPEG0_CLK 203 221#define MMSS_SPDM_RM_AXI_CLK 204 222#define MMSS_SPDM_RM_MAXI_CLK 205 223 224#define MMAGICAHB_BCR 0 225#define MMAGIC_CFG_BCR 1 226#define MISC_BCR 2 227#define BTO_BCR 3 228#define MMAGICAXI_BCR 4 229#define MMAGICMAXI_BCR 5 230#define DSA_BCR 6 231#define MMAGIC_CAMSS_BCR 7 232#define THROTTLE_CAMSS_BCR 8 233#define SMMU_VFE_BCR 9 234#define SMMU_CPP_BCR 10 235#define SMMU_JPEG_BCR 11 236#define MMAGIC_MDSS_BCR 12 237#define THROTTLE_MDSS_BCR 13 238#define SMMU_ROT_BCR 14 239#define SMMU_MDP_BCR 15 240#define MMAGIC_VIDEO_BCR 16 241#define THROTTLE_VIDEO_BCR 17 242#define SMMU_VIDEO_BCR 18 243#define MMAGIC_BIMC_BCR 19 244#define GPU_GX_BCR 20 245#define GPU_BCR 21 246#define GPU_AON_BCR 22 247#define VMEM_BCR 23 248#define MMSS_RBCPR_BCR 24 249#define VIDEO_BCR 25 250#define MDSS_BCR 26 251#define CAMSS_TOP_BCR 27 252#define CAMSS_AHB_BCR 28 253#define CAMSS_MICRO_BCR 29 254#define CAMSS_CCI_BCR 30 255#define CAMSS_PHY0_BCR 31 256#define CAMSS_PHY1_BCR 32 257#define CAMSS_PHY2_BCR 33 258#define CAMSS_CSIPHY0_3P_BCR 34 259#define CAMSS_CSIPHY1_3P_BCR 35 260#define CAMSS_CSIPHY2_3P_BCR 36 261#define CAMSS_JPEG_BCR 37 262#define CAMSS_VFE_BCR 38 263#define CAMSS_VFE0_BCR 39 264#define CAMSS_VFE1_BCR 40 265#define CAMSS_CSI_VFE0_BCR 41 266#define CAMSS_CSI_VFE1_BCR 42 267#define CAMSS_CPP_TOP_BCR 43 268#define CAMSS_CPP_BCR 44 269#define CAMSS_CSI0_BCR 45 270#define CAMSS_CSI0RDI_BCR 46 271#define CAMSS_CSI0PIX_BCR 47 272#define CAMSS_CSI1_BCR 48 273#define CAMSS_CSI1RDI_BCR 49 274#define CAMSS_CSI1PIX_BCR 50 275#define CAMSS_CSI2_BCR 51 276#define CAMSS_CSI2RDI_BCR 52 277#define CAMSS_CSI2PIX_BCR 53 278#define CAMSS_CSI3_BCR 54 279#define CAMSS_CSI3RDI_BCR 55 280#define CAMSS_CSI3PIX_BCR 56 281#define CAMSS_ISPIF_BCR 57 282#define FD_BCR 58 283#define MMSS_SPDM_RM_BCR 59 284 285#endif 286