1279377Simp/* 2279377Simp * Device Tree Source for OMAP3 SoC 3279377Simp * 4279377Simp * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 5279377Simp * 6279377Simp * This file is licensed under the terms of the GNU General Public License 7279377Simp * version 2. This program is licensed "as is" without any warranty of any 8279377Simp * kind, whether express or implied. 9279377Simp */ 10279377Simp 11279377Simp#include <dt-bindings/gpio/gpio.h> 12279377Simp#include <dt-bindings/interrupt-controller/irq.h> 13279377Simp#include <dt-bindings/pinctrl/omap.h> 14279377Simp 15279377Simp#include "skeleton.dtsi" 16279377Simp 17279377Simp/ { 18279377Simp compatible = "ti,omap3430", "ti,omap3"; 19279377Simp interrupt-parent = <&intc>; 20279377Simp 21279377Simp aliases { 22279377Simp i2c0 = &i2c1; 23279377Simp i2c1 = &i2c2; 24279377Simp i2c2 = &i2c3; 25279377Simp serial0 = &uart1; 26279377Simp serial1 = &uart2; 27279377Simp serial2 = &uart3; 28279377Simp }; 29279377Simp 30279377Simp cpus { 31279377Simp #address-cells = <1>; 32279377Simp #size-cells = <0>; 33279377Simp 34279377Simp cpu@0 { 35279377Simp compatible = "arm,cortex-a8"; 36279377Simp device_type = "cpu"; 37279377Simp reg = <0x0>; 38279377Simp 39279377Simp clocks = <&dpll1_ck>; 40279377Simp clock-names = "cpu"; 41279377Simp 42279377Simp clock-latency = <300000>; /* From omap-cpufreq driver */ 43279377Simp }; 44279377Simp }; 45279377Simp 46279377Simp pmu { 47279377Simp compatible = "arm,cortex-a8-pmu"; 48279377Simp reg = <0x54000000 0x800000>; 49279377Simp interrupts = <3>; 50279377Simp ti,hwmods = "debugss"; 51279377Simp }; 52279377Simp 53279377Simp /* 54279377Simp * The soc node represents the soc top level view. It is used for IPs 55279377Simp * that are not memory mapped in the MPU view or for the MPU itself. 56279377Simp */ 57279377Simp soc { 58279377Simp compatible = "ti,omap-infra"; 59279377Simp mpu { 60279377Simp compatible = "ti,omap3-mpu"; 61279377Simp ti,hwmods = "mpu"; 62279377Simp }; 63279377Simp 64279377Simp iva: iva { 65279377Simp compatible = "ti,iva2.2"; 66279377Simp ti,hwmods = "iva"; 67279377Simp 68279377Simp dsp { 69279377Simp compatible = "ti,omap3-c64"; 70279377Simp }; 71279377Simp }; 72279377Simp }; 73279377Simp 74279377Simp /* 75279377Simp * XXX: Use a flat representation of the OMAP3 interconnect. 76279377Simp * The real OMAP interconnect network is quite complex. 77279377Simp * Since it will not bring real advantage to represent that in DT for 78279377Simp * the moment, just use a fake OCP bus entry to represent the whole bus 79279377Simp * hierarchy. 80279377Simp */ 81279377Simp ocp { 82279377Simp compatible = "ti,omap3-l3-smx", "simple-bus"; 83279377Simp reg = <0x68000000 0x10000>; 84279377Simp interrupts = <9 10>; 85279377Simp #address-cells = <1>; 86279377Simp #size-cells = <1>; 87279377Simp ranges; 88279377Simp ti,hwmods = "l3_main"; 89279377Simp 90295436Sandrew l4_core: l4@48000000 { 91295436Sandrew compatible = "ti,omap3-l4-core", "simple-bus"; 92295436Sandrew #address-cells = <1>; 93295436Sandrew #size-cells = <1>; 94295436Sandrew ranges = <0 0x48000000 0x1000000>; 95295436Sandrew 96295436Sandrew scm: scm@2000 { 97295436Sandrew compatible = "ti,omap3-scm", "simple-bus"; 98295436Sandrew reg = <0x2000 0x2000>; 99295436Sandrew #address-cells = <1>; 100295436Sandrew #size-cells = <1>; 101295436Sandrew ranges = <0 0x2000 0x2000>; 102295436Sandrew 103295436Sandrew omap3_pmx_core: pinmux@30 { 104295436Sandrew compatible = "ti,omap3-padconf", 105295436Sandrew "pinctrl-single"; 106295436Sandrew reg = <0x30 0x238>; 107295436Sandrew #address-cells = <1>; 108295436Sandrew #size-cells = <0>; 109295436Sandrew #interrupt-cells = <1>; 110295436Sandrew interrupt-controller; 111295436Sandrew pinctrl-single,register-width = <16>; 112295436Sandrew pinctrl-single,function-mask = <0xff1f>; 113295436Sandrew }; 114295436Sandrew 115295436Sandrew scm_conf: scm_conf@270 { 116295436Sandrew compatible = "syscon", "simple-bus"; 117295436Sandrew reg = <0x270 0x330>; 118295436Sandrew #address-cells = <1>; 119295436Sandrew #size-cells = <1>; 120295436Sandrew ranges = <0 0x270 0x330>; 121295436Sandrew 122295436Sandrew pbias_regulator: pbias_regulator { 123295436Sandrew compatible = "ti,pbias-omap3", "ti,pbias-omap"; 124295436Sandrew reg = <0x2b0 0x4>; 125295436Sandrew syscon = <&scm_conf>; 126295436Sandrew pbias_mmc_reg: pbias_mmc_omap2430 { 127295436Sandrew regulator-name = "pbias_mmc_omap2430"; 128295436Sandrew regulator-min-microvolt = <1800000>; 129295436Sandrew regulator-max-microvolt = <3000000>; 130295436Sandrew }; 131295436Sandrew }; 132295436Sandrew 133295436Sandrew scm_clocks: clocks { 134295436Sandrew #address-cells = <1>; 135295436Sandrew #size-cells = <0>; 136295436Sandrew }; 137295436Sandrew }; 138295436Sandrew 139295436Sandrew scm_clockdomains: clockdomains { 140295436Sandrew }; 141295436Sandrew 142295436Sandrew omap3_pmx_wkup: pinmux@a00 { 143295436Sandrew compatible = "ti,omap3-padconf", 144295436Sandrew "pinctrl-single"; 145295436Sandrew reg = <0xa00 0x5c>; 146295436Sandrew #address-cells = <1>; 147295436Sandrew #size-cells = <0>; 148295436Sandrew #interrupt-cells = <1>; 149295436Sandrew interrupt-controller; 150295436Sandrew pinctrl-single,register-width = <16>; 151295436Sandrew pinctrl-single,function-mask = <0xff1f>; 152295436Sandrew }; 153295436Sandrew }; 154295436Sandrew }; 155295436Sandrew 156279377Simp aes: aes@480c5000 { 157279377Simp compatible = "ti,omap3-aes"; 158279377Simp ti,hwmods = "aes"; 159279377Simp reg = <0x480c5000 0x50>; 160279377Simp interrupts = <0>; 161295436Sandrew dmas = <&sdma 65 &sdma 66>; 162295436Sandrew dma-names = "tx", "rx"; 163279377Simp }; 164279377Simp 165279377Simp prm: prm@48306000 { 166279377Simp compatible = "ti,omap3-prm"; 167279377Simp reg = <0x48306000 0x4000>; 168279377Simp interrupts = <11>; 169279377Simp 170279377Simp prm_clocks: clocks { 171279377Simp #address-cells = <1>; 172279377Simp #size-cells = <0>; 173279377Simp }; 174279377Simp 175279377Simp prm_clockdomains: clockdomains { 176279377Simp }; 177279377Simp }; 178279377Simp 179279377Simp cm: cm@48004000 { 180279377Simp compatible = "ti,omap3-cm"; 181279377Simp reg = <0x48004000 0x4000>; 182279377Simp 183279377Simp cm_clocks: clocks { 184279377Simp #address-cells = <1>; 185279377Simp #size-cells = <0>; 186279377Simp }; 187279377Simp 188279377Simp cm_clockdomains: clockdomains { 189279377Simp }; 190279377Simp }; 191279377Simp 192279377Simp counter32k: counter@48320000 { 193279377Simp compatible = "ti,omap-counter32k"; 194279377Simp reg = <0x48320000 0x20>; 195279377Simp ti,hwmods = "counter_32k"; 196279377Simp }; 197279377Simp 198279377Simp intc: interrupt-controller@48200000 { 199279377Simp compatible = "ti,omap3-intc"; 200279377Simp interrupt-controller; 201279377Simp #interrupt-cells = <1>; 202279377Simp reg = <0x48200000 0x1000>; 203279377Simp }; 204279377Simp 205279377Simp sdma: dma-controller@48056000 { 206279377Simp compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; 207279377Simp reg = <0x48056000 0x1000>; 208279377Simp interrupts = <12>, 209279377Simp <13>, 210279377Simp <14>, 211279377Simp <15>; 212279377Simp #dma-cells = <1>; 213295436Sandrew dma-channels = <32>; 214295436Sandrew dma-requests = <96>; 215279377Simp }; 216279377Simp 217279377Simp gpio1: gpio@48310000 { 218279377Simp compatible = "ti,omap3-gpio"; 219279377Simp reg = <0x48310000 0x200>; 220279377Simp interrupts = <29>; 221279377Simp ti,hwmods = "gpio1"; 222279377Simp ti,gpio-always-on; 223279377Simp gpio-controller; 224279377Simp #gpio-cells = <2>; 225279377Simp interrupt-controller; 226279377Simp #interrupt-cells = <2>; 227279377Simp }; 228279377Simp 229279377Simp gpio2: gpio@49050000 { 230279377Simp compatible = "ti,omap3-gpio"; 231279377Simp reg = <0x49050000 0x200>; 232279377Simp interrupts = <30>; 233279377Simp ti,hwmods = "gpio2"; 234279377Simp gpio-controller; 235279377Simp #gpio-cells = <2>; 236279377Simp interrupt-controller; 237279377Simp #interrupt-cells = <2>; 238279377Simp }; 239279377Simp 240279377Simp gpio3: gpio@49052000 { 241279377Simp compatible = "ti,omap3-gpio"; 242279377Simp reg = <0x49052000 0x200>; 243279377Simp interrupts = <31>; 244279377Simp ti,hwmods = "gpio3"; 245279377Simp gpio-controller; 246279377Simp #gpio-cells = <2>; 247279377Simp interrupt-controller; 248279377Simp #interrupt-cells = <2>; 249279377Simp }; 250279377Simp 251279377Simp gpio4: gpio@49054000 { 252279377Simp compatible = "ti,omap3-gpio"; 253279377Simp reg = <0x49054000 0x200>; 254279377Simp interrupts = <32>; 255279377Simp ti,hwmods = "gpio4"; 256279377Simp gpio-controller; 257279377Simp #gpio-cells = <2>; 258279377Simp interrupt-controller; 259279377Simp #interrupt-cells = <2>; 260279377Simp }; 261279377Simp 262279377Simp gpio5: gpio@49056000 { 263279377Simp compatible = "ti,omap3-gpio"; 264279377Simp reg = <0x49056000 0x200>; 265279377Simp interrupts = <33>; 266279377Simp ti,hwmods = "gpio5"; 267279377Simp gpio-controller; 268279377Simp #gpio-cells = <2>; 269279377Simp interrupt-controller; 270279377Simp #interrupt-cells = <2>; 271279377Simp }; 272279377Simp 273279377Simp gpio6: gpio@49058000 { 274279377Simp compatible = "ti,omap3-gpio"; 275279377Simp reg = <0x49058000 0x200>; 276279377Simp interrupts = <34>; 277279377Simp ti,hwmods = "gpio6"; 278279377Simp gpio-controller; 279279377Simp #gpio-cells = <2>; 280279377Simp interrupt-controller; 281279377Simp #interrupt-cells = <2>; 282279377Simp }; 283279377Simp 284279377Simp uart1: serial@4806a000 { 285279377Simp compatible = "ti,omap3-uart"; 286279377Simp reg = <0x4806a000 0x2000>; 287279377Simp interrupts-extended = <&intc 72>; 288279377Simp dmas = <&sdma 49 &sdma 50>; 289279377Simp dma-names = "tx", "rx"; 290279377Simp ti,hwmods = "uart1"; 291279377Simp clock-frequency = <48000000>; 292279377Simp }; 293279377Simp 294279377Simp uart2: serial@4806c000 { 295279377Simp compatible = "ti,omap3-uart"; 296279377Simp reg = <0x4806c000 0x400>; 297279377Simp interrupts-extended = <&intc 73>; 298279377Simp dmas = <&sdma 51 &sdma 52>; 299279377Simp dma-names = "tx", "rx"; 300279377Simp ti,hwmods = "uart2"; 301279377Simp clock-frequency = <48000000>; 302279377Simp }; 303279377Simp 304279377Simp uart3: serial@49020000 { 305279377Simp compatible = "ti,omap3-uart"; 306279377Simp reg = <0x49020000 0x400>; 307279377Simp interrupts-extended = <&intc 74>; 308279377Simp dmas = <&sdma 53 &sdma 54>; 309279377Simp dma-names = "tx", "rx"; 310279377Simp ti,hwmods = "uart3"; 311279377Simp clock-frequency = <48000000>; 312279377Simp }; 313279377Simp 314279377Simp i2c1: i2c@48070000 { 315279377Simp compatible = "ti,omap3-i2c"; 316279377Simp reg = <0x48070000 0x80>; 317279377Simp interrupts = <56>; 318279377Simp dmas = <&sdma 27 &sdma 28>; 319279377Simp dma-names = "tx", "rx"; 320279377Simp #address-cells = <1>; 321279377Simp #size-cells = <0>; 322279377Simp ti,hwmods = "i2c1"; 323279377Simp }; 324279377Simp 325279377Simp i2c2: i2c@48072000 { 326279377Simp compatible = "ti,omap3-i2c"; 327279377Simp reg = <0x48072000 0x80>; 328279377Simp interrupts = <57>; 329279377Simp dmas = <&sdma 29 &sdma 30>; 330279377Simp dma-names = "tx", "rx"; 331279377Simp #address-cells = <1>; 332279377Simp #size-cells = <0>; 333279377Simp ti,hwmods = "i2c2"; 334279377Simp }; 335279377Simp 336279377Simp i2c3: i2c@48060000 { 337279377Simp compatible = "ti,omap3-i2c"; 338279377Simp reg = <0x48060000 0x80>; 339279377Simp interrupts = <61>; 340279377Simp dmas = <&sdma 25 &sdma 26>; 341279377Simp dma-names = "tx", "rx"; 342279377Simp #address-cells = <1>; 343279377Simp #size-cells = <0>; 344279377Simp ti,hwmods = "i2c3"; 345279377Simp }; 346279377Simp 347279377Simp mailbox: mailbox@48094000 { 348279377Simp compatible = "ti,omap3-mailbox"; 349279377Simp ti,hwmods = "mailbox"; 350279377Simp reg = <0x48094000 0x200>; 351279377Simp interrupts = <26>; 352279377Simp #mbox-cells = <1>; 353279377Simp ti,mbox-num-users = <2>; 354279377Simp ti,mbox-num-fifos = <2>; 355279377Simp mbox_dsp: dsp { 356279377Simp ti,mbox-tx = <0 0 0>; 357279377Simp ti,mbox-rx = <1 0 0>; 358279377Simp }; 359279377Simp }; 360279377Simp 361279377Simp mcspi1: spi@48098000 { 362279377Simp compatible = "ti,omap2-mcspi"; 363279377Simp reg = <0x48098000 0x100>; 364279377Simp interrupts = <65>; 365279377Simp #address-cells = <1>; 366279377Simp #size-cells = <0>; 367279377Simp ti,hwmods = "mcspi1"; 368279377Simp ti,spi-num-cs = <4>; 369279377Simp dmas = <&sdma 35>, 370279377Simp <&sdma 36>, 371279377Simp <&sdma 37>, 372279377Simp <&sdma 38>, 373279377Simp <&sdma 39>, 374279377Simp <&sdma 40>, 375279377Simp <&sdma 41>, 376279377Simp <&sdma 42>; 377279377Simp dma-names = "tx0", "rx0", "tx1", "rx1", 378279377Simp "tx2", "rx2", "tx3", "rx3"; 379279377Simp }; 380279377Simp 381279377Simp mcspi2: spi@4809a000 { 382279377Simp compatible = "ti,omap2-mcspi"; 383279377Simp reg = <0x4809a000 0x100>; 384279377Simp interrupts = <66>; 385279377Simp #address-cells = <1>; 386279377Simp #size-cells = <0>; 387279377Simp ti,hwmods = "mcspi2"; 388279377Simp ti,spi-num-cs = <2>; 389279377Simp dmas = <&sdma 43>, 390279377Simp <&sdma 44>, 391279377Simp <&sdma 45>, 392279377Simp <&sdma 46>; 393279377Simp dma-names = "tx0", "rx0", "tx1", "rx1"; 394279377Simp }; 395279377Simp 396279377Simp mcspi3: spi@480b8000 { 397279377Simp compatible = "ti,omap2-mcspi"; 398279377Simp reg = <0x480b8000 0x100>; 399279377Simp interrupts = <91>; 400279377Simp #address-cells = <1>; 401279377Simp #size-cells = <0>; 402279377Simp ti,hwmods = "mcspi3"; 403279377Simp ti,spi-num-cs = <2>; 404279377Simp dmas = <&sdma 15>, 405279377Simp <&sdma 16>, 406279377Simp <&sdma 23>, 407279377Simp <&sdma 24>; 408279377Simp dma-names = "tx0", "rx0", "tx1", "rx1"; 409279377Simp }; 410279377Simp 411279377Simp mcspi4: spi@480ba000 { 412279377Simp compatible = "ti,omap2-mcspi"; 413279377Simp reg = <0x480ba000 0x100>; 414279377Simp interrupts = <48>; 415279377Simp #address-cells = <1>; 416279377Simp #size-cells = <0>; 417279377Simp ti,hwmods = "mcspi4"; 418279377Simp ti,spi-num-cs = <1>; 419279377Simp dmas = <&sdma 70>, <&sdma 71>; 420279377Simp dma-names = "tx0", "rx0"; 421279377Simp }; 422279377Simp 423279377Simp hdqw1w: 1w@480b2000 { 424279377Simp compatible = "ti,omap3-1w"; 425279377Simp reg = <0x480b2000 0x1000>; 426279377Simp interrupts = <58>; 427279377Simp ti,hwmods = "hdq1w"; 428279377Simp }; 429279377Simp 430279377Simp mmc1: mmc@4809c000 { 431279377Simp compatible = "ti,omap3-hsmmc"; 432279377Simp reg = <0x4809c000 0x200>; 433279377Simp interrupts = <83>; 434279377Simp ti,hwmods = "mmc1"; 435279377Simp ti,dual-volt; 436279377Simp dmas = <&sdma 61>, <&sdma 62>; 437279377Simp dma-names = "tx", "rx"; 438279377Simp pbias-supply = <&pbias_mmc_reg>; 439279377Simp }; 440279377Simp 441279377Simp mmc2: mmc@480b4000 { 442279377Simp compatible = "ti,omap3-hsmmc"; 443279377Simp reg = <0x480b4000 0x200>; 444279377Simp interrupts = <86>; 445279377Simp ti,hwmods = "mmc2"; 446279377Simp dmas = <&sdma 47>, <&sdma 48>; 447279377Simp dma-names = "tx", "rx"; 448279377Simp }; 449279377Simp 450279377Simp mmc3: mmc@480ad000 { 451279377Simp compatible = "ti,omap3-hsmmc"; 452279377Simp reg = <0x480ad000 0x200>; 453279377Simp interrupts = <94>; 454279377Simp ti,hwmods = "mmc3"; 455279377Simp dmas = <&sdma 77>, <&sdma 78>; 456279377Simp dma-names = "tx", "rx"; 457279377Simp }; 458279377Simp 459279377Simp mmu_isp: mmu@480bd400 { 460295436Sandrew #iommu-cells = <0>; 461279377Simp compatible = "ti,omap2-iommu"; 462279377Simp reg = <0x480bd400 0x80>; 463279377Simp interrupts = <24>; 464279377Simp ti,hwmods = "mmu_isp"; 465279377Simp ti,#tlb-entries = <8>; 466279377Simp }; 467279377Simp 468279377Simp mmu_iva: mmu@5d000000 { 469295436Sandrew #iommu-cells = <0>; 470279377Simp compatible = "ti,omap2-iommu"; 471279377Simp reg = <0x5d000000 0x80>; 472279377Simp interrupts = <28>; 473279377Simp ti,hwmods = "mmu_iva"; 474279377Simp status = "disabled"; 475279377Simp }; 476279377Simp 477279377Simp wdt2: wdt@48314000 { 478279377Simp compatible = "ti,omap3-wdt"; 479279377Simp reg = <0x48314000 0x80>; 480279377Simp ti,hwmods = "wd_timer2"; 481279377Simp }; 482279377Simp 483279377Simp mcbsp1: mcbsp@48074000 { 484279377Simp compatible = "ti,omap3-mcbsp"; 485279377Simp reg = <0x48074000 0xff>; 486279377Simp reg-names = "mpu"; 487279377Simp interrupts = <16>, /* OCP compliant interrupt */ 488279377Simp <59>, /* TX interrupt */ 489279377Simp <60>; /* RX interrupt */ 490279377Simp interrupt-names = "common", "tx", "rx"; 491279377Simp ti,buffer-size = <128>; 492279377Simp ti,hwmods = "mcbsp1"; 493279377Simp dmas = <&sdma 31>, 494279377Simp <&sdma 32>; 495279377Simp dma-names = "tx", "rx"; 496279377Simp status = "disabled"; 497279377Simp }; 498279377Simp 499279377Simp mcbsp2: mcbsp@49022000 { 500279377Simp compatible = "ti,omap3-mcbsp"; 501279377Simp reg = <0x49022000 0xff>, 502279377Simp <0x49028000 0xff>; 503279377Simp reg-names = "mpu", "sidetone"; 504279377Simp interrupts = <17>, /* OCP compliant interrupt */ 505279377Simp <62>, /* TX interrupt */ 506279377Simp <63>, /* RX interrupt */ 507279377Simp <4>; /* Sidetone */ 508279377Simp interrupt-names = "common", "tx", "rx", "sidetone"; 509279377Simp ti,buffer-size = <1280>; 510279377Simp ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; 511279377Simp dmas = <&sdma 33>, 512279377Simp <&sdma 34>; 513279377Simp dma-names = "tx", "rx"; 514279377Simp status = "disabled"; 515279377Simp }; 516279377Simp 517279377Simp mcbsp3: mcbsp@49024000 { 518279377Simp compatible = "ti,omap3-mcbsp"; 519279377Simp reg = <0x49024000 0xff>, 520279377Simp <0x4902a000 0xff>; 521279377Simp reg-names = "mpu", "sidetone"; 522279377Simp interrupts = <22>, /* OCP compliant interrupt */ 523279377Simp <89>, /* TX interrupt */ 524279377Simp <90>, /* RX interrupt */ 525279377Simp <5>; /* Sidetone */ 526279377Simp interrupt-names = "common", "tx", "rx", "sidetone"; 527279377Simp ti,buffer-size = <128>; 528279377Simp ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; 529279377Simp dmas = <&sdma 17>, 530279377Simp <&sdma 18>; 531279377Simp dma-names = "tx", "rx"; 532279377Simp status = "disabled"; 533279377Simp }; 534279377Simp 535279377Simp mcbsp4: mcbsp@49026000 { 536279377Simp compatible = "ti,omap3-mcbsp"; 537279377Simp reg = <0x49026000 0xff>; 538279377Simp reg-names = "mpu"; 539279377Simp interrupts = <23>, /* OCP compliant interrupt */ 540279377Simp <54>, /* TX interrupt */ 541279377Simp <55>; /* RX interrupt */ 542279377Simp interrupt-names = "common", "tx", "rx"; 543279377Simp ti,buffer-size = <128>; 544279377Simp ti,hwmods = "mcbsp4"; 545279377Simp dmas = <&sdma 19>, 546279377Simp <&sdma 20>; 547279377Simp dma-names = "tx", "rx"; 548279377Simp status = "disabled"; 549279377Simp }; 550279377Simp 551279377Simp mcbsp5: mcbsp@48096000 { 552279377Simp compatible = "ti,omap3-mcbsp"; 553279377Simp reg = <0x48096000 0xff>; 554279377Simp reg-names = "mpu"; 555279377Simp interrupts = <27>, /* OCP compliant interrupt */ 556279377Simp <81>, /* TX interrupt */ 557279377Simp <82>; /* RX interrupt */ 558279377Simp interrupt-names = "common", "tx", "rx"; 559279377Simp ti,buffer-size = <128>; 560279377Simp ti,hwmods = "mcbsp5"; 561279377Simp dmas = <&sdma 21>, 562279377Simp <&sdma 22>; 563279377Simp dma-names = "tx", "rx"; 564279377Simp status = "disabled"; 565279377Simp }; 566279377Simp 567279377Simp sham: sham@480c3000 { 568279377Simp compatible = "ti,omap3-sham"; 569279377Simp ti,hwmods = "sham"; 570279377Simp reg = <0x480c3000 0x64>; 571279377Simp interrupts = <49>; 572295436Sandrew dmas = <&sdma 69>; 573295436Sandrew dma-names = "rx"; 574279377Simp }; 575279377Simp 576279377Simp smartreflex_core: smartreflex@480cb000 { 577279377Simp compatible = "ti,omap3-smartreflex-core"; 578279377Simp ti,hwmods = "smartreflex_core"; 579279377Simp reg = <0x480cb000 0x400>; 580279377Simp interrupts = <19>; 581279377Simp }; 582279377Simp 583279377Simp smartreflex_mpu_iva: smartreflex@480c9000 { 584279377Simp compatible = "ti,omap3-smartreflex-iva"; 585279377Simp ti,hwmods = "smartreflex_mpu_iva"; 586279377Simp reg = <0x480c9000 0x400>; 587279377Simp interrupts = <18>; 588279377Simp }; 589279377Simp 590279377Simp timer1: timer@48318000 { 591279377Simp compatible = "ti,omap3430-timer"; 592279377Simp reg = <0x48318000 0x400>; 593279377Simp interrupts = <37>; 594279377Simp ti,hwmods = "timer1"; 595279377Simp ti,timer-alwon; 596279377Simp }; 597279377Simp 598279377Simp timer2: timer@49032000 { 599279377Simp compatible = "ti,omap3430-timer"; 600279377Simp reg = <0x49032000 0x400>; 601279377Simp interrupts = <38>; 602279377Simp ti,hwmods = "timer2"; 603279377Simp }; 604279377Simp 605279377Simp timer3: timer@49034000 { 606279377Simp compatible = "ti,omap3430-timer"; 607279377Simp reg = <0x49034000 0x400>; 608279377Simp interrupts = <39>; 609279377Simp ti,hwmods = "timer3"; 610279377Simp }; 611279377Simp 612279377Simp timer4: timer@49036000 { 613279377Simp compatible = "ti,omap3430-timer"; 614279377Simp reg = <0x49036000 0x400>; 615279377Simp interrupts = <40>; 616279377Simp ti,hwmods = "timer4"; 617279377Simp }; 618279377Simp 619279377Simp timer5: timer@49038000 { 620279377Simp compatible = "ti,omap3430-timer"; 621279377Simp reg = <0x49038000 0x400>; 622279377Simp interrupts = <41>; 623279377Simp ti,hwmods = "timer5"; 624279377Simp ti,timer-dsp; 625279377Simp }; 626279377Simp 627279377Simp timer6: timer@4903a000 { 628279377Simp compatible = "ti,omap3430-timer"; 629279377Simp reg = <0x4903a000 0x400>; 630279377Simp interrupts = <42>; 631279377Simp ti,hwmods = "timer6"; 632279377Simp ti,timer-dsp; 633279377Simp }; 634279377Simp 635279377Simp timer7: timer@4903c000 { 636279377Simp compatible = "ti,omap3430-timer"; 637279377Simp reg = <0x4903c000 0x400>; 638279377Simp interrupts = <43>; 639279377Simp ti,hwmods = "timer7"; 640279377Simp ti,timer-dsp; 641279377Simp }; 642279377Simp 643279377Simp timer8: timer@4903e000 { 644279377Simp compatible = "ti,omap3430-timer"; 645279377Simp reg = <0x4903e000 0x400>; 646279377Simp interrupts = <44>; 647279377Simp ti,hwmods = "timer8"; 648279377Simp ti,timer-pwm; 649279377Simp ti,timer-dsp; 650279377Simp }; 651279377Simp 652279377Simp timer9: timer@49040000 { 653279377Simp compatible = "ti,omap3430-timer"; 654279377Simp reg = <0x49040000 0x400>; 655279377Simp interrupts = <45>; 656279377Simp ti,hwmods = "timer9"; 657279377Simp ti,timer-pwm; 658279377Simp }; 659279377Simp 660279377Simp timer10: timer@48086000 { 661279377Simp compatible = "ti,omap3430-timer"; 662279377Simp reg = <0x48086000 0x400>; 663279377Simp interrupts = <46>; 664279377Simp ti,hwmods = "timer10"; 665279377Simp ti,timer-pwm; 666279377Simp }; 667279377Simp 668279377Simp timer11: timer@48088000 { 669279377Simp compatible = "ti,omap3430-timer"; 670279377Simp reg = <0x48088000 0x400>; 671279377Simp interrupts = <47>; 672279377Simp ti,hwmods = "timer11"; 673279377Simp ti,timer-pwm; 674279377Simp }; 675279377Simp 676279377Simp timer12: timer@48304000 { 677279377Simp compatible = "ti,omap3430-timer"; 678279377Simp reg = <0x48304000 0x400>; 679279377Simp interrupts = <95>; 680279377Simp ti,hwmods = "timer12"; 681279377Simp ti,timer-alwon; 682279377Simp ti,timer-secure; 683279377Simp }; 684279377Simp 685279377Simp usbhstll: usbhstll@48062000 { 686279377Simp compatible = "ti,usbhs-tll"; 687279377Simp reg = <0x48062000 0x1000>; 688279377Simp interrupts = <78>; 689279377Simp ti,hwmods = "usb_tll_hs"; 690279377Simp }; 691279377Simp 692279377Simp usbhshost: usbhshost@48064000 { 693279377Simp compatible = "ti,usbhs-host"; 694279377Simp reg = <0x48064000 0x400>; 695279377Simp ti,hwmods = "usb_host_hs"; 696279377Simp #address-cells = <1>; 697279377Simp #size-cells = <1>; 698279377Simp ranges; 699279377Simp 700279377Simp usbhsohci: ohci@48064400 { 701279377Simp compatible = "ti,ohci-omap3"; 702279377Simp reg = <0x48064400 0x400>; 703279377Simp interrupt-parent = <&intc>; 704279377Simp interrupts = <76>; 705279377Simp }; 706279377Simp 707279377Simp usbhsehci: ehci@48064800 { 708279377Simp compatible = "ti,ehci-omap"; 709279377Simp reg = <0x48064800 0x400>; 710279377Simp interrupt-parent = <&intc>; 711279377Simp interrupts = <77>; 712279377Simp }; 713279377Simp }; 714279377Simp 715279377Simp gpmc: gpmc@6e000000 { 716279377Simp compatible = "ti,omap3430-gpmc"; 717279377Simp ti,hwmods = "gpmc"; 718279377Simp reg = <0x6e000000 0x02d0>; 719279377Simp interrupts = <20>; 720295436Sandrew dmas = <&sdma 4>; 721295436Sandrew dma-names = "rxtx"; 722279377Simp gpmc,num-cs = <8>; 723279377Simp gpmc,num-waitpins = <4>; 724279377Simp #address-cells = <2>; 725279377Simp #size-cells = <1>; 726279377Simp }; 727279377Simp 728279377Simp usb_otg_hs: usb_otg_hs@480ab000 { 729279377Simp compatible = "ti,omap3-musb"; 730279377Simp reg = <0x480ab000 0x1000>; 731279377Simp interrupts = <92>, <93>; 732279377Simp interrupt-names = "mc", "dma"; 733279377Simp ti,hwmods = "usb_otg_hs"; 734279377Simp multipoint = <1>; 735279377Simp num-eps = <16>; 736279377Simp ram-bits = <12>; 737279377Simp }; 738279377Simp 739279377Simp dss: dss@48050000 { 740279377Simp compatible = "ti,omap3-dss"; 741279377Simp reg = <0x48050000 0x200>; 742279377Simp status = "disabled"; 743279377Simp ti,hwmods = "dss_core"; 744279377Simp clocks = <&dss1_alwon_fck>; 745279377Simp clock-names = "fck"; 746279377Simp #address-cells = <1>; 747279377Simp #size-cells = <1>; 748279377Simp ranges; 749279377Simp 750279377Simp dispc@48050400 { 751279377Simp compatible = "ti,omap3-dispc"; 752279377Simp reg = <0x48050400 0x400>; 753279377Simp interrupts = <25>; 754279377Simp ti,hwmods = "dss_dispc"; 755279377Simp clocks = <&dss1_alwon_fck>; 756279377Simp clock-names = "fck"; 757279377Simp }; 758279377Simp 759279377Simp dsi: encoder@4804fc00 { 760279377Simp compatible = "ti,omap3-dsi"; 761279377Simp reg = <0x4804fc00 0x200>, 762279377Simp <0x4804fe00 0x40>, 763279377Simp <0x4804ff00 0x20>; 764279377Simp reg-names = "proto", "phy", "pll"; 765279377Simp interrupts = <25>; 766279377Simp status = "disabled"; 767279377Simp ti,hwmods = "dss_dsi1"; 768279377Simp clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>; 769279377Simp clock-names = "fck", "sys_clk"; 770279377Simp }; 771279377Simp 772279377Simp rfbi: encoder@48050800 { 773279377Simp compatible = "ti,omap3-rfbi"; 774279377Simp reg = <0x48050800 0x100>; 775279377Simp status = "disabled"; 776279377Simp ti,hwmods = "dss_rfbi"; 777279377Simp clocks = <&dss1_alwon_fck>, <&dss_ick>; 778279377Simp clock-names = "fck", "ick"; 779279377Simp }; 780279377Simp 781279377Simp venc: encoder@48050c00 { 782279377Simp compatible = "ti,omap3-venc"; 783279377Simp reg = <0x48050c00 0x100>; 784279377Simp status = "disabled"; 785279377Simp ti,hwmods = "dss_venc"; 786279377Simp clocks = <&dss_tv_fck>; 787279377Simp clock-names = "fck"; 788279377Simp }; 789279377Simp }; 790279377Simp 791279377Simp ssi: ssi-controller@48058000 { 792279377Simp compatible = "ti,omap3-ssi"; 793279377Simp ti,hwmods = "ssi"; 794279377Simp 795279377Simp status = "disabled"; 796279377Simp 797279377Simp reg = <0x48058000 0x1000>, 798279377Simp <0x48059000 0x1000>; 799279377Simp reg-names = "sys", 800279377Simp "gdd"; 801279377Simp 802279377Simp interrupts = <71>; 803279377Simp interrupt-names = "gdd_mpu"; 804279377Simp 805279377Simp #address-cells = <1>; 806279377Simp #size-cells = <1>; 807279377Simp ranges; 808279377Simp 809279377Simp ssi_port1: ssi-port@4805a000 { 810279377Simp compatible = "ti,omap3-ssi-port"; 811279377Simp 812279377Simp reg = <0x4805a000 0x800>, 813279377Simp <0x4805a800 0x800>; 814279377Simp reg-names = "tx", 815279377Simp "rx"; 816279377Simp 817279377Simp interrupt-parent = <&intc>; 818279377Simp interrupts = <67>, 819279377Simp <68>; 820279377Simp }; 821279377Simp 822279377Simp ssi_port2: ssi-port@4805b000 { 823279377Simp compatible = "ti,omap3-ssi-port"; 824279377Simp 825279377Simp reg = <0x4805b000 0x800>, 826279377Simp <0x4805b800 0x800>; 827279377Simp reg-names = "tx", 828279377Simp "rx"; 829279377Simp 830279377Simp interrupt-parent = <&intc>; 831279377Simp interrupts = <69>, 832279377Simp <70>; 833279377Simp }; 834279377Simp }; 835279377Simp }; 836279377Simp}; 837279377Simp 838279377Simp/include/ "omap3xxx-clocks.dtsi" 839