1295011Sandrew/* 2295011Sandrew * Copyright 2015 Endless Mobile, Inc. 3295011Sandrew * Author: Carlo Caione <carlo@endlessm.com> 4295011Sandrew * 5295011Sandrew * This file is dual-licensed: you can use it either under the terms 6295011Sandrew * of the GPL or the X11 license, at your option. Note that this dual 7295011Sandrew * licensing only applies to this file, and not this project as a 8295011Sandrew * whole. 9295011Sandrew * 10295011Sandrew * a) This library is free software; you can redistribute it and/or 11295011Sandrew * modify it under the terms of the GNU General Public License as 12295011Sandrew * published by the Free Software Foundation; either version 2 of the 13295011Sandrew * License, or (at your option) any later version. 14295011Sandrew * 15295011Sandrew * This library is distributed in the hope that it will be useful, 16295011Sandrew * but WITHOUT ANY WARRANTY; without even the implied warranty of 17295011Sandrew * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18295011Sandrew * GNU General Public License for more details. 19295011Sandrew * 20295011Sandrew * You should have received a copy of the GNU General Public License 21295011Sandrew * along with this program. If not, see <http://www.gnu.org/licenses/>. 22295011Sandrew * 23295011Sandrew * Or, alternatively, 24295011Sandrew * 25295011Sandrew * b) Permission is hereby granted, free of charge, to any person 26295011Sandrew * obtaining a copy of this software and associated documentation 27295011Sandrew * files (the "Software"), to deal in the Software without 28295011Sandrew * restriction, including without limitation the rights to use, 29295011Sandrew * copy, modify, merge, publish, distribute, sublicense, and/or 30295011Sandrew * sell copies of the Software, and to permit persons to whom the 31295011Sandrew * Software is furnished to do so, subject to the following 32295011Sandrew * conditions: 33295011Sandrew * 34295011Sandrew * The above copyright notice and this permission notice shall be 35295011Sandrew * included in all copies or substantial portions of the Software. 36295011Sandrew * 37295011Sandrew * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 38295011Sandrew * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 39295011Sandrew * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40295011Sandrew * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 41295011Sandrew * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 42295011Sandrew * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 43295011Sandrew * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 44295011Sandrew * OTHER DEALINGS IN THE SOFTWARE. 45295011Sandrew */ 46295011Sandrew 47295011Sandrew#include <dt-bindings/clock/meson8b-clkc.h> 48295011Sandrew#include <dt-bindings/gpio/meson8b-gpio.h> 49295011Sandrew#include "skeleton.dtsi" 50295011Sandrew 51295011Sandrew/ { 52295011Sandrew interrupt-parent = <&gic>; 53295011Sandrew 54295011Sandrew cpus { 55295011Sandrew #address-cells = <1>; 56295011Sandrew #size-cells = <0>; 57295011Sandrew 58295011Sandrew cpu@200 { 59295011Sandrew device_type = "cpu"; 60295011Sandrew compatible = "arm,cortex-a5"; 61295011Sandrew next-level-cache = <&L2>; 62295011Sandrew reg = <0x200>; 63295011Sandrew }; 64295011Sandrew 65295011Sandrew cpu@201 { 66295011Sandrew device_type = "cpu"; 67295011Sandrew compatible = "arm,cortex-a5"; 68295011Sandrew next-level-cache = <&L2>; 69295011Sandrew reg = <0x201>; 70295011Sandrew }; 71295011Sandrew 72295011Sandrew cpu@202 { 73295011Sandrew device_type = "cpu"; 74295011Sandrew compatible = "arm,cortex-a5"; 75295011Sandrew next-level-cache = <&L2>; 76295011Sandrew reg = <0x202>; 77295011Sandrew }; 78295011Sandrew 79295011Sandrew cpu@203 { 80295011Sandrew device_type = "cpu"; 81295011Sandrew compatible = "arm,cortex-a5"; 82295011Sandrew next-level-cache = <&L2>; 83295011Sandrew reg = <0x203>; 84295011Sandrew }; 85295011Sandrew }; 86295011Sandrew 87295011Sandrew soc { 88295011Sandrew compatible = "simple-bus"; 89295011Sandrew #address-cells = <1>; 90295011Sandrew #size-cells = <1>; 91295011Sandrew ranges; 92295011Sandrew 93295011Sandrew L2: l2-cache-controller@c4200000 { 94295011Sandrew compatible = "arm,pl310-cache"; 95295011Sandrew reg = <0xc4200000 0x1000>; 96295011Sandrew cache-unified; 97295011Sandrew cache-level = <2>; 98295011Sandrew }; 99295011Sandrew 100295011Sandrew gic: interrupt-controller@c4301000 { 101295011Sandrew compatible = "arm,cortex-a9-gic"; 102295011Sandrew reg = <0xc4301000 0x1000>, 103295011Sandrew <0xc4300100 0x0100>; 104295011Sandrew interrupt-controller; 105295011Sandrew #interrupt-cells = <3>; 106295011Sandrew }; 107295011Sandrew 108295011Sandrew wdt: watchdog@c1109900 { 109295011Sandrew compatible = "amlogic,meson8b-wdt"; 110295011Sandrew reg = <0xc1109900 0x8>; 111295011Sandrew interrupts = <0 0 1>; 112295011Sandrew }; 113295011Sandrew 114295011Sandrew timer@c1109940 { 115295011Sandrew compatible = "amlogic,meson6-timer"; 116295011Sandrew reg = <0xc1109940 0x18>; 117295011Sandrew interrupts = <0 10 1>; 118295011Sandrew }; 119295011Sandrew 120295011Sandrew uart_AO: serial@c81004c0 { 121295011Sandrew compatible = "amlogic,meson-uart"; 122295011Sandrew reg = <0xc81004c0 0x18>; 123295011Sandrew interrupts = <0 90 1>; 124295011Sandrew clocks = <&clkc CLKID_CLK81>; 125295011Sandrew status = "disabled"; 126295011Sandrew }; 127295011Sandrew 128295011Sandrew uart_A: serial@c11084c0 { 129295011Sandrew compatible = "amlogic,meson-uart"; 130295011Sandrew reg = <0xc11084c0 0x18>; 131295011Sandrew interrupts = <0 26 1>; 132295011Sandrew clocks = <&clkc CLKID_CLK81>; 133295011Sandrew status = "disabled"; 134295011Sandrew }; 135295011Sandrew 136295011Sandrew uart_B: serial@c11084dc { 137295011Sandrew compatible = "amlogic,meson-uart"; 138295011Sandrew reg = <0xc11084dc 0x18>; 139295011Sandrew interrupts = <0 75 1>; 140295011Sandrew clocks = <&clkc CLKID_CLK81>; 141295011Sandrew status = "disabled"; 142295011Sandrew }; 143295011Sandrew 144295011Sandrew uart_C: serial@c1108700 { 145295011Sandrew compatible = "amlogic,meson-uart"; 146295011Sandrew reg = <0xc1108700 0x18>; 147295011Sandrew interrupts = <0 93 1>; 148295011Sandrew clocks = <&clkc CLKID_CLK81>; 149295011Sandrew status = "disabled"; 150295011Sandrew }; 151295011Sandrew 152295011Sandrew clkc: clock-controller@c1104000 { 153295011Sandrew #clock-cells = <1>; 154295011Sandrew compatible = "amlogic,meson8b-clkc"; 155295011Sandrew reg = <0xc1108000 0x4>, <0xc1104000 0x460>; 156295011Sandrew }; 157295011Sandrew 158295011Sandrew pinctrl: pinctrl@c1109880 { 159295011Sandrew compatible = "amlogic,meson8b-pinctrl"; 160295011Sandrew reg = <0xc1109880 0x10>; 161295011Sandrew #address-cells = <1>; 162295011Sandrew #size-cells = <1>; 163295011Sandrew ranges; 164295011Sandrew 165295011Sandrew gpio: banks@c11080b0 { 166295011Sandrew reg = <0xc11080b0 0x28>, 167295011Sandrew <0xc11080e8 0x18>, 168295011Sandrew <0xc1108120 0x18>, 169295011Sandrew <0xc1108030 0x38>; 170295011Sandrew reg-names = "mux", "pull", "pull-enable", "gpio"; 171295011Sandrew gpio-controller; 172295011Sandrew #gpio-cells = <2>; 173295011Sandrew }; 174295011Sandrew 175295011Sandrew gpio_ao: ao-bank@c1108030 { 176295011Sandrew reg = <0xc8100014 0x4>, 177295011Sandrew <0xc810002c 0x4>, 178295011Sandrew <0xc8100024 0x8>; 179295011Sandrew reg-names = "mux", "pull", "gpio"; 180295011Sandrew gpio-controller; 181295011Sandrew #gpio-cells = <2>; 182295011Sandrew }; 183295011Sandrew 184295011Sandrew uart_ao_a_pins: uart_ao_a { 185295011Sandrew mux { 186295011Sandrew groups = "uart_tx_ao_a", "uart_rx_ao_a"; 187295011Sandrew function = "uart_ao"; 188295011Sandrew }; 189295011Sandrew }; 190295011Sandrew }; 191295011Sandrew }; 192295011Sandrew}; /* end of / */ 193