1/* 2 * Copyright 2015 Endless Mobile, Inc. 3 * Author: Carlo Caione <carlo@endlessm.com> 4 * 5 * This file is dual-licensed: you can use it either under the terms 6 * of the GPL or the X11 license, at your option. Note that this dual 7 * licensing only applies to this file, and not this project as a 8 * whole. 9 * 10 * a) This library is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of the 13 * License, or (at your option) any later version. 14 * 15 * This library is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program. If not, see <http://www.gnu.org/licenses/>. 22 * 23 * Or, alternatively, 24 * 25 * b) Permission is hereby granted, free of charge, to any person 26 * obtaining a copy of this software and associated documentation 27 * files (the "Software"), to deal in the Software without 28 * restriction, including without limitation the rights to use, 29 * copy, modify, merge, publish, distribute, sublicense, and/or 30 * sell copies of the Software, and to permit persons to whom the 31 * Software is furnished to do so, subject to the following 32 * conditions: 33 * 34 * The above copyright notice and this permission notice shall be 35 * included in all copies or substantial portions of the Software. 36 * 37 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 38 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 39 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 40 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 41 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 42 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 43 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 44 * OTHER DEALINGS IN THE SOFTWARE. 45 */ 46 47#include <dt-bindings/clock/meson8b-clkc.h> 48#include <dt-bindings/gpio/meson8b-gpio.h> 49#include "skeleton.dtsi" 50 51/ { 52 interrupt-parent = <&gic>; 53 54 cpus { 55 #address-cells = <1>; 56 #size-cells = <0>; 57 58 cpu@200 { 59 device_type = "cpu"; 60 compatible = "arm,cortex-a5"; 61 next-level-cache = <&L2>; 62 reg = <0x200>; 63 }; 64 65 cpu@201 { 66 device_type = "cpu"; 67 compatible = "arm,cortex-a5"; 68 next-level-cache = <&L2>; 69 reg = <0x201>; 70 }; 71 72 cpu@202 { 73 device_type = "cpu"; 74 compatible = "arm,cortex-a5"; 75 next-level-cache = <&L2>; 76 reg = <0x202>; 77 }; 78 79 cpu@203 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a5"; 82 next-level-cache = <&L2>; 83 reg = <0x203>; 84 }; 85 }; 86 87 soc { 88 compatible = "simple-bus"; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 ranges; 92 93 L2: l2-cache-controller@c4200000 { 94 compatible = "arm,pl310-cache"; 95 reg = <0xc4200000 0x1000>; 96 cache-unified; 97 cache-level = <2>; 98 }; 99 100 gic: interrupt-controller@c4301000 { 101 compatible = "arm,cortex-a9-gic"; 102 reg = <0xc4301000 0x1000>, 103 <0xc4300100 0x0100>; 104 interrupt-controller; 105 #interrupt-cells = <3>; 106 }; 107 108 wdt: watchdog@c1109900 { 109 compatible = "amlogic,meson8b-wdt"; 110 reg = <0xc1109900 0x8>; 111 interrupts = <0 0 1>; 112 }; 113 114 timer@c1109940 { 115 compatible = "amlogic,meson6-timer"; 116 reg = <0xc1109940 0x18>; 117 interrupts = <0 10 1>; 118 }; 119 120 uart_AO: serial@c81004c0 { 121 compatible = "amlogic,meson-uart"; 122 reg = <0xc81004c0 0x18>; 123 interrupts = <0 90 1>; 124 clocks = <&clkc CLKID_CLK81>; 125 status = "disabled"; 126 }; 127 128 uart_A: serial@c11084c0 { 129 compatible = "amlogic,meson-uart"; 130 reg = <0xc11084c0 0x18>; 131 interrupts = <0 26 1>; 132 clocks = <&clkc CLKID_CLK81>; 133 status = "disabled"; 134 }; 135 136 uart_B: serial@c11084dc { 137 compatible = "amlogic,meson-uart"; 138 reg = <0xc11084dc 0x18>; 139 interrupts = <0 75 1>; 140 clocks = <&clkc CLKID_CLK81>; 141 status = "disabled"; 142 }; 143 144 uart_C: serial@c1108700 { 145 compatible = "amlogic,meson-uart"; 146 reg = <0xc1108700 0x18>; 147 interrupts = <0 93 1>; 148 clocks = <&clkc CLKID_CLK81>; 149 status = "disabled"; 150 }; 151 152 clkc: clock-controller@c1104000 { 153 #clock-cells = <1>; 154 compatible = "amlogic,meson8b-clkc"; 155 reg = <0xc1108000 0x4>, <0xc1104000 0x460>; 156 }; 157 158 pinctrl: pinctrl@c1109880 { 159 compatible = "amlogic,meson8b-pinctrl"; 160 reg = <0xc1109880 0x10>; 161 #address-cells = <1>; 162 #size-cells = <1>; 163 ranges; 164 165 gpio: banks@c11080b0 { 166 reg = <0xc11080b0 0x28>, 167 <0xc11080e8 0x18>, 168 <0xc1108120 0x18>, 169 <0xc1108030 0x38>; 170 reg-names = "mux", "pull", "pull-enable", "gpio"; 171 gpio-controller; 172 #gpio-cells = <2>; 173 }; 174 175 gpio_ao: ao-bank@c1108030 { 176 reg = <0xc8100014 0x4>, 177 <0xc810002c 0x4>, 178 <0xc8100024 0x8>; 179 reg-names = "mux", "pull", "gpio"; 180 gpio-controller; 181 #gpio-cells = <2>; 182 }; 183 184 uart_ao_a_pins: uart_ao_a { 185 mux { 186 groups = "uart_tx_ao_a", "uart_rx_ao_a"; 187 function = "uart_ao"; 188 }; 189 }; 190 }; 191 }; 192}; /* end of / */ 193