1279377Simp/* 2279377Simp * Copyright 2013-2014 Freescale Semiconductor, Inc. 3279377Simp * 4279377Simp * This file is dual-licensed: you can use it either under the terms 5279377Simp * of the GPL or the X11 license, at your option. Note that this dual 6279377Simp * licensing only applies to this file, and not this project as a 7279377Simp * whole. 8279377Simp * 9279377Simp * a) This file is free software; you can redistribute it and/or 10279377Simp * modify it under the terms of the GNU General Public License as 11279377Simp * published by the Free Software Foundation; either version 2 of 12279377Simp * the License, or (at your option) any later version. 13279377Simp * 14279377Simp * This file is distributed in the hope that it will be useful, 15279377Simp * but WITHOUT ANY WARRANTY; without even the implied warranty of 16279377Simp * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17279377Simp * GNU General Public License for more details. 18279377Simp * 19279377Simp * You should have received a copy of the GNU General Public 20279377Simp * License along with this file; if not, write to the Free 21279377Simp * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22279377Simp * MA 02110-1301 USA 23279377Simp * 24279377Simp * Or, alternatively, 25279377Simp * 26279377Simp * b) Permission is hereby granted, free of charge, to any person 27279377Simp * obtaining a copy of this software and associated documentation 28279377Simp * files (the "Software"), to deal in the Software without 29279377Simp * restriction, including without limitation the rights to use, 30279377Simp * copy, modify, merge, publish, distribute, sublicense, and/or 31279377Simp * sell copies of the Software, and to permit persons to whom the 32279377Simp * Software is furnished to do so, subject to the following 33279377Simp * conditions: 34279377Simp * 35279377Simp * The above copyright notice and this permission notice shall be 36279377Simp * included in all copies or substantial portions of the Software. 37279377Simp * 38279377Simp * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39279377Simp * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40279377Simp * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41279377Simp * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42279377Simp * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43279377Simp * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44279377Simp * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45279377Simp * OTHER DEALINGS IN THE SOFTWARE. 46279377Simp */ 47279377Simp 48279377Simp#include "skeleton64.dtsi" 49279377Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 50279377Simp 51279377Simp/ { 52279377Simp compatible = "fsl,ls1021a"; 53279377Simp interrupt-parent = <&gic>; 54279377Simp 55279377Simp aliases { 56295436Sandrew crypto = &crypto; 57295436Sandrew ethernet0 = &enet0; 58295436Sandrew ethernet1 = &enet1; 59295436Sandrew ethernet2 = &enet2; 60279377Simp serial0 = &lpuart0; 61279377Simp serial1 = &lpuart1; 62279377Simp serial2 = &lpuart2; 63279377Simp serial3 = &lpuart3; 64279377Simp serial4 = &lpuart4; 65279377Simp serial5 = &lpuart5; 66279377Simp sysclk = &sysclk; 67279377Simp }; 68279377Simp 69279377Simp cpus { 70279377Simp #address-cells = <1>; 71279377Simp #size-cells = <0>; 72279377Simp 73279377Simp cpu@f00 { 74279377Simp compatible = "arm,cortex-a7"; 75279377Simp device_type = "cpu"; 76279377Simp reg = <0xf00>; 77279377Simp clocks = <&cluster1_clk>; 78279377Simp }; 79279377Simp 80279377Simp cpu@f01 { 81279377Simp compatible = "arm,cortex-a7"; 82279377Simp device_type = "cpu"; 83279377Simp reg = <0xf01>; 84279377Simp clocks = <&cluster1_clk>; 85279377Simp }; 86279377Simp }; 87279377Simp 88279377Simp timer { 89279377Simp compatible = "arm,armv7-timer"; 90279377Simp interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 91279377Simp <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 92279377Simp <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 93279377Simp <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 94279377Simp }; 95279377Simp 96279377Simp pmu { 97279377Simp compatible = "arm,cortex-a7-pmu"; 98279377Simp interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 99279377Simp <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 100279377Simp }; 101279377Simp 102279377Simp soc { 103279377Simp compatible = "simple-bus"; 104279377Simp #address-cells = <2>; 105279377Simp #size-cells = <2>; 106279377Simp device_type = "soc"; 107279377Simp interrupt-parent = <&gic>; 108279377Simp ranges; 109279377Simp 110279377Simp gic: interrupt-controller@1400000 { 111279377Simp compatible = "arm,cortex-a7-gic"; 112279377Simp #interrupt-cells = <3>; 113279377Simp interrupt-controller; 114279377Simp reg = <0x0 0x1401000 0x0 0x1000>, 115279377Simp <0x0 0x1402000 0x0 0x1000>, 116279377Simp <0x0 0x1404000 0x0 0x2000>, 117279377Simp <0x0 0x1406000 0x0 0x2000>; 118279377Simp interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 119279377Simp 120279377Simp }; 121279377Simp 122279377Simp ifc: ifc@1530000 { 123279377Simp compatible = "fsl,ifc", "simple-bus"; 124279377Simp reg = <0x0 0x1530000 0x0 0x10000>; 125279377Simp interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 126279377Simp }; 127279377Simp 128279377Simp dcfg: dcfg@1ee0000 { 129279377Simp compatible = "fsl,ls1021a-dcfg", "syscon"; 130279377Simp reg = <0x0 0x1ee0000 0x0 0x10000>; 131279377Simp big-endian; 132279377Simp }; 133279377Simp 134279377Simp esdhc: esdhc@1560000 { 135279377Simp compatible = "fsl,esdhc"; 136279377Simp reg = <0x0 0x1560000 0x0 0x10000>; 137279377Simp interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 138279377Simp clock-frequency = <0>; 139279377Simp voltage-ranges = <1800 1800 3300 3300>; 140279377Simp sdhci,auto-cmd12; 141279377Simp big-endian; 142279377Simp bus-width = <4>; 143279377Simp status = "disabled"; 144279377Simp }; 145279377Simp 146295436Sandrew sata: sata@3200000 { 147295436Sandrew compatible = "fsl,ls1021a-ahci"; 148295436Sandrew reg = <0x0 0x3200000 0x0 0x10000>, 149295436Sandrew <0x0 0x20220520 0x0 0x4>; 150295436Sandrew reg-names = "ahci", "sata-ecc"; 151295436Sandrew interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 152295436Sandrew clocks = <&platform_clk 1>; 153295436Sandrew dma-coherent; 154295436Sandrew status = "disabled"; 155295436Sandrew }; 156295436Sandrew 157279377Simp scfg: scfg@1570000 { 158279377Simp compatible = "fsl,ls1021a-scfg", "syscon"; 159279377Simp reg = <0x0 0x1570000 0x0 0x10000>; 160279377Simp big-endian; 161279377Simp }; 162279377Simp 163295436Sandrew crypto: crypto@1700000 { 164295436Sandrew compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; 165295436Sandrew fsl,sec-era = <7>; 166295436Sandrew #address-cells = <1>; 167295436Sandrew #size-cells = <1>; 168295436Sandrew reg = <0x0 0x1700000 0x0 0x100000>; 169295436Sandrew ranges = <0x0 0x0 0x1700000 0x100000>; 170295436Sandrew interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 171295436Sandrew 172295436Sandrew sec_jr0: jr@10000 { 173295436Sandrew compatible = "fsl,sec-v5.0-job-ring", 174295436Sandrew "fsl,sec-v4.0-job-ring"; 175295436Sandrew reg = <0x10000 0x10000>; 176295436Sandrew interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 177295436Sandrew }; 178295436Sandrew 179295436Sandrew sec_jr1: jr@20000 { 180295436Sandrew compatible = "fsl,sec-v5.0-job-ring", 181295436Sandrew "fsl,sec-v4.0-job-ring"; 182295436Sandrew reg = <0x20000 0x10000>; 183295436Sandrew interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 184295436Sandrew }; 185295436Sandrew 186295436Sandrew sec_jr2: jr@30000 { 187295436Sandrew compatible = "fsl,sec-v5.0-job-ring", 188295436Sandrew "fsl,sec-v4.0-job-ring"; 189295436Sandrew reg = <0x30000 0x10000>; 190295436Sandrew interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 191295436Sandrew }; 192295436Sandrew 193295436Sandrew sec_jr3: jr@40000 { 194295436Sandrew compatible = "fsl,sec-v5.0-job-ring", 195295436Sandrew "fsl,sec-v4.0-job-ring"; 196295436Sandrew reg = <0x40000 0x10000>; 197295436Sandrew interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 198295436Sandrew }; 199295436Sandrew 200295436Sandrew }; 201295436Sandrew 202279377Simp clockgen: clocking@1ee1000 { 203279377Simp #address-cells = <1>; 204279377Simp #size-cells = <1>; 205279377Simp ranges = <0x0 0x0 0x1ee1000 0x10000>; 206279377Simp 207279377Simp sysclk: sysclk { 208279377Simp compatible = "fixed-clock"; 209279377Simp #clock-cells = <0>; 210279377Simp clock-output-names = "sysclk"; 211279377Simp }; 212279377Simp 213279377Simp cga_pll1: pll@800 { 214279377Simp compatible = "fsl,qoriq-core-pll-2.0"; 215279377Simp #clock-cells = <1>; 216279377Simp reg = <0x800 0x10>; 217279377Simp clocks = <&sysclk>; 218279377Simp clock-output-names = "cga-pll1", "cga-pll1-div2", 219279377Simp "cga-pll1-div4"; 220279377Simp }; 221279377Simp 222279377Simp platform_clk: pll@c00 { 223279377Simp compatible = "fsl,qoriq-core-pll-2.0"; 224279377Simp #clock-cells = <1>; 225279377Simp reg = <0xc00 0x10>; 226279377Simp clocks = <&sysclk>; 227279377Simp clock-output-names = "platform-clk", "platform-clk-div2"; 228279377Simp }; 229279377Simp 230279377Simp cluster1_clk: clk0c0@0 { 231279377Simp compatible = "fsl,qoriq-core-mux-2.0"; 232279377Simp #clock-cells = <0>; 233279377Simp reg = <0x0 0x10>; 234279377Simp clock-names = "pll1cga", "pll1cga-div2", "pll1cga-div4"; 235279377Simp clocks = <&cga_pll1 0>, <&cga_pll1 1>, <&cga_pll1 2>; 236279377Simp clock-output-names = "cluster1-clk"; 237279377Simp }; 238279377Simp }; 239279377Simp 240279377Simp dspi0: dspi@2100000 { 241295436Sandrew compatible = "fsl,ls1021a-v1.0-dspi"; 242279377Simp #address-cells = <1>; 243279377Simp #size-cells = <0>; 244279377Simp reg = <0x0 0x2100000 0x0 0x10000>; 245279377Simp interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 246279377Simp clock-names = "dspi"; 247279377Simp clocks = <&platform_clk 1>; 248279377Simp spi-num-chipselects = <5>; 249279377Simp big-endian; 250279377Simp status = "disabled"; 251279377Simp }; 252279377Simp 253279377Simp dspi1: dspi@2110000 { 254295436Sandrew compatible = "fsl,ls1021a-v1.0-dspi"; 255279377Simp #address-cells = <1>; 256279377Simp #size-cells = <0>; 257279377Simp reg = <0x0 0x2110000 0x0 0x10000>; 258279377Simp interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 259279377Simp clock-names = "dspi"; 260279377Simp clocks = <&platform_clk 1>; 261279377Simp spi-num-chipselects = <5>; 262279377Simp big-endian; 263279377Simp status = "disabled"; 264279377Simp }; 265279377Simp 266279377Simp i2c0: i2c@2180000 { 267279377Simp compatible = "fsl,vf610-i2c"; 268279377Simp #address-cells = <1>; 269279377Simp #size-cells = <0>; 270279377Simp reg = <0x0 0x2180000 0x0 0x10000>; 271279377Simp interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; 272279377Simp clock-names = "i2c"; 273279377Simp clocks = <&platform_clk 1>; 274279377Simp status = "disabled"; 275279377Simp }; 276279377Simp 277279377Simp i2c1: i2c@2190000 { 278279377Simp compatible = "fsl,vf610-i2c"; 279279377Simp #address-cells = <1>; 280279377Simp #size-cells = <0>; 281279377Simp reg = <0x0 0x2190000 0x0 0x10000>; 282279377Simp interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 283279377Simp clock-names = "i2c"; 284279377Simp clocks = <&platform_clk 1>; 285279377Simp status = "disabled"; 286279377Simp }; 287279377Simp 288279377Simp i2c2: i2c@21a0000 { 289279377Simp compatible = "fsl,vf610-i2c"; 290279377Simp #address-cells = <1>; 291279377Simp #size-cells = <0>; 292279377Simp reg = <0x0 0x21a0000 0x0 0x10000>; 293279377Simp interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; 294279377Simp clock-names = "i2c"; 295279377Simp clocks = <&platform_clk 1>; 296279377Simp status = "disabled"; 297279377Simp }; 298279377Simp 299279377Simp uart0: serial@21c0500 { 300279377Simp compatible = "fsl,16550-FIFO64", "ns16550a"; 301279377Simp reg = <0x0 0x21c0500 0x0 0x100>; 302279377Simp interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 303279377Simp clock-frequency = <0>; 304279377Simp fifo-size = <15>; 305279377Simp status = "disabled"; 306279377Simp }; 307279377Simp 308279377Simp uart1: serial@21c0600 { 309279377Simp compatible = "fsl,16550-FIFO64", "ns16550a"; 310279377Simp reg = <0x0 0x21c0600 0x0 0x100>; 311279377Simp interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 312279377Simp clock-frequency = <0>; 313279377Simp fifo-size = <15>; 314279377Simp status = "disabled"; 315279377Simp }; 316279377Simp 317279377Simp uart2: serial@21d0500 { 318279377Simp compatible = "fsl,16550-FIFO64", "ns16550a"; 319279377Simp reg = <0x0 0x21d0500 0x0 0x100>; 320279377Simp interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 321279377Simp clock-frequency = <0>; 322279377Simp fifo-size = <15>; 323279377Simp status = "disabled"; 324279377Simp }; 325279377Simp 326279377Simp uart3: serial@21d0600 { 327279377Simp compatible = "fsl,16550-FIFO64", "ns16550a"; 328279377Simp reg = <0x0 0x21d0600 0x0 0x100>; 329279377Simp interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 330279377Simp clock-frequency = <0>; 331279377Simp fifo-size = <15>; 332279377Simp status = "disabled"; 333279377Simp }; 334279377Simp 335279377Simp lpuart0: serial@2950000 { 336279377Simp compatible = "fsl,ls1021a-lpuart"; 337279377Simp reg = <0x0 0x2950000 0x0 0x1000>; 338279377Simp interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 339279377Simp clocks = <&sysclk>; 340279377Simp clock-names = "ipg"; 341279377Simp status = "disabled"; 342279377Simp }; 343279377Simp 344279377Simp lpuart1: serial@2960000 { 345279377Simp compatible = "fsl,ls1021a-lpuart"; 346279377Simp reg = <0x0 0x2960000 0x0 0x1000>; 347279377Simp interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 348279377Simp clocks = <&platform_clk 1>; 349279377Simp clock-names = "ipg"; 350279377Simp status = "disabled"; 351279377Simp }; 352279377Simp 353279377Simp lpuart2: serial@2970000 { 354279377Simp compatible = "fsl,ls1021a-lpuart"; 355279377Simp reg = <0x0 0x2970000 0x0 0x1000>; 356279377Simp interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 357279377Simp clocks = <&platform_clk 1>; 358279377Simp clock-names = "ipg"; 359279377Simp status = "disabled"; 360279377Simp }; 361279377Simp 362279377Simp lpuart3: serial@2980000 { 363279377Simp compatible = "fsl,ls1021a-lpuart"; 364279377Simp reg = <0x0 0x2980000 0x0 0x1000>; 365279377Simp interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 366279377Simp clocks = <&platform_clk 1>; 367279377Simp clock-names = "ipg"; 368279377Simp status = "disabled"; 369279377Simp }; 370279377Simp 371279377Simp lpuart4: serial@2990000 { 372279377Simp compatible = "fsl,ls1021a-lpuart"; 373279377Simp reg = <0x0 0x2990000 0x0 0x1000>; 374279377Simp interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 375279377Simp clocks = <&platform_clk 1>; 376279377Simp clock-names = "ipg"; 377279377Simp status = "disabled"; 378279377Simp }; 379279377Simp 380279377Simp lpuart5: serial@29a0000 { 381279377Simp compatible = "fsl,ls1021a-lpuart"; 382279377Simp reg = <0x0 0x29a0000 0x0 0x1000>; 383279377Simp interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 384279377Simp clocks = <&platform_clk 1>; 385279377Simp clock-names = "ipg"; 386279377Simp status = "disabled"; 387279377Simp }; 388279377Simp 389279377Simp wdog0: watchdog@2ad0000 { 390279377Simp compatible = "fsl,imx21-wdt"; 391279377Simp reg = <0x0 0x2ad0000 0x0 0x10000>; 392279377Simp interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 393279377Simp clocks = <&platform_clk 1>; 394279377Simp clock-names = "wdog-en"; 395279377Simp big-endian; 396279377Simp }; 397279377Simp 398279377Simp sai1: sai@2b50000 { 399295436Sandrew #sound-dai-cells = <0>; 400279377Simp compatible = "fsl,vf610-sai"; 401279377Simp reg = <0x0 0x2b50000 0x0 0x10000>; 402279377Simp interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 403295436Sandrew clocks = <&platform_clk 1>, <&platform_clk 1>, 404295436Sandrew <&platform_clk 1>, <&platform_clk 1>; 405295436Sandrew clock-names = "bus", "mclk1", "mclk2", "mclk3"; 406279377Simp dma-names = "tx", "rx"; 407279377Simp dmas = <&edma0 1 47>, 408279377Simp <&edma0 1 46>; 409279377Simp status = "disabled"; 410279377Simp }; 411279377Simp 412279377Simp sai2: sai@2b60000 { 413295436Sandrew #sound-dai-cells = <0>; 414279377Simp compatible = "fsl,vf610-sai"; 415279377Simp reg = <0x0 0x2b60000 0x0 0x10000>; 416279377Simp interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 417295436Sandrew clocks = <&platform_clk 1>, <&platform_clk 1>, 418295436Sandrew <&platform_clk 1>, <&platform_clk 1>; 419295436Sandrew clock-names = "bus", "mclk1", "mclk2", "mclk3"; 420279377Simp dma-names = "tx", "rx"; 421279377Simp dmas = <&edma0 1 45>, 422279377Simp <&edma0 1 44>; 423279377Simp status = "disabled"; 424279377Simp }; 425279377Simp 426279377Simp edma0: edma@2c00000 { 427279377Simp #dma-cells = <2>; 428279377Simp compatible = "fsl,vf610-edma"; 429279377Simp reg = <0x0 0x2c00000 0x0 0x10000>, 430279377Simp <0x0 0x2c10000 0x0 0x10000>, 431279377Simp <0x0 0x2c20000 0x0 0x10000>; 432279377Simp interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 433279377Simp <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 434279377Simp interrupt-names = "edma-tx", "edma-err"; 435279377Simp dma-channels = <32>; 436279377Simp big-endian; 437279377Simp clock-names = "dmamux0", "dmamux1"; 438279377Simp clocks = <&platform_clk 1>, 439279377Simp <&platform_clk 1>; 440279377Simp }; 441279377Simp 442295436Sandrew dcu: dcu@2ce0000 { 443295436Sandrew compatible = "fsl,ls1021a-dcu"; 444295436Sandrew reg = <0x0 0x2ce0000 0x0 0x10000>; 445295436Sandrew interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 446295436Sandrew clocks = <&platform_clk 0>; 447295436Sandrew clock-names = "dcu"; 448295436Sandrew big-endian; 449295436Sandrew status = "disabled"; 450295436Sandrew }; 451295436Sandrew 452279377Simp mdio0: mdio@2d24000 { 453279377Simp compatible = "gianfar"; 454279377Simp device_type = "mdio"; 455279377Simp #address-cells = <1>; 456279377Simp #size-cells = <0>; 457279377Simp reg = <0x0 0x2d24000 0x0 0x4000>; 458279377Simp }; 459279377Simp 460295436Sandrew enet0: ethernet@2d10000 { 461295436Sandrew compatible = "fsl,etsec2"; 462295436Sandrew device_type = "network"; 463295436Sandrew #address-cells = <2>; 464295436Sandrew #size-cells = <2>; 465295436Sandrew interrupt-parent = <&gic>; 466295436Sandrew model = "eTSEC"; 467295436Sandrew fsl,magic-packet; 468295436Sandrew ranges; 469295436Sandrew dma-coherent; 470295436Sandrew 471295436Sandrew queue-group@2d10000 { 472295436Sandrew #address-cells = <2>; 473295436Sandrew #size-cells = <2>; 474295436Sandrew reg = <0x0 0x2d10000 0x0 0x1000>; 475295436Sandrew interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 476295436Sandrew <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 477295436Sandrew <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 478295436Sandrew }; 479295436Sandrew 480295436Sandrew queue-group@2d14000 { 481295436Sandrew #address-cells = <2>; 482295436Sandrew #size-cells = <2>; 483295436Sandrew reg = <0x0 0x2d14000 0x0 0x1000>; 484295436Sandrew interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 485295436Sandrew <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 486295436Sandrew <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 487295436Sandrew }; 488295436Sandrew }; 489295436Sandrew 490295436Sandrew enet1: ethernet@2d50000 { 491295436Sandrew compatible = "fsl,etsec2"; 492295436Sandrew device_type = "network"; 493295436Sandrew #address-cells = <2>; 494295436Sandrew #size-cells = <2>; 495295436Sandrew interrupt-parent = <&gic>; 496295436Sandrew model = "eTSEC"; 497295436Sandrew ranges; 498295436Sandrew dma-coherent; 499295436Sandrew 500295436Sandrew queue-group@2d50000 { 501295436Sandrew #address-cells = <2>; 502295436Sandrew #size-cells = <2>; 503295436Sandrew reg = <0x0 0x2d50000 0x0 0x1000>; 504295436Sandrew interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, 505295436Sandrew <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, 506295436Sandrew <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 507295436Sandrew }; 508295436Sandrew 509295436Sandrew queue-group@2d54000 { 510295436Sandrew #address-cells = <2>; 511295436Sandrew #size-cells = <2>; 512295436Sandrew reg = <0x0 0x2d54000 0x0 0x1000>; 513295436Sandrew interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, 514295436Sandrew <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 515295436Sandrew <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 516295436Sandrew }; 517295436Sandrew }; 518295436Sandrew 519295436Sandrew enet2: ethernet@2d90000 { 520295436Sandrew compatible = "fsl,etsec2"; 521295436Sandrew device_type = "network"; 522295436Sandrew #address-cells = <2>; 523295436Sandrew #size-cells = <2>; 524295436Sandrew interrupt-parent = <&gic>; 525295436Sandrew model = "eTSEC"; 526295436Sandrew ranges; 527295436Sandrew dma-coherent; 528295436Sandrew 529295436Sandrew queue-group@2d90000 { 530295436Sandrew #address-cells = <2>; 531295436Sandrew #size-cells = <2>; 532295436Sandrew reg = <0x0 0x2d90000 0x0 0x1000>; 533295436Sandrew interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 534295436Sandrew <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, 535295436Sandrew <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 536295436Sandrew }; 537295436Sandrew 538295436Sandrew queue-group@2d94000 { 539295436Sandrew #address-cells = <2>; 540295436Sandrew #size-cells = <2>; 541295436Sandrew reg = <0x0 0x2d94000 0x0 0x1000>; 542295436Sandrew interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 543295436Sandrew <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 544295436Sandrew <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 545295436Sandrew }; 546295436Sandrew }; 547295436Sandrew 548279377Simp usb@8600000 { 549279377Simp compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; 550279377Simp reg = <0x0 0x8600000 0x0 0x1000>; 551279377Simp interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 552279377Simp dr_mode = "host"; 553279377Simp phy_type = "ulpi"; 554279377Simp }; 555279377Simp 556279377Simp usb3@3100000 { 557279377Simp compatible = "snps,dwc3"; 558279377Simp reg = <0x0 0x3100000 0x0 0x10000>; 559279377Simp interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 560279377Simp dr_mode = "host"; 561295436Sandrew snps,quirk-frame-length-adjustment = <0x20>; 562279377Simp }; 563279377Simp }; 564279377Simp}; 565