1/* 2 * Hitex LPC4350 Evaluation Board 3 * 4 * Copyright 2015 Ariel D'Alessandro <ariel.dalessandro@gmail.com> 5 * 6 * This code is released using a dual license strategy: BSD/GPL 7 * You can choose the licence that better fits your requirements. 8 * 9 * Released under the terms of 3-clause BSD License 10 * Released under the terms of GNU General Public License Version 2.0 11 * 12 */ 13/dts-v1/; 14 15#include "lpc18xx.dtsi" 16#include "lpc4350.dtsi" 17 18#include "dt-bindings/input/input.h" 19#include "dt-bindings/gpio/gpio.h" 20 21/ { 22 model = "Hitex LPC4350 Evaluation Board"; 23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350"; 24 25 aliases { 26 serial0 = &uart0; 27 serial1 = &uart1; 28 serial2 = &uart2; 29 serial3 = &uart3; 30 }; 31 32 chosen { 33 stdout-path = &uart0; 34 }; 35 36 memory { 37 device_type = "memory"; 38 reg = <0x28000000 0x800000>; /* 8 MB */ 39 }; 40 41 pca_buttons { 42 compatible = "gpio-keys-polled"; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 poll-interval = <100>; 46 autorepeat; 47 48 button@0 { 49 label = "joy:right"; 50 linux,code = <KEY_RIGHT>; 51 gpios = <&pca_gpio 8 GPIO_ACTIVE_LOW>; 52 }; 53 54 button@1 { 55 label = "joy:up"; 56 linux,code = <KEY_UP>; 57 gpios = <&pca_gpio 9 GPIO_ACTIVE_LOW>; 58 }; 59 60 61 button@2 { 62 label = "joy:enter"; 63 linux,code = <KEY_ENTER>; 64 gpios = <&pca_gpio 10 GPIO_ACTIVE_LOW>; 65 }; 66 67 button@3 { 68 label = "joy:left"; 69 linux,code = <KEY_LEFT>; 70 gpios = <&pca_gpio 11 GPIO_ACTIVE_LOW>; 71 }; 72 73 button@4 { 74 label = "joy:down"; 75 linux,code = <KEY_DOWN>; 76 gpios = <&pca_gpio 12 GPIO_ACTIVE_LOW>; 77 }; 78 79 button@5 { 80 label = "user:sw3"; 81 linux,code = <KEY_F1>; 82 gpios = <&pca_gpio 13 GPIO_ACTIVE_LOW>; 83 }; 84 85 button@6 { 86 label = "user:sw4"; 87 linux,code = <KEY_F2>; 88 gpios = <&pca_gpio 14 GPIO_ACTIVE_LOW>; 89 }; 90 91 button@7 { 92 label = "user:sw5"; 93 linux,code = <KEY_F3>; 94 gpios = <&pca_gpio 15 GPIO_ACTIVE_LOW>; 95 }; 96 }; 97 98 pca_leds { 99 compatible = "gpio-leds"; 100 101 led0 { 102 label = "ext:led0"; 103 gpios = <&pca_gpio 0 GPIO_ACTIVE_LOW>; 104 linux,default-trigger = "heartbeat"; 105 }; 106 107 led1 { 108 label = "ext:led1"; 109 gpios = <&pca_gpio 1 GPIO_ACTIVE_LOW>; 110 }; 111 112 led2 { 113 label = "ext:led2"; 114 gpios = <&pca_gpio 2 GPIO_ACTIVE_LOW>; 115 }; 116 117 led3 { 118 label = "ext:led3"; 119 gpios = <&pca_gpio 3 GPIO_ACTIVE_LOW>; 120 }; 121 }; 122}; 123 124&pinctrl { 125 emc_pins: emc-pins { 126 emc_addr0_23_cfg { 127 pins = "p2_9", "p2_10", "p2_11", "p2_12", 128 "p2_13", "p1_0", "p1_1", "p1_2", 129 "p2_8", "p2_7", "p2_6", "p2_2", 130 "p2_1", "p2_0", "p6_8", "p6_7", 131 "pd_16", "pd_15", "pe_0", "pe_1", 132 "pe_2", "pe_3", "pe_4", "pa_4"; 133 function = "emc"; 134 slew-rate = <1>; 135 bias-disable; 136 input-enable; 137 input-schmitt-disable; 138 }; 139 140 emc_data0_15_cfg { 141 pins = "p1_7", "p1_8", "p1_9", "p1_10", 142 "p1_11", "p1_12", "p1_13", "p1_14", 143 "p5_4", "p5_5", "p5_6", "p5_7", 144 "p5_0", "p5_1", "p5_2", "p5_3"; 145 function = "emc"; 146 slew-rate = <1>; 147 bias-disable; 148 input-enable; 149 input-schmitt-disable; 150 }; 151 152 emc_we_oe_cfg { 153 pins = "p1_6", "p1_3"; 154 function = "emc"; 155 slew-rate = <1>; 156 bias-disable; 157 input-enable; 158 input-schmitt-disable; 159 }; 160 161 emc_bls0_3_cfg { 162 pins = "p1_4", "p6_6", "pd_13", "pd_10"; 163 function = "emc"; 164 slew-rate = <1>; 165 bias-disable; 166 input-enable; 167 input-schmitt-disable; 168 }; 169 170 emc_cs0_cs2_cfg { 171 pins = "p1_5", "pd_12"; 172 function = "emc"; 173 slew-rate = <1>; 174 bias-disable; 175 input-enable; 176 input-schmitt-disable; 177 }; 178 179 emc_sdram_dqm0_3_cfg { 180 pins = "p6_12", "p6_10", "pd_0", "pe_13"; 181 function = "emc"; 182 slew-rate = <1>; 183 bias-disable; 184 input-enable; 185 input-schmitt-disable; 186 }; 187 188 emc_sdram_ras_cas_cfg { 189 pins = "p6_5", "p6_4"; 190 function = "emc"; 191 slew-rate = <1>; 192 bias-disable; 193 input-enable; 194 input-schmitt-disable; 195 }; 196 197 emc_sdram_dycs0_cfg { 198 pins = "p6_9"; 199 function = "emc"; 200 slew-rate = <1>; 201 bias-disable; 202 input-enable; 203 input-schmitt-disable; 204 }; 205 206 emc_sdram_cke_cfg { 207 pins = "p6_11"; 208 function = "emc"; 209 slew-rate = <1>; 210 bias-disable; 211 input-enable; 212 input-schmitt-disable; 213 }; 214 215 emc_sdram_clock_cfg { 216 pins = "clk0", "clk1", "clk2", "clk3"; 217 function = "emc"; 218 slew-rate = <1>; 219 bias-disable; 220 input-enable; 221 input-schmitt-disable; 222 }; 223 }; 224 225 enet_mii_pins: enet-mii-pins { 226 enet_mii_rxd0_3_cfg { 227 pins = "p1_15", "p0_0", "p9_3", "p9_2"; 228 function = "enet"; 229 bias-disable; 230 input-enable; 231 }; 232 233 enet_mii_txd0_3_cfg { 234 pins = "p1_18", "p1_20", "p9_4", "p9_5"; 235 function = "enet"; 236 bias-disable; 237 }; 238 239 enet_mii_crs_col_cfg { 240 pins = "p9_0", "p9_6"; 241 function = "enet"; 242 bias-disable; 243 input-enable; 244 }; 245 246 enet_mii_rx_clk_dv_er_cfg { 247 pins = "pc_0", "p1_16", "p9_1"; 248 function = "enet"; 249 bias-disable; 250 input-enable; 251 }; 252 253 enet_mii_tx_clk_en_cfg { 254 pins = "p1_19", "p0_1"; 255 function = "enet"; 256 bias-disable; 257 input-enable; 258 }; 259 260 enet_mdio_cfg { 261 pins = "p1_17"; 262 function = "enet"; 263 bias-disable; 264 input-enable; 265 }; 266 267 enet_mdc_cfg { 268 pins = "pc_1"; 269 function = "enet"; 270 bias-disable; 271 }; 272 }; 273 274 i2c0_pins: i2c0-pins { 275 i2c0_pins_cfg { 276 pins = "i2c0_scl", "i2c0_sda"; 277 function = "i2c0"; 278 input-enable; 279 }; 280 }; 281 282 spifi_pins: spifi-pins { 283 spifi_clk_cfg { 284 pins = "p3_3"; 285 function = "spifi"; 286 slew-rate = <1>; 287 bias-disable; 288 input-enable; 289 input-schmitt-disable; 290 }; 291 292 spifi_mosi_miso_sio2_3_cfg { 293 pins = "p3_7", "p3_6", "p3_5", "p3_4"; 294 function = "spifi"; 295 slew-rate = <1>; 296 bias-disable; 297 input-enable; 298 input-schmitt-disable; 299 }; 300 301 spifi_cs_cfg { 302 pins = "p3_8"; 303 function = "spifi"; 304 slew-rate = <1>; 305 bias-disable; 306 input-enable; 307 input-schmitt-disable; 308 }; 309 }; 310 311 uart0_pins: uart0-pins { 312 uart0_rx_cfg { 313 pins = "pf_11"; 314 function = "uart0"; 315 input-schmitt-disable; 316 bias-disable; 317 input-enable; 318 }; 319 320 uart0_tx_cfg { 321 pins = "pf_10"; 322 function = "uart0"; 323 bias-pull-down; 324 }; 325 }; 326}; 327 328&emc { 329 status = "okay"; 330 pinctrl-names = "default"; 331 pinctrl-0 = <&emc_pins>; 332 333 cs0 { 334 #address-cells = <2>; 335 #size-cells = <1>; 336 ranges; 337 338 mpmc,cs = <0>; 339 mpmc,memory-width = <16>; 340 mpmc,byte-lane-low; 341 mpmc,write-enable-delay = <0>; 342 mpmc,output-enable-delay = <0>; 343 mpmc,read-access-delay = <70>; 344 mpmc,page-mode-read-delay = <70>; 345 346 flash@0,0 { 347 compatible = "sst,sst39vf320", "cfi-flash"; 348 reg = <0 0 0x400000>; 349 bank-width = <2>; 350 #address-cells = <1>; 351 #size-cells = <1>; 352 353 partition@0 { 354 label = "bootloader"; 355 reg = <0x000000 0x040000>; /* 256 KiB */ 356 }; 357 358 partition@1 { 359 label = "kernel"; 360 reg = <0x040000 0x2C0000>; /* 2.75 MiB */ 361 }; 362 363 partition@2 { 364 label = "rootfs"; 365 reg = <0x300000 0x100000>; /* 1 MiB */ 366 }; 367 }; 368 }; 369 370 cs2 { 371 #address-cells = <2>; 372 #size-cells = <1>; 373 ranges; 374 375 mpmc,cs = <2>; 376 mpmc,memory-width = <16>; 377 mpmc,byte-lane-low; 378 mpmc,write-enable-delay = <0>; 379 mpmc,output-enable-delay = <30>; 380 mpmc,read-access-delay = <90>; 381 mpmc,page-mode-read-delay = <55>; 382 mpmc,write-access-delay = <55>; 383 mpmc,turn-round-delay = <55>; 384 385 ext_sram: sram@2,0 { 386 compatible = "mmio-sram"; 387 reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */ 388 }; 389 }; 390}; 391 392&enet_tx_clk { 393 clock-frequency = <25000000>; 394}; 395 396&i2c0 { 397 status = "okay"; 398 pinctrl-names = "default"; 399 pinctrl-0 = <&i2c0_pins>; 400 clock-frequency = <400000>; 401 402 /* NXP SE97BTP with temperature sensor + eeprom */ 403 sensor@18 { 404 compatible = "nxp,jc42"; 405 reg = <0x18>; 406 }; 407 408 eeprom@50 { 409 compatible = "nxp,24c02"; 410 reg = <0x50>; 411 }; 412 413 pca_gpio: gpio@24 { 414 compatible = "nxp,pca9673"; 415 reg = <0x24>; 416 gpio-controller; 417 #gpio-cells = <2>; 418 }; 419}; 420 421&mac { 422 status = "okay"; 423 phy-mode = "mii"; 424 pinctrl-names = "default"; 425 pinctrl-0 = <&enet_mii_pins>; 426}; 427 428&spifi { 429 status = "okay"; 430 pinctrl-names = "default"; 431 pinctrl-0 = <&spifi_pins>; 432 433 flash@0 { 434 compatible = "jedec,spi-nor"; 435 spi-rx-bus-width = <4>; 436 #address-cells = <1>; 437 #size-cells = <1>; 438 439 partition@0 { 440 label = "bootloader"; 441 reg = <0x000000 0x040000>; /* 256 KiB */ 442 }; 443 444 partition@1 { 445 label = "kernel"; 446 reg = <0x040000 0x2c0000>; /* 2.75 MiB */ 447 }; 448 449 partition@2 { 450 label = "rootfs"; 451 reg = <0x300000 0x500000>; /* 5 MiB */ 452 }; 453 }; 454}; 455 456&uart0 { 457 status = "okay"; 458 pinctrl-names = "default"; 459 pinctrl-0 = <&uart0_pins>; 460}; 461