lpc32xx.dtsi revision 279377
1279377Simp/* 2279377Simp * NXP LPC32xx SoC 3279377Simp * 4279377Simp * Copyright 2012 Roland Stigge <stigge@antcom.de> 5279377Simp * 6279377Simp * The code contained herein is licensed under the GNU General Public 7279377Simp * License. You may obtain a copy of the GNU General Public License 8279377Simp * Version 2 or later at the following locations: 9279377Simp * 10279377Simp * http://www.opensource.org/licenses/gpl-license.html 11279377Simp * http://www.gnu.org/copyleft/gpl.html 12279377Simp */ 13279377Simp 14279377Simp/include/ "skeleton.dtsi" 15279377Simp 16279377Simp/ { 17279377Simp compatible = "nxp,lpc3220"; 18279377Simp interrupt-parent = <&mic>; 19279377Simp 20279377Simp cpus { 21279377Simp #address-cells = <0>; 22279377Simp #size-cells = <0>; 23279377Simp 24279377Simp cpu { 25279377Simp compatible = "arm,arm926ej-s"; 26279377Simp device_type = "cpu"; 27279377Simp }; 28279377Simp }; 29279377Simp 30279377Simp ahb { 31279377Simp #address-cells = <1>; 32279377Simp #size-cells = <1>; 33279377Simp compatible = "simple-bus"; 34279377Simp ranges = <0x20000000 0x20000000 0x30000000>; 35279377Simp 36279377Simp /* 37279377Simp * Enable either SLC or MLC 38279377Simp */ 39279377Simp slc: flash@20020000 { 40279377Simp compatible = "nxp,lpc3220-slc"; 41279377Simp reg = <0x20020000 0x1000>; 42279377Simp status = "disabled"; 43279377Simp }; 44279377Simp 45279377Simp mlc: flash@200a8000 { 46279377Simp compatible = "nxp,lpc3220-mlc"; 47279377Simp reg = <0x200a8000 0x11000>; 48279377Simp interrupts = <11 0>; 49279377Simp status = "disabled"; 50279377Simp }; 51279377Simp 52279377Simp dma@31000000 { 53279377Simp compatible = "arm,pl080", "arm,primecell"; 54279377Simp reg = <0x31000000 0x1000>; 55279377Simp interrupts = <0x1c 0>; 56279377Simp }; 57279377Simp 58279377Simp /* 59279377Simp * Enable either ohci or usbd (gadget)! 60279377Simp */ 61279377Simp ohci@31020000 { 62279377Simp compatible = "nxp,ohci-nxp", "usb-ohci"; 63279377Simp reg = <0x31020000 0x300>; 64279377Simp interrupts = <0x3b 0>; 65279377Simp status = "disabled"; 66279377Simp }; 67279377Simp 68279377Simp usbd@31020000 { 69279377Simp compatible = "nxp,lpc3220-udc"; 70279377Simp reg = <0x31020000 0x300>; 71279377Simp interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; 72279377Simp status = "disabled"; 73279377Simp }; 74279377Simp 75279377Simp clcd@31040000 { 76279377Simp compatible = "arm,pl110", "arm,primecell"; 77279377Simp reg = <0x31040000 0x1000>; 78279377Simp interrupts = <0x0e 0>; 79279377Simp status = "disabled"; 80279377Simp }; 81279377Simp 82279377Simp mac: ethernet@31060000 { 83279377Simp compatible = "nxp,lpc-eth"; 84279377Simp reg = <0x31060000 0x1000>; 85279377Simp interrupts = <0x1d 0>; 86279377Simp }; 87279377Simp 88279377Simp apb { 89279377Simp #address-cells = <1>; 90279377Simp #size-cells = <1>; 91279377Simp compatible = "simple-bus"; 92279377Simp ranges = <0x20000000 0x20000000 0x30000000>; 93279377Simp 94279377Simp ssp0: ssp@20084000 { 95279377Simp compatible = "arm,pl022", "arm,primecell"; 96279377Simp reg = <0x20084000 0x1000>; 97279377Simp interrupts = <0x14 0>; 98279377Simp }; 99279377Simp 100279377Simp spi1: spi@20088000 { 101279377Simp compatible = "nxp,lpc3220-spi"; 102279377Simp reg = <0x20088000 0x1000>; 103279377Simp }; 104279377Simp 105279377Simp ssp1: ssp@2008c000 { 106279377Simp compatible = "arm,pl022", "arm,primecell"; 107279377Simp reg = <0x2008c000 0x1000>; 108279377Simp interrupts = <0x15 0>; 109279377Simp }; 110279377Simp 111279377Simp spi2: spi@20090000 { 112279377Simp compatible = "nxp,lpc3220-spi"; 113279377Simp reg = <0x20090000 0x1000>; 114279377Simp }; 115279377Simp 116279377Simp i2s0: i2s@20094000 { 117279377Simp compatible = "nxp,lpc3220-i2s"; 118279377Simp reg = <0x20094000 0x1000>; 119279377Simp }; 120279377Simp 121279377Simp sd@20098000 { 122279377Simp compatible = "arm,pl18x", "arm,primecell"; 123279377Simp reg = <0x20098000 0x1000>; 124279377Simp interrupts = <0x0f 0>, <0x0d 0>; 125279377Simp status = "disabled"; 126279377Simp }; 127279377Simp 128279377Simp i2s1: i2s@2009C000 { 129279377Simp compatible = "nxp,lpc3220-i2s"; 130279377Simp reg = <0x2009C000 0x1000>; 131279377Simp }; 132279377Simp 133279377Simp /* UART5 first since it is the default console, ttyS0 */ 134279377Simp uart5: serial@40090000 { 135279377Simp /* actually, ns16550a w/ 64 byte fifos! */ 136279377Simp compatible = "nxp,lpc3220-uart"; 137279377Simp reg = <0x40090000 0x1000>; 138279377Simp interrupts = <9 0>; 139279377Simp clock-frequency = <13000000>; 140279377Simp reg-shift = <2>; 141279377Simp status = "disabled"; 142279377Simp }; 143279377Simp 144279377Simp uart3: serial@40080000 { 145279377Simp compatible = "nxp,lpc3220-uart"; 146279377Simp reg = <0x40080000 0x1000>; 147279377Simp interrupts = <7 0>; 148279377Simp clock-frequency = <13000000>; 149279377Simp reg-shift = <2>; 150279377Simp status = "disabled"; 151279377Simp }; 152279377Simp 153279377Simp uart4: serial@40088000 { 154279377Simp compatible = "nxp,lpc3220-uart"; 155279377Simp reg = <0x40088000 0x1000>; 156279377Simp interrupts = <8 0>; 157279377Simp clock-frequency = <13000000>; 158279377Simp reg-shift = <2>; 159279377Simp status = "disabled"; 160279377Simp }; 161279377Simp 162279377Simp uart6: serial@40098000 { 163279377Simp compatible = "nxp,lpc3220-uart"; 164279377Simp reg = <0x40098000 0x1000>; 165279377Simp interrupts = <10 0>; 166279377Simp clock-frequency = <13000000>; 167279377Simp reg-shift = <2>; 168279377Simp status = "disabled"; 169279377Simp }; 170279377Simp 171279377Simp i2c1: i2c@400A0000 { 172279377Simp compatible = "nxp,pnx-i2c"; 173279377Simp reg = <0x400A0000 0x100>; 174279377Simp interrupts = <0x33 0>; 175279377Simp #address-cells = <1>; 176279377Simp #size-cells = <0>; 177279377Simp pnx,timeout = <0x64>; 178279377Simp }; 179279377Simp 180279377Simp i2c2: i2c@400A8000 { 181279377Simp compatible = "nxp,pnx-i2c"; 182279377Simp reg = <0x400A8000 0x100>; 183279377Simp interrupts = <0x32 0>; 184279377Simp #address-cells = <1>; 185279377Simp #size-cells = <0>; 186279377Simp pnx,timeout = <0x64>; 187279377Simp }; 188279377Simp 189279377Simp mpwm: mpwm@400E8000 { 190279377Simp compatible = "nxp,lpc3220-motor-pwm"; 191279377Simp reg = <0x400E8000 0x78>; 192279377Simp status = "disabled"; 193279377Simp #pwm-cells = <2>; 194279377Simp }; 195279377Simp 196279377Simp i2cusb: i2c@31020300 { 197279377Simp compatible = "nxp,pnx-i2c"; 198279377Simp reg = <0x31020300 0x100>; 199279377Simp interrupts = <0x3f 0>; 200279377Simp #address-cells = <1>; 201279377Simp #size-cells = <0>; 202279377Simp pnx,timeout = <0x64>; 203279377Simp }; 204279377Simp }; 205279377Simp 206279377Simp fab { 207279377Simp #address-cells = <1>; 208279377Simp #size-cells = <1>; 209279377Simp compatible = "simple-bus"; 210279377Simp ranges = <0x20000000 0x20000000 0x30000000>; 211279377Simp 212279377Simp /* 213279377Simp * MIC Interrupt controller includes: 214279377Simp * MIC @40008000 215279377Simp * SIC1 @4000C000 216279377Simp * SIC2 @40010000 217279377Simp */ 218279377Simp mic: interrupt-controller@40008000 { 219279377Simp compatible = "nxp,lpc3220-mic"; 220279377Simp interrupt-controller; 221279377Simp reg = <0x40008000 0xC000>; 222279377Simp #interrupt-cells = <2>; 223279377Simp }; 224279377Simp 225279377Simp uart1: serial@40014000 { 226279377Simp compatible = "nxp,lpc3220-hsuart"; 227279377Simp reg = <0x40014000 0x1000>; 228279377Simp interrupts = <26 0>; 229279377Simp status = "disabled"; 230279377Simp }; 231279377Simp 232279377Simp uart2: serial@40018000 { 233279377Simp compatible = "nxp,lpc3220-hsuart"; 234279377Simp reg = <0x40018000 0x1000>; 235279377Simp interrupts = <25 0>; 236279377Simp status = "disabled"; 237279377Simp }; 238279377Simp 239279377Simp uart7: serial@4001c000 { 240279377Simp compatible = "nxp,lpc3220-hsuart"; 241279377Simp reg = <0x4001c000 0x1000>; 242279377Simp interrupts = <24 0>; 243279377Simp status = "disabled"; 244279377Simp }; 245279377Simp 246279377Simp rtc@40024000 { 247279377Simp compatible = "nxp,lpc3220-rtc"; 248279377Simp reg = <0x40024000 0x1000>; 249279377Simp interrupts = <0x34 0>; 250279377Simp }; 251279377Simp 252279377Simp gpio: gpio@40028000 { 253279377Simp compatible = "nxp,lpc3220-gpio"; 254279377Simp reg = <0x40028000 0x1000>; 255279377Simp gpio-controller; 256279377Simp #gpio-cells = <3>; /* bank, pin, flags */ 257279377Simp }; 258279377Simp 259279377Simp watchdog@4003C000 { 260279377Simp compatible = "nxp,pnx4008-wdt"; 261279377Simp reg = <0x4003C000 0x1000>; 262279377Simp }; 263279377Simp 264279377Simp /* 265279377Simp * TSC vs. ADC: Since those two share the same 266279377Simp * hardware, you need to choose from one of the 267279377Simp * following two and do 'status = "okay";' for one of 268279377Simp * them 269279377Simp */ 270279377Simp 271279377Simp adc@40048000 { 272279377Simp compatible = "nxp,lpc3220-adc"; 273279377Simp reg = <0x40048000 0x1000>; 274279377Simp interrupts = <0x27 0>; 275279377Simp status = "disabled"; 276279377Simp }; 277279377Simp 278279377Simp tsc@40048000 { 279279377Simp compatible = "nxp,lpc3220-tsc"; 280279377Simp reg = <0x40048000 0x1000>; 281279377Simp interrupts = <0x27 0>; 282279377Simp status = "disabled"; 283279377Simp }; 284279377Simp 285279377Simp key@40050000 { 286279377Simp compatible = "nxp,lpc3220-key"; 287279377Simp reg = <0x40050000 0x1000>; 288279377Simp interrupts = <54 0>; 289279377Simp status = "disabled"; 290279377Simp }; 291279377Simp 292279377Simp pwm: pwm@4005C000 { 293279377Simp compatible = "nxp,lpc3220-pwm"; 294279377Simp reg = <0x4005C000 0x8>; 295279377Simp status = "disabled"; 296279377Simp }; 297279377Simp }; 298279377Simp }; 299279377Simp}; 300