1/* 2 * NXP LPC32xx SoC 3 * 4 * Copyright 2012 Roland Stigge <stigge@antcom.de> 5 * 6 * The code contained herein is licensed under the GNU General Public 7 * License. You may obtain a copy of the GNU General Public License 8 * Version 2 or later at the following locations: 9 * 10 * http://www.opensource.org/licenses/gpl-license.html 11 * http://www.gnu.org/copyleft/gpl.html 12 */ 13 14#include "skeleton.dtsi" 15 16/ { 17 compatible = "nxp,lpc3220"; 18 interrupt-parent = <&mic>; 19 20 cpus { 21 #address-cells = <1>; 22 #size-cells = <0>; 23 24 cpu@0 { 25 compatible = "arm,arm926ej-s"; 26 device_type = "cpu"; 27 reg = <0x0>; 28 }; 29 }; 30 31 ahb { 32 #address-cells = <1>; 33 #size-cells = <1>; 34 compatible = "simple-bus"; 35 ranges = <0x20000000 0x20000000 0x30000000>, 36 <0xe0000000 0xe0000000 0x04000000>; 37 38 /* 39 * Enable either SLC or MLC 40 */ 41 slc: flash@20020000 { 42 compatible = "nxp,lpc3220-slc"; 43 reg = <0x20020000 0x1000>; 44 status = "disabled"; 45 }; 46 47 mlc: flash@200a8000 { 48 compatible = "nxp,lpc3220-mlc"; 49 reg = <0x200a8000 0x11000>; 50 interrupts = <11 0>; 51 status = "disabled"; 52 }; 53 54 dma: dma@31000000 { 55 compatible = "arm,pl080", "arm,primecell"; 56 reg = <0x31000000 0x1000>; 57 interrupts = <0x1c 0>; 58 }; 59 60 usb { 61 #address-cells = <1>; 62 #size-cells = <1>; 63 compatible = "simple-bus"; 64 ranges = <0x0 0x31020000 0x00001000>; 65 66 /* 67 * Enable either ohci or usbd (gadget)! 68 */ 69 ohci: ohci@0 { 70 compatible = "nxp,ohci-nxp", "usb-ohci"; 71 reg = <0x0 0x300>; 72 interrupts = <0x3b 0>; 73 status = "disabled"; 74 }; 75 76 usbd: usbd@0 { 77 compatible = "nxp,lpc3220-udc"; 78 reg = <0x0 0x300>; 79 interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; 80 status = "disabled"; 81 }; 82 83 i2cusb: i2c@300 { 84 compatible = "nxp,pnx-i2c"; 85 reg = <0x300 0x100>; 86 interrupts = <0x3f 0>; 87 #address-cells = <1>; 88 #size-cells = <0>; 89 pnx,timeout = <0x64>; 90 }; 91 }; 92 93 clcd: clcd@31040000 { 94 compatible = "arm,pl110", "arm,primecell"; 95 reg = <0x31040000 0x1000>; 96 interrupts = <0x0e 0>; 97 status = "disabled"; 98 }; 99 100 mac: ethernet@31060000 { 101 compatible = "nxp,lpc-eth"; 102 reg = <0x31060000 0x1000>; 103 interrupts = <0x1d 0>; 104 }; 105 106 emc: memory-controller@31080000 { 107 compatible = "arm,pl175", "arm,primecell"; 108 reg = <0x31080000 0x1000>; 109 #address-cells = <1>; 110 #size-cells = <1>; 111 112 ranges = <0 0xe0000000 0x01000000>, 113 <1 0xe1000000 0x01000000>, 114 <2 0xe2000000 0x01000000>, 115 <3 0xe3000000 0x01000000>; 116 status = "disabled"; 117 }; 118 119 apb { 120 #address-cells = <1>; 121 #size-cells = <1>; 122 compatible = "simple-bus"; 123 ranges = <0x20000000 0x20000000 0x30000000>; 124 125 ssp0: ssp@20084000 { 126 compatible = "arm,pl022", "arm,primecell"; 127 reg = <0x20084000 0x1000>; 128 interrupts = <0x14 0>; 129 }; 130 131 spi1: spi@20088000 { 132 compatible = "nxp,lpc3220-spi"; 133 reg = <0x20088000 0x1000>; 134 }; 135 136 ssp1: ssp@2008c000 { 137 compatible = "arm,pl022", "arm,primecell"; 138 reg = <0x2008c000 0x1000>; 139 interrupts = <0x15 0>; 140 }; 141 142 spi2: spi@20090000 { 143 compatible = "nxp,lpc3220-spi"; 144 reg = <0x20090000 0x1000>; 145 }; 146 147 i2s0: i2s@20094000 { 148 compatible = "nxp,lpc3220-i2s"; 149 reg = <0x20094000 0x1000>; 150 }; 151 152 sd: sd@20098000 { 153 compatible = "arm,pl18x", "arm,primecell"; 154 reg = <0x20098000 0x1000>; 155 interrupts = <0x0f 0>, <0x0d 0>; 156 status = "disabled"; 157 }; 158 159 i2s1: i2s@2009C000 { 160 compatible = "nxp,lpc3220-i2s"; 161 reg = <0x2009C000 0x1000>; 162 }; 163 164 /* UART5 first since it is the default console, ttyS0 */ 165 uart5: serial@40090000 { 166 /* actually, ns16550a w/ 64 byte fifos! */ 167 compatible = "nxp,lpc3220-uart"; 168 reg = <0x40090000 0x1000>; 169 interrupts = <9 0>; 170 clock-frequency = <13000000>; 171 reg-shift = <2>; 172 status = "disabled"; 173 }; 174 175 uart3: serial@40080000 { 176 compatible = "nxp,lpc3220-uart"; 177 reg = <0x40080000 0x1000>; 178 interrupts = <7 0>; 179 clock-frequency = <13000000>; 180 reg-shift = <2>; 181 status = "disabled"; 182 }; 183 184 uart4: serial@40088000 { 185 compatible = "nxp,lpc3220-uart"; 186 reg = <0x40088000 0x1000>; 187 interrupts = <8 0>; 188 clock-frequency = <13000000>; 189 reg-shift = <2>; 190 status = "disabled"; 191 }; 192 193 uart6: serial@40098000 { 194 compatible = "nxp,lpc3220-uart"; 195 reg = <0x40098000 0x1000>; 196 interrupts = <10 0>; 197 clock-frequency = <13000000>; 198 reg-shift = <2>; 199 status = "disabled"; 200 }; 201 202 i2c1: i2c@400A0000 { 203 compatible = "nxp,pnx-i2c"; 204 reg = <0x400A0000 0x100>; 205 interrupts = <0x33 0>; 206 #address-cells = <1>; 207 #size-cells = <0>; 208 pnx,timeout = <0x64>; 209 }; 210 211 i2c2: i2c@400A8000 { 212 compatible = "nxp,pnx-i2c"; 213 reg = <0x400A8000 0x100>; 214 interrupts = <0x32 0>; 215 #address-cells = <1>; 216 #size-cells = <0>; 217 pnx,timeout = <0x64>; 218 }; 219 220 mpwm: mpwm@400E8000 { 221 compatible = "nxp,lpc3220-motor-pwm"; 222 reg = <0x400E8000 0x78>; 223 status = "disabled"; 224 #pwm-cells = <2>; 225 }; 226 }; 227 228 fab { 229 #address-cells = <1>; 230 #size-cells = <1>; 231 compatible = "simple-bus"; 232 ranges = <0x20000000 0x20000000 0x30000000>; 233 234 /* 235 * MIC Interrupt controller includes: 236 * MIC @40008000 237 * SIC1 @4000C000 238 * SIC2 @40010000 239 */ 240 mic: interrupt-controller@40008000 { 241 compatible = "nxp,lpc3220-mic"; 242 interrupt-controller; 243 reg = <0x40008000 0xC000>; 244 #interrupt-cells = <2>; 245 }; 246 247 uart1: serial@40014000 { 248 compatible = "nxp,lpc3220-hsuart"; 249 reg = <0x40014000 0x1000>; 250 interrupts = <26 0>; 251 status = "disabled"; 252 }; 253 254 uart2: serial@40018000 { 255 compatible = "nxp,lpc3220-hsuart"; 256 reg = <0x40018000 0x1000>; 257 interrupts = <25 0>; 258 status = "disabled"; 259 }; 260 261 uart7: serial@4001c000 { 262 compatible = "nxp,lpc3220-hsuart"; 263 reg = <0x4001c000 0x1000>; 264 interrupts = <24 0>; 265 status = "disabled"; 266 }; 267 268 rtc: rtc@40024000 { 269 compatible = "nxp,lpc3220-rtc"; 270 reg = <0x40024000 0x1000>; 271 interrupts = <0x34 0>; 272 }; 273 274 gpio: gpio@40028000 { 275 compatible = "nxp,lpc3220-gpio"; 276 reg = <0x40028000 0x1000>; 277 gpio-controller; 278 #gpio-cells = <3>; /* bank, pin, flags */ 279 }; 280 281 timer4: timer@4002C000 { 282 compatible = "nxp,lpc3220-timer"; 283 reg = <0x4002C000 0x1000>; 284 interrupts = <0x3 0>; 285 status = "disabled"; 286 }; 287 288 timer5: timer@40030000 { 289 compatible = "nxp,lpc3220-timer"; 290 reg = <0x40030000 0x1000>; 291 interrupts = <0x4 0>; 292 status = "disabled"; 293 }; 294 295 watchdog: watchdog@4003C000 { 296 compatible = "nxp,pnx4008-wdt"; 297 reg = <0x4003C000 0x1000>; 298 }; 299 300 timer0: timer@40044000 { 301 compatible = "nxp,lpc3220-timer"; 302 reg = <0x40044000 0x1000>; 303 interrupts = <0x10 0>; 304 }; 305 306 /* 307 * TSC vs. ADC: Since those two share the same 308 * hardware, you need to choose from one of the 309 * following two and do 'status = "okay";' for one of 310 * them 311 */ 312 313 adc: adc@40048000 { 314 compatible = "nxp,lpc3220-adc"; 315 reg = <0x40048000 0x1000>; 316 interrupts = <0x27 0>; 317 status = "disabled"; 318 }; 319 320 tsc: tsc@40048000 { 321 compatible = "nxp,lpc3220-tsc"; 322 reg = <0x40048000 0x1000>; 323 interrupts = <0x27 0>; 324 status = "disabled"; 325 }; 326 327 timer1: timer@4004C000 { 328 compatible = "nxp,lpc3220-timer"; 329 reg = <0x4004C000 0x1000>; 330 interrupts = <0x11 0>; 331 }; 332 333 key: key@40050000 { 334 compatible = "nxp,lpc3220-key"; 335 reg = <0x40050000 0x1000>; 336 interrupts = <54 0>; 337 status = "disabled"; 338 }; 339 340 timer2: timer@40058000 { 341 compatible = "nxp,lpc3220-timer"; 342 reg = <0x40058000 0x1000>; 343 interrupts = <0x12 0>; 344 status = "disabled"; 345 }; 346 347 pwm1: pwm@4005C000 { 348 compatible = "nxp,lpc3220-pwm"; 349 reg = <0x4005C000 0x4>; 350 status = "disabled"; 351 }; 352 353 pwm2: pwm@4005C004 { 354 compatible = "nxp,lpc3220-pwm"; 355 reg = <0x4005C004 0x4>; 356 status = "disabled"; 357 }; 358 359 timer3: timer@40060000 { 360 compatible = "nxp,lpc3220-timer"; 361 reg = <0x40060000 0x1000>; 362 interrupts = <0x13 0>; 363 status = "disabled"; 364 }; 365 }; 366 }; 367}; 368