1279377Simp/* 2279377Simp * NXP LPC32xx SoC 3279377Simp * 4279377Simp * Copyright 2012 Roland Stigge <stigge@antcom.de> 5279377Simp * 6279377Simp * The code contained herein is licensed under the GNU General Public 7279377Simp * License. You may obtain a copy of the GNU General Public License 8279377Simp * Version 2 or later at the following locations: 9279377Simp * 10279377Simp * http://www.opensource.org/licenses/gpl-license.html 11279377Simp * http://www.gnu.org/copyleft/gpl.html 12279377Simp */ 13279377Simp 14295436Sandrew#include "skeleton.dtsi" 15279377Simp 16279377Simp/ { 17279377Simp compatible = "nxp,lpc3220"; 18279377Simp interrupt-parent = <&mic>; 19279377Simp 20279377Simp cpus { 21295436Sandrew #address-cells = <1>; 22279377Simp #size-cells = <0>; 23279377Simp 24295436Sandrew cpu@0 { 25279377Simp compatible = "arm,arm926ej-s"; 26279377Simp device_type = "cpu"; 27295436Sandrew reg = <0x0>; 28279377Simp }; 29279377Simp }; 30279377Simp 31279377Simp ahb { 32279377Simp #address-cells = <1>; 33279377Simp #size-cells = <1>; 34279377Simp compatible = "simple-bus"; 35295436Sandrew ranges = <0x20000000 0x20000000 0x30000000>, 36295436Sandrew <0xe0000000 0xe0000000 0x04000000>; 37279377Simp 38279377Simp /* 39279377Simp * Enable either SLC or MLC 40279377Simp */ 41279377Simp slc: flash@20020000 { 42279377Simp compatible = "nxp,lpc3220-slc"; 43279377Simp reg = <0x20020000 0x1000>; 44279377Simp status = "disabled"; 45279377Simp }; 46279377Simp 47279377Simp mlc: flash@200a8000 { 48279377Simp compatible = "nxp,lpc3220-mlc"; 49279377Simp reg = <0x200a8000 0x11000>; 50279377Simp interrupts = <11 0>; 51279377Simp status = "disabled"; 52279377Simp }; 53279377Simp 54295436Sandrew dma: dma@31000000 { 55279377Simp compatible = "arm,pl080", "arm,primecell"; 56279377Simp reg = <0x31000000 0x1000>; 57279377Simp interrupts = <0x1c 0>; 58279377Simp }; 59279377Simp 60295436Sandrew usb { 61295436Sandrew #address-cells = <1>; 62295436Sandrew #size-cells = <1>; 63295436Sandrew compatible = "simple-bus"; 64295436Sandrew ranges = <0x0 0x31020000 0x00001000>; 65279377Simp 66295436Sandrew /* 67295436Sandrew * Enable either ohci or usbd (gadget)! 68295436Sandrew */ 69295436Sandrew ohci: ohci@0 { 70295436Sandrew compatible = "nxp,ohci-nxp", "usb-ohci"; 71295436Sandrew reg = <0x0 0x300>; 72295436Sandrew interrupts = <0x3b 0>; 73295436Sandrew status = "disabled"; 74295436Sandrew }; 75295436Sandrew 76295436Sandrew usbd: usbd@0 { 77295436Sandrew compatible = "nxp,lpc3220-udc"; 78295436Sandrew reg = <0x0 0x300>; 79295436Sandrew interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; 80295436Sandrew status = "disabled"; 81295436Sandrew }; 82295436Sandrew 83295436Sandrew i2cusb: i2c@300 { 84295436Sandrew compatible = "nxp,pnx-i2c"; 85295436Sandrew reg = <0x300 0x100>; 86295436Sandrew interrupts = <0x3f 0>; 87295436Sandrew #address-cells = <1>; 88295436Sandrew #size-cells = <0>; 89295436Sandrew pnx,timeout = <0x64>; 90295436Sandrew }; 91279377Simp }; 92279377Simp 93295436Sandrew clcd: clcd@31040000 { 94279377Simp compatible = "arm,pl110", "arm,primecell"; 95279377Simp reg = <0x31040000 0x1000>; 96279377Simp interrupts = <0x0e 0>; 97279377Simp status = "disabled"; 98279377Simp }; 99279377Simp 100279377Simp mac: ethernet@31060000 { 101279377Simp compatible = "nxp,lpc-eth"; 102279377Simp reg = <0x31060000 0x1000>; 103279377Simp interrupts = <0x1d 0>; 104279377Simp }; 105279377Simp 106295436Sandrew emc: memory-controller@31080000 { 107295436Sandrew compatible = "arm,pl175", "arm,primecell"; 108295436Sandrew reg = <0x31080000 0x1000>; 109295436Sandrew #address-cells = <1>; 110295436Sandrew #size-cells = <1>; 111295436Sandrew 112295436Sandrew ranges = <0 0xe0000000 0x01000000>, 113295436Sandrew <1 0xe1000000 0x01000000>, 114295436Sandrew <2 0xe2000000 0x01000000>, 115295436Sandrew <3 0xe3000000 0x01000000>; 116295436Sandrew status = "disabled"; 117295436Sandrew }; 118295436Sandrew 119279377Simp apb { 120279377Simp #address-cells = <1>; 121279377Simp #size-cells = <1>; 122279377Simp compatible = "simple-bus"; 123279377Simp ranges = <0x20000000 0x20000000 0x30000000>; 124279377Simp 125279377Simp ssp0: ssp@20084000 { 126279377Simp compatible = "arm,pl022", "arm,primecell"; 127279377Simp reg = <0x20084000 0x1000>; 128279377Simp interrupts = <0x14 0>; 129279377Simp }; 130279377Simp 131279377Simp spi1: spi@20088000 { 132279377Simp compatible = "nxp,lpc3220-spi"; 133279377Simp reg = <0x20088000 0x1000>; 134279377Simp }; 135279377Simp 136279377Simp ssp1: ssp@2008c000 { 137279377Simp compatible = "arm,pl022", "arm,primecell"; 138279377Simp reg = <0x2008c000 0x1000>; 139279377Simp interrupts = <0x15 0>; 140279377Simp }; 141279377Simp 142279377Simp spi2: spi@20090000 { 143279377Simp compatible = "nxp,lpc3220-spi"; 144279377Simp reg = <0x20090000 0x1000>; 145279377Simp }; 146279377Simp 147279377Simp i2s0: i2s@20094000 { 148279377Simp compatible = "nxp,lpc3220-i2s"; 149279377Simp reg = <0x20094000 0x1000>; 150279377Simp }; 151279377Simp 152295436Sandrew sd: sd@20098000 { 153279377Simp compatible = "arm,pl18x", "arm,primecell"; 154279377Simp reg = <0x20098000 0x1000>; 155279377Simp interrupts = <0x0f 0>, <0x0d 0>; 156279377Simp status = "disabled"; 157279377Simp }; 158279377Simp 159279377Simp i2s1: i2s@2009C000 { 160279377Simp compatible = "nxp,lpc3220-i2s"; 161279377Simp reg = <0x2009C000 0x1000>; 162279377Simp }; 163279377Simp 164279377Simp /* UART5 first since it is the default console, ttyS0 */ 165279377Simp uart5: serial@40090000 { 166279377Simp /* actually, ns16550a w/ 64 byte fifos! */ 167279377Simp compatible = "nxp,lpc3220-uart"; 168279377Simp reg = <0x40090000 0x1000>; 169279377Simp interrupts = <9 0>; 170279377Simp clock-frequency = <13000000>; 171279377Simp reg-shift = <2>; 172279377Simp status = "disabled"; 173279377Simp }; 174279377Simp 175279377Simp uart3: serial@40080000 { 176279377Simp compatible = "nxp,lpc3220-uart"; 177279377Simp reg = <0x40080000 0x1000>; 178279377Simp interrupts = <7 0>; 179279377Simp clock-frequency = <13000000>; 180279377Simp reg-shift = <2>; 181279377Simp status = "disabled"; 182279377Simp }; 183279377Simp 184279377Simp uart4: serial@40088000 { 185279377Simp compatible = "nxp,lpc3220-uart"; 186279377Simp reg = <0x40088000 0x1000>; 187279377Simp interrupts = <8 0>; 188279377Simp clock-frequency = <13000000>; 189279377Simp reg-shift = <2>; 190279377Simp status = "disabled"; 191279377Simp }; 192279377Simp 193279377Simp uart6: serial@40098000 { 194279377Simp compatible = "nxp,lpc3220-uart"; 195279377Simp reg = <0x40098000 0x1000>; 196279377Simp interrupts = <10 0>; 197279377Simp clock-frequency = <13000000>; 198279377Simp reg-shift = <2>; 199279377Simp status = "disabled"; 200279377Simp }; 201279377Simp 202279377Simp i2c1: i2c@400A0000 { 203279377Simp compatible = "nxp,pnx-i2c"; 204279377Simp reg = <0x400A0000 0x100>; 205279377Simp interrupts = <0x33 0>; 206279377Simp #address-cells = <1>; 207279377Simp #size-cells = <0>; 208279377Simp pnx,timeout = <0x64>; 209279377Simp }; 210279377Simp 211279377Simp i2c2: i2c@400A8000 { 212279377Simp compatible = "nxp,pnx-i2c"; 213279377Simp reg = <0x400A8000 0x100>; 214279377Simp interrupts = <0x32 0>; 215279377Simp #address-cells = <1>; 216279377Simp #size-cells = <0>; 217279377Simp pnx,timeout = <0x64>; 218279377Simp }; 219279377Simp 220279377Simp mpwm: mpwm@400E8000 { 221279377Simp compatible = "nxp,lpc3220-motor-pwm"; 222279377Simp reg = <0x400E8000 0x78>; 223279377Simp status = "disabled"; 224279377Simp #pwm-cells = <2>; 225279377Simp }; 226279377Simp }; 227279377Simp 228279377Simp fab { 229279377Simp #address-cells = <1>; 230279377Simp #size-cells = <1>; 231279377Simp compatible = "simple-bus"; 232279377Simp ranges = <0x20000000 0x20000000 0x30000000>; 233279377Simp 234279377Simp /* 235279377Simp * MIC Interrupt controller includes: 236279377Simp * MIC @40008000 237279377Simp * SIC1 @4000C000 238279377Simp * SIC2 @40010000 239279377Simp */ 240279377Simp mic: interrupt-controller@40008000 { 241279377Simp compatible = "nxp,lpc3220-mic"; 242279377Simp interrupt-controller; 243279377Simp reg = <0x40008000 0xC000>; 244279377Simp #interrupt-cells = <2>; 245279377Simp }; 246279377Simp 247279377Simp uart1: serial@40014000 { 248279377Simp compatible = "nxp,lpc3220-hsuart"; 249279377Simp reg = <0x40014000 0x1000>; 250279377Simp interrupts = <26 0>; 251279377Simp status = "disabled"; 252279377Simp }; 253279377Simp 254279377Simp uart2: serial@40018000 { 255279377Simp compatible = "nxp,lpc3220-hsuart"; 256279377Simp reg = <0x40018000 0x1000>; 257279377Simp interrupts = <25 0>; 258279377Simp status = "disabled"; 259279377Simp }; 260279377Simp 261279377Simp uart7: serial@4001c000 { 262279377Simp compatible = "nxp,lpc3220-hsuart"; 263279377Simp reg = <0x4001c000 0x1000>; 264279377Simp interrupts = <24 0>; 265279377Simp status = "disabled"; 266279377Simp }; 267279377Simp 268295436Sandrew rtc: rtc@40024000 { 269279377Simp compatible = "nxp,lpc3220-rtc"; 270279377Simp reg = <0x40024000 0x1000>; 271279377Simp interrupts = <0x34 0>; 272279377Simp }; 273279377Simp 274279377Simp gpio: gpio@40028000 { 275279377Simp compatible = "nxp,lpc3220-gpio"; 276279377Simp reg = <0x40028000 0x1000>; 277279377Simp gpio-controller; 278279377Simp #gpio-cells = <3>; /* bank, pin, flags */ 279279377Simp }; 280279377Simp 281295436Sandrew timer4: timer@4002C000 { 282295436Sandrew compatible = "nxp,lpc3220-timer"; 283295436Sandrew reg = <0x4002C000 0x1000>; 284295436Sandrew interrupts = <0x3 0>; 285295436Sandrew status = "disabled"; 286295436Sandrew }; 287295436Sandrew 288295436Sandrew timer5: timer@40030000 { 289295436Sandrew compatible = "nxp,lpc3220-timer"; 290295436Sandrew reg = <0x40030000 0x1000>; 291295436Sandrew interrupts = <0x4 0>; 292295436Sandrew status = "disabled"; 293295436Sandrew }; 294295436Sandrew 295295436Sandrew watchdog: watchdog@4003C000 { 296279377Simp compatible = "nxp,pnx4008-wdt"; 297279377Simp reg = <0x4003C000 0x1000>; 298279377Simp }; 299279377Simp 300295436Sandrew timer0: timer@40044000 { 301295436Sandrew compatible = "nxp,lpc3220-timer"; 302295436Sandrew reg = <0x40044000 0x1000>; 303295436Sandrew interrupts = <0x10 0>; 304295436Sandrew }; 305295436Sandrew 306279377Simp /* 307279377Simp * TSC vs. ADC: Since those two share the same 308279377Simp * hardware, you need to choose from one of the 309279377Simp * following two and do 'status = "okay";' for one of 310279377Simp * them 311279377Simp */ 312279377Simp 313295436Sandrew adc: adc@40048000 { 314279377Simp compatible = "nxp,lpc3220-adc"; 315279377Simp reg = <0x40048000 0x1000>; 316279377Simp interrupts = <0x27 0>; 317279377Simp status = "disabled"; 318279377Simp }; 319279377Simp 320295436Sandrew tsc: tsc@40048000 { 321279377Simp compatible = "nxp,lpc3220-tsc"; 322279377Simp reg = <0x40048000 0x1000>; 323279377Simp interrupts = <0x27 0>; 324279377Simp status = "disabled"; 325279377Simp }; 326279377Simp 327295436Sandrew timer1: timer@4004C000 { 328295436Sandrew compatible = "nxp,lpc3220-timer"; 329295436Sandrew reg = <0x4004C000 0x1000>; 330295436Sandrew interrupts = <0x11 0>; 331295436Sandrew }; 332295436Sandrew 333295436Sandrew key: key@40050000 { 334279377Simp compatible = "nxp,lpc3220-key"; 335279377Simp reg = <0x40050000 0x1000>; 336279377Simp interrupts = <54 0>; 337279377Simp status = "disabled"; 338279377Simp }; 339279377Simp 340295436Sandrew timer2: timer@40058000 { 341295436Sandrew compatible = "nxp,lpc3220-timer"; 342295436Sandrew reg = <0x40058000 0x1000>; 343295436Sandrew interrupts = <0x12 0>; 344295436Sandrew status = "disabled"; 345295436Sandrew }; 346295436Sandrew 347295436Sandrew pwm1: pwm@4005C000 { 348279377Simp compatible = "nxp,lpc3220-pwm"; 349295436Sandrew reg = <0x4005C000 0x4>; 350279377Simp status = "disabled"; 351279377Simp }; 352295436Sandrew 353295436Sandrew pwm2: pwm@4005C004 { 354295436Sandrew compatible = "nxp,lpc3220-pwm"; 355295436Sandrew reg = <0x4005C004 0x4>; 356295436Sandrew status = "disabled"; 357295436Sandrew }; 358295436Sandrew 359295436Sandrew timer3: timer@40060000 { 360295436Sandrew compatible = "nxp,lpc3220-timer"; 361295436Sandrew reg = <0x40060000 0x1000>; 362295436Sandrew interrupts = <0x13 0>; 363295436Sandrew status = "disabled"; 364295436Sandrew }; 365279377Simp }; 366279377Simp }; 367279377Simp}; 368