1295011Sandrew/*
2295011Sandrew * Copyright 2015 Boundary Devices, Inc.
3295011Sandrew *
4295011Sandrew * This file is dual-licensed: you can use it either under the terms
5295011Sandrew * of the GPL or the X11 license, at your option. Note that this dual
6295011Sandrew * licensing only applies to this file, and not this project as a
7295011Sandrew * whole.
8295011Sandrew *
9295011Sandrew *  a) This file is free software; you can redistribute it and/or
10295011Sandrew *     modify it under the terms of the GNU General Public License
11295011Sandrew *     version 2 as published by the Free Software Foundation.
12295011Sandrew *
13295011Sandrew *     This file is distributed in the hope that it will be useful
14295011Sandrew *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15295011Sandrew *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16295011Sandrew *     GNU General Public License for more details.
17295011Sandrew *
18295011Sandrew * Or, alternatively
19295011Sandrew *
20295011Sandrew *  b) Permission is hereby granted, free of charge, to any person
21295011Sandrew *     obtaining a copy of this software and associated documentation
22295011Sandrew *     files (the "Software"), to deal in the Software without
23295011Sandrew *     restriction, including without limitation the rights to use
24295011Sandrew *     copy, modify, merge, publish, distribute, sublicense, and/or
25295011Sandrew *     sell copies of the Software, and to permit persons to whom the
26295011Sandrew *     Software is furnished to do so, subject to the following
27295011Sandrew *     conditions:
28295011Sandrew *
29295011Sandrew *     The above copyright notice and this permission notice shall be
30295011Sandrew *     included in all copies or substantial portions of the Software.
31295011Sandrew *
32295011Sandrew *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33295011Sandrew *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34295011Sandrew *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35295011Sandrew *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36295011Sandrew *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37295011Sandrew *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38295011Sandrew *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39295011Sandrew *     OTHER DEALINGS IN THE SOFTWARE.
40295011Sandrew */
41295011Sandrew#include <dt-bindings/gpio/gpio.h>
42295011Sandrew#include <dt-bindings/input/input.h>
43295011Sandrew
44295011Sandrew/ {
45295011Sandrew	chosen {
46295011Sandrew		stdout-path = &uart2;
47295011Sandrew	};
48295011Sandrew
49295011Sandrew	memory {
50295011Sandrew		reg = <0x10000000 0x20000000>;
51295011Sandrew	};
52295011Sandrew
53295011Sandrew	regulators {
54295011Sandrew		compatible = "simple-bus";
55295011Sandrew		#address-cells = <1>;
56295011Sandrew		#size-cells = <0>;
57295011Sandrew
58295011Sandrew		reg_2p5v: regulator@0 {
59295011Sandrew			compatible = "regulator-fixed";
60295011Sandrew			reg = <0>;
61295011Sandrew			regulator-name = "2P5V";
62295011Sandrew			regulator-min-microvolt = <2500000>;
63295011Sandrew			regulator-max-microvolt = <2500000>;
64295011Sandrew			regulator-always-on;
65295011Sandrew		};
66295011Sandrew
67295011Sandrew		reg_3p3v: regulator@1 {
68295011Sandrew			compatible = "regulator-fixed";
69295011Sandrew			reg = <1>;
70295011Sandrew			regulator-name = "3P3V";
71295011Sandrew			regulator-min-microvolt = <3300000>;
72295011Sandrew			regulator-max-microvolt = <3300000>;
73295011Sandrew			regulator-always-on;
74295011Sandrew		};
75295011Sandrew
76295011Sandrew		reg_usb_otg_vbus: regulator@2 {
77295011Sandrew			compatible = "regulator-fixed";
78295011Sandrew			reg = <2>;
79295011Sandrew			regulator-name = "usb_otg_vbus";
80295011Sandrew			regulator-min-microvolt = <5000000>;
81295011Sandrew			regulator-max-microvolt = <5000000>;
82295011Sandrew			gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
83295011Sandrew			enable-active-high;
84295011Sandrew		};
85295011Sandrew
86295011Sandrew		reg_wlan_vmmc: regulator@3 {
87295011Sandrew			compatible = "regulator-fixed";
88295011Sandrew			reg = <3>;
89295011Sandrew			pinctrl-names = "default";
90295011Sandrew			pinctrl-0 = <&pinctrl_wlan_vmmc>;
91295011Sandrew			regulator-name = "reg_wlan_vmmc";
92295011Sandrew			regulator-min-microvolt = <1800000>;
93295011Sandrew			regulator-max-microvolt = <1800000>;
94295011Sandrew			gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>;
95295011Sandrew			startup-delay-us = <70000>;
96295011Sandrew			enable-active-high;
97295011Sandrew		};
98295011Sandrew	};
99295011Sandrew
100295011Sandrew	bt_rfkill {
101295011Sandrew		compatible = "rfkill-gpio";
102295011Sandrew		pinctrl-names = "default";
103295011Sandrew		pinctrl-0 = <&pinctrl_bt_rfkill>;
104295011Sandrew		gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
105295011Sandrew		name = "bt_rfkill";
106295011Sandrew		type = <2>;
107295011Sandrew	};
108295011Sandrew
109295011Sandrew	gpio-keys {
110295011Sandrew		compatible = "gpio-keys";
111295011Sandrew		pinctrl-names = "default";
112295011Sandrew		pinctrl-0 = <&pinctrl_gpio_keys>;
113295011Sandrew
114295011Sandrew		home {
115295011Sandrew			label = "Home";
116295011Sandrew			gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>;
117295011Sandrew			linux,code = <102>;
118295011Sandrew		};
119295011Sandrew
120295011Sandrew		back {
121295011Sandrew			label = "Back";
122295011Sandrew			gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>;
123295011Sandrew			linux,code = <158>;
124295011Sandrew		};
125295011Sandrew	};
126295011Sandrew
127295011Sandrew	leds {
128295011Sandrew		compatible = "gpio-leds";
129295011Sandrew		pinctrl-names = "default";
130295011Sandrew		pinctrl-0 = <&pinctrl_leds>;
131295011Sandrew
132295011Sandrew		j14-pin1 {
133295011Sandrew			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
134295011Sandrew			retain-state-suspended;
135295011Sandrew			default-state = "off";
136295011Sandrew		};
137295011Sandrew
138295011Sandrew		j14-pin3 {
139295011Sandrew			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
140295011Sandrew			retain-state-suspended;
141295011Sandrew			default-state = "off";
142295011Sandrew		};
143295011Sandrew
144295011Sandrew		j14-pins8-9 {
145295011Sandrew			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
146295011Sandrew			retain-state-suspended;
147295011Sandrew			default-state = "off";
148295011Sandrew		};
149295011Sandrew
150295011Sandrew		j46-pin2 {
151295011Sandrew			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
152295011Sandrew			retain-state-suspended;
153295011Sandrew			default-state = "off";
154295011Sandrew		};
155295011Sandrew
156295011Sandrew		j46-pin3 {
157295011Sandrew			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
158295011Sandrew			retain-state-suspended;
159295011Sandrew			default-state = "off";
160295011Sandrew		};
161295011Sandrew	};
162295011Sandrew
163295011Sandrew	backlight_lcd {
164295011Sandrew		compatible = "pwm-backlight";
165295011Sandrew		pwms = <&pwm1 0 5000000>;
166295011Sandrew		brightness-levels = <0 4 8 16 32 64 128 255>;
167295011Sandrew		default-brightness-level = <7>;
168295011Sandrew		power-supply = <&reg_3p3v>;
169295011Sandrew		status = "okay";
170295011Sandrew	};
171295011Sandrew
172295011Sandrew	backlight_lvds0: backlight_lvds0 {
173295011Sandrew		compatible = "pwm-backlight";
174295011Sandrew		pwms = <&pwm4 0 5000000>;
175295011Sandrew		brightness-levels = <0 4 8 16 32 64 128 255>;
176295011Sandrew		default-brightness-level = <7>;
177295011Sandrew		power-supply = <&reg_3p3v>;
178295011Sandrew		status = "okay";
179295011Sandrew	};
180295011Sandrew
181295011Sandrew	panel_lvds0 {
182295011Sandrew		compatible = "hannstar,hsd100pxn1";
183295011Sandrew		backlight = <&backlight_lvds0>;
184295011Sandrew
185295011Sandrew		port {
186295011Sandrew			panel_in_lvds0: endpoint {
187295011Sandrew				remote-endpoint = <&lvds0_out>;
188295011Sandrew			};
189295011Sandrew		};
190295011Sandrew	};
191295011Sandrew
192295011Sandrew	sound {
193295011Sandrew		compatible = "fsl,imx6dl-nit6xlite-sgtl5000",
194295011Sandrew			     "fsl,imx-audio-sgtl5000";
195295011Sandrew		model = "imx6dl-nit6xlite-sgtl5000";
196295011Sandrew		ssi-controller = <&ssi1>;
197295011Sandrew		audio-codec = <&codec>;
198295011Sandrew		audio-routing =
199295011Sandrew			"MIC_IN", "Mic Jack",
200295011Sandrew			"Mic Jack", "Mic Bias",
201295011Sandrew			"Headphone Jack", "HP_OUT";
202295011Sandrew		mux-int-port = <1>;
203295011Sandrew		mux-ext-port = <3>;
204295011Sandrew	};
205295011Sandrew};
206295011Sandrew
207295011Sandrew&audmux {
208295011Sandrew	pinctrl-names = "default";
209295011Sandrew	pinctrl-0 = <&pinctrl_audmux>;
210295011Sandrew	status = "okay";
211295011Sandrew};
212295011Sandrew
213295011Sandrew&clks {
214295011Sandrew	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
215295011Sandrew			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
216295011Sandrew	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
217295011Sandrew				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
218295011Sandrew};
219295011Sandrew
220295011Sandrew&ecspi1 {
221295011Sandrew	fsl,spi-num-chipselects = <1>;
222295011Sandrew	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
223295011Sandrew	pinctrl-names = "default";
224295011Sandrew	pinctrl-0 = <&pinctrl_ecspi1>;
225295011Sandrew	status = "okay";
226295011Sandrew
227295011Sandrew	flash: m25p80@0 {
228295011Sandrew		compatible = "microchip,sst25vf016b";
229295011Sandrew		spi-max-frequency = <20000000>;
230295011Sandrew		reg = <0>;
231295011Sandrew	};
232295011Sandrew};
233295011Sandrew
234295011Sandrew&fec {
235295011Sandrew	pinctrl-names = "default";
236295011Sandrew	pinctrl-0 = <&pinctrl_enet>;
237295011Sandrew	phy-mode = "rgmii";
238295011Sandrew	phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
239295011Sandrew	txen-skew-ps = <0>;
240295011Sandrew	txc-skew-ps = <3000>;
241295011Sandrew	rxdv-skew-ps = <0>;
242295011Sandrew	rxc-skew-ps = <3000>;
243295011Sandrew	rxd0-skew-ps = <0>;
244295011Sandrew	rxd1-skew-ps = <0>;
245295011Sandrew	rxd2-skew-ps = <0>;
246295011Sandrew	rxd3-skew-ps = <0>;
247295011Sandrew	txd0-skew-ps = <0>;
248295011Sandrew	txd1-skew-ps = <0>;
249295011Sandrew	txd2-skew-ps = <0>;
250295011Sandrew	txd3-skew-ps = <0>;
251295011Sandrew	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
252295011Sandrew			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
253295011Sandrew	status = "okay";
254295011Sandrew};
255295011Sandrew
256295011Sandrew&hdmi {
257295011Sandrew	ddc-i2c-bus = <&i2c2>;
258295011Sandrew	status = "okay";
259295011Sandrew};
260295011Sandrew
261295011Sandrew&i2c1 {
262295011Sandrew	clock-frequency = <100000>;
263295011Sandrew	pinctrl-names = "default";
264295011Sandrew	pinctrl-0 = <&pinctrl_i2c1>;
265295011Sandrew	status = "okay";
266295011Sandrew
267295011Sandrew	codec: sgtl5000@0a {
268295011Sandrew		compatible = "fsl,sgtl5000";
269295011Sandrew		pinctrl-names = "default";
270295011Sandrew		pinctrl-0 = <&pinctrl_sgtl5000>;
271295011Sandrew		reg = <0x0a>;
272295011Sandrew		clocks = <&clks 201>;
273295011Sandrew		VDDA-supply = <&reg_2p5v>;
274295011Sandrew		VDDIO-supply = <&reg_3p3v>;
275295011Sandrew	};
276295011Sandrew};
277295011Sandrew
278295011Sandrew&i2c2 {
279295011Sandrew	clock-frequency = <100000>;
280295011Sandrew	pinctrl-names = "default";
281295011Sandrew	pinctrl-0 = <&pinctrl_i2c2>;
282295011Sandrew	status = "okay";
283295011Sandrew};
284295011Sandrew
285295011Sandrew&i2c3 {
286295011Sandrew	clock-frequency = <100000>;
287295011Sandrew	pinctrl-names = "default";
288295011Sandrew	pinctrl-0 = <&pinctrl_i2c3>;
289295011Sandrew	status = "okay";
290295011Sandrew
291295011Sandrew	touchscreen@04 {
292295011Sandrew		compatible = "eeti,egalax_ts";
293295011Sandrew		reg = <0x04>;
294295011Sandrew		interrupt-parent = <&gpio1>;
295295011Sandrew		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
296295011Sandrew		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
297295011Sandrew	};
298295011Sandrew
299295011Sandrew	touchscreen@38 {
300295011Sandrew		compatible = "edt,edt-ft5x06";
301295011Sandrew		reg = <0x38>;
302295011Sandrew		interrupt-parent = <&gpio1>;
303295011Sandrew		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
304295011Sandrew	};
305295011Sandrew
306295011Sandrew	rtc@6f {
307295011Sandrew		compatible = "isil,isl1208";
308295011Sandrew		pinctrl-names = "default";
309295011Sandrew		pinctrl-0 = <&pinctrl_rtc>;
310295011Sandrew		reg = <0x6f>;
311295011Sandrew		interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>;
312295011Sandrew	};
313295011Sandrew};
314295011Sandrew
315295011Sandrew&iomuxc {
316295011Sandrew	pinctrl-names = "default";
317295011Sandrew	pinctrl-0 = <&pinctrl_j10>;
318295011Sandrew	pinctrl-1 = <&pinctrl_j28>;
319295011Sandrew
320295011Sandrew	imx6dl-nit6xlite {
321295011Sandrew		pinctrl_audmux: audmuxgrp {
322295011Sandrew			fsl,pins = <
323295011Sandrew				MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
324295011Sandrew				MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
325295011Sandrew				MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
326295011Sandrew				MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
327295011Sandrew			>;
328295011Sandrew		};
329295011Sandrew
330295011Sandrew		pinctrl_bt_rfkill: bt_rfkillgrp {
331295011Sandrew			fsl,pins = <
332295011Sandrew				/* BT wake */
333295011Sandrew				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0
334295011Sandrew				/* BT reset */
335295011Sandrew				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x0b0b0
336295011Sandrew				/* BT reg en */
337295011Sandrew				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x1b0b0
338295011Sandrew				/* BT host wake irq */
339295011Sandrew				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x100b0
340295011Sandrew			>;
341295011Sandrew		};
342295011Sandrew
343295011Sandrew		pinctrl_ecspi1: ecspi1grp {
344295011Sandrew			fsl,pins = <
345295011Sandrew				MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
346295011Sandrew				MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
347295011Sandrew				MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
348295011Sandrew				MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
349295011Sandrew			>;
350295011Sandrew		};
351295011Sandrew
352295011Sandrew		pinctrl_enet: enetgrp {
353295011Sandrew			fsl,pins = <
354295011Sandrew				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x100b0
355295011Sandrew				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x100b0
356295011Sandrew				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0
357295011Sandrew				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0
358295011Sandrew				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0
359295011Sandrew				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0
360295011Sandrew				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0
361295011Sandrew				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0
362295011Sandrew				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0
363295011Sandrew				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
364295011Sandrew				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
365295011Sandrew				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
366295011Sandrew				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
367295011Sandrew				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
368295011Sandrew				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
369295011Sandrew				/* Phy reset */
370295011Sandrew				MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x0f0b0
371295011Sandrew				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0
372295011Sandrew				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
373295011Sandrew			>;
374295011Sandrew		};
375295011Sandrew
376295011Sandrew		pinctrl_gpio_keys: gpio_keysgrp {
377295011Sandrew			fsl,pins = <
378295011Sandrew				/* Home Button: J14 pin 5 */
379295011Sandrew				MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0
380295011Sandrew				/* Back Button: J14 pin 7 */
381295011Sandrew				MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x1b0b0
382295011Sandrew			>;
383295011Sandrew		};
384295011Sandrew
385295011Sandrew		pinctrl_i2c1: i2c1grp {
386295011Sandrew			fsl,pins = <
387295011Sandrew				MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1
388295011Sandrew				MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1
389295011Sandrew			>;
390295011Sandrew		};
391295011Sandrew
392295011Sandrew		pinctrl_i2c2: i2c2grp {
393295011Sandrew			fsl,pins = <
394295011Sandrew				MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
395295011Sandrew				MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
396295011Sandrew			>;
397295011Sandrew		};
398295011Sandrew
399295011Sandrew		pinctrl_i2c3: i2c3grp {
400295011Sandrew			fsl,pins = <
401295011Sandrew				MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1
402295011Sandrew				MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1
403295011Sandrew				/* Touch IRQ: J7 pin 4 */
404295011Sandrew				MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0
405295011Sandrew				/* tcs2004 IRQ */
406295011Sandrew				MX6QDL_PAD_EIM_LBA__GPIO2_IO27	0x1b0b0
407295011Sandrew				/* tsc2004 reset */
408295011Sandrew				MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x0b0b0
409295011Sandrew			>;
410295011Sandrew		};
411295011Sandrew
412295011Sandrew		pinctrl_j10: j10grp {
413295011Sandrew			fsl,pins = <
414295011Sandrew				/* Broadcom WiFi module pins */
415295011Sandrew				MX6QDL_PAD_NANDF_D0__GPIO2_IO00		0x1b0b0
416295011Sandrew				MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0
417295011Sandrew				MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0
418295011Sandrew				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0
419295011Sandrew				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	0x0b0b0
420295011Sandrew				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x1b0b0
421295011Sandrew				MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
422295011Sandrew			>;
423295011Sandrew		};
424295011Sandrew
425295011Sandrew		pinctrl_j28: j28grp {
426295011Sandrew			fsl,pins = <
427295011Sandrew				MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x1b0b0
428295011Sandrew			>;
429295011Sandrew		};
430295011Sandrew
431295011Sandrew		pinctrl_leds: ledsgrp {
432295011Sandrew			fsl,pins = <
433295011Sandrew				MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0
434295011Sandrew				MX6QDL_PAD_GPIO_3__GPIO1_IO03		0x0b0b0
435295011Sandrew				MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x030b0
436295011Sandrew				MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x0b0b0
437295011Sandrew				MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0
438295011Sandrew			>;
439295011Sandrew		};
440295011Sandrew
441295011Sandrew		pinctrl_pwm1: pwm1grp {
442295011Sandrew			fsl,pins = <
443295011Sandrew				MX6QDL_PAD_SD1_DAT3__PWM1_OUT		0x1b0b1
444295011Sandrew			>;
445295011Sandrew		};
446295011Sandrew
447295011Sandrew		pinctrl_pwm3: pwm3grp {
448295011Sandrew			fsl,pins = <
449295011Sandrew				MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
450295011Sandrew			>;
451295011Sandrew		};
452295011Sandrew
453295011Sandrew		pinctrl_pwm4: pwm4grp {
454295011Sandrew			fsl,pins = <
455295011Sandrew				MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
456295011Sandrew			>;
457295011Sandrew		};
458295011Sandrew
459295011Sandrew		pinctrl_wlan_vmmc: wlan_vmmcgrp {
460295011Sandrew			fsl,pins = <
461295011Sandrew				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x030b0
462295011Sandrew			>;
463295011Sandrew		};
464295011Sandrew
465295011Sandrew		pinctrl_rtc: rtcgrp {
466295011Sandrew			fsl,pins = <
467295011Sandrew				MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x1b0b0
468295011Sandrew			>;
469295011Sandrew		};
470295011Sandrew
471295011Sandrew		pinctrl_sgtl5000: sgtl5000grp {
472295011Sandrew			fsl,pins = <
473295011Sandrew				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0
474295011Sandrew				MX6QDL_PAD_EIM_A25__GPIO5_IO02		0x1b0b0
475295011Sandrew			>;
476295011Sandrew		};
477295011Sandrew
478295011Sandrew		pinctrl_uart1: uart1grp {
479295011Sandrew			fsl,pins = <
480295011Sandrew				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
481295011Sandrew				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
482295011Sandrew			>;
483295011Sandrew		};
484295011Sandrew
485295011Sandrew		pinctrl_uart2: uart2grp {
486295011Sandrew			fsl,pins = <
487295011Sandrew				MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
488295011Sandrew				MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
489295011Sandrew			>;
490295011Sandrew		};
491295011Sandrew
492295011Sandrew		pinctrl_uart3: uart3grp {
493295011Sandrew			fsl,pins = <
494295011Sandrew				MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
495295011Sandrew				MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
496295011Sandrew				MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
497295011Sandrew				MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
498295011Sandrew			>;
499295011Sandrew		};
500295011Sandrew
501295011Sandrew		pinctrl_usbotg: usbotggrp {
502295011Sandrew			fsl,pins = <
503295011Sandrew				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
504295011Sandrew				MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0
505295011Sandrew				/* power enable, high active */
506295011Sandrew				MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x000b0
507295011Sandrew			>;
508295011Sandrew		};
509295011Sandrew
510295011Sandrew		pinctrl_usdhc2: usdhc2grp {
511295011Sandrew			fsl,pins = <
512295011Sandrew				MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
513295011Sandrew				MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
514295011Sandrew				MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
515295011Sandrew				MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
516295011Sandrew				MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
517295011Sandrew				MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
518295011Sandrew			>;
519295011Sandrew		};
520295011Sandrew
521295011Sandrew		pinctrl_usdhc3: usdhc3grp {
522295011Sandrew			fsl,pins = <
523295011Sandrew				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
524295011Sandrew				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
525295011Sandrew				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
526295011Sandrew				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
527295011Sandrew				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
528295011Sandrew				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
529295011Sandrew				MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
530295011Sandrew			>;
531295011Sandrew		};
532295011Sandrew	};
533295011Sandrew};
534295011Sandrew
535295011Sandrew&ldb {
536295011Sandrew	status = "okay";
537295011Sandrew
538295011Sandrew	lvds-channel@0 {
539295011Sandrew		fsl,data-mapping = "spwg";
540295011Sandrew		fsl,data-width = <18>;
541295011Sandrew		status = "okay";
542295011Sandrew
543295011Sandrew		port@4 {
544295011Sandrew			reg = <4>;
545295011Sandrew
546295011Sandrew			lvds0_out: endpoint {
547295011Sandrew				remote-endpoint = <&panel_in_lvds0>;
548295011Sandrew			};
549295011Sandrew		};
550295011Sandrew	};
551295011Sandrew};
552295011Sandrew
553295011Sandrew&pcie {
554295011Sandrew	status = "okay";
555295011Sandrew};
556295011Sandrew
557295011Sandrew&pwm1 {
558295011Sandrew	pinctrl-names = "default";
559295011Sandrew	pinctrl-0 = <&pinctrl_pwm1>;
560295011Sandrew	status = "okay";
561295011Sandrew};
562295011Sandrew
563295011Sandrew&pwm3 {
564295011Sandrew	pinctrl-names = "default";
565295011Sandrew	pinctrl-0 = <&pinctrl_pwm3>;
566295011Sandrew	status = "okay";
567295011Sandrew};
568295011Sandrew
569295011Sandrew&pwm4 {
570295011Sandrew	pinctrl-names = "default";
571295011Sandrew	pinctrl-0 = <&pinctrl_pwm4>;
572295011Sandrew	status = "okay";
573295011Sandrew};
574295011Sandrew
575295011Sandrew&ssi1 {
576295011Sandrew	status = "okay";
577295011Sandrew};
578295011Sandrew
579295011Sandrew&uart1 {
580295011Sandrew	pinctrl-names = "default";
581295011Sandrew	pinctrl-0 = <&pinctrl_uart1>;
582295011Sandrew	status = "okay";
583295011Sandrew};
584295011Sandrew
585295011Sandrew&uart2 {
586295011Sandrew	pinctrl-names = "default";
587295011Sandrew	pinctrl-0 = <&pinctrl_uart2>;
588295011Sandrew	status = "okay";
589295011Sandrew};
590295011Sandrew
591295011Sandrew&uart3 {
592295011Sandrew	pinctrl-names = "default";
593295011Sandrew	pinctrl-0 = <&pinctrl_uart3>;
594295011Sandrew	fsl,uart-has-rtscts;
595295011Sandrew	status = "okay";
596295011Sandrew};
597295011Sandrew
598295011Sandrew&usbh1 {
599295011Sandrew	status = "okay";
600295011Sandrew};
601295011Sandrew
602295011Sandrew&usbotg {
603295011Sandrew	vbus-supply = <&reg_usb_otg_vbus>;
604295011Sandrew	pinctrl-names = "default";
605295011Sandrew	pinctrl-0 = <&pinctrl_usbotg>;
606295011Sandrew	disable-over-current;
607295011Sandrew	status = "okay";
608295011Sandrew};
609295011Sandrew
610295011Sandrew&usdhc2 {
611295011Sandrew	pinctrl-names = "default";
612295011Sandrew	pinctrl-0 = <&pinctrl_usdhc2>;
613295011Sandrew	bus-width = <4>;
614295011Sandrew	non-removable;
615295011Sandrew	vmmc-supply = <&reg_3p3v>;
616295011Sandrew	vqmmc-supply = <&reg_wlan_vmmc>;
617295011Sandrew	vqmmc-1-8-v;
618295011Sandrew	ocr-limit = <0x180>;     /* 1.65v - 2.1v */
619295011Sandrew	cap-power-off-card;
620295011Sandrew	keep-power-in-suspend;
621295011Sandrew	status = "okay";
622295011Sandrew};
623295011Sandrew
624295011Sandrew&usdhc3 {
625295011Sandrew	pinctrl-names = "default";
626295011Sandrew	pinctrl-0 = <&pinctrl_usdhc3>;
627295011Sandrew	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
628295011Sandrew	vmmc-supply = <&reg_3p3v>;
629295011Sandrew	status = "okay";
630295011Sandrew};
631