1/* 2 * Copyright 2015 Boundary Devices, Inc. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * version 2 as published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * Or, alternatively 19 * 20 * b) Permission is hereby granted, free of charge, to any person 21 * obtaining a copy of this software and associated documentation 22 * files (the "Software"), to deal in the Software without 23 * restriction, including without limitation the rights to use 24 * copy, modify, merge, publish, distribute, sublicense, and/or 25 * sell copies of the Software, and to permit persons to whom the 26 * Software is furnished to do so, subject to the following 27 * conditions: 28 * 29 * The above copyright notice and this permission notice shall be 30 * included in all copies or substantial portions of the Software. 31 * 32 * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND 33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY 37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39 * OTHER DEALINGS IN THE SOFTWARE. 40 */ 41#include <dt-bindings/gpio/gpio.h> 42#include <dt-bindings/input/input.h> 43 44/ { 45 chosen { 46 stdout-path = &uart2; 47 }; 48 49 memory { 50 reg = <0x10000000 0x20000000>; 51 }; 52 53 regulators { 54 compatible = "simple-bus"; 55 #address-cells = <1>; 56 #size-cells = <0>; 57 58 reg_2p5v: regulator@0 { 59 compatible = "regulator-fixed"; 60 reg = <0>; 61 regulator-name = "2P5V"; 62 regulator-min-microvolt = <2500000>; 63 regulator-max-microvolt = <2500000>; 64 regulator-always-on; 65 }; 66 67 reg_3p3v: regulator@1 { 68 compatible = "regulator-fixed"; 69 reg = <1>; 70 regulator-name = "3P3V"; 71 regulator-min-microvolt = <3300000>; 72 regulator-max-microvolt = <3300000>; 73 regulator-always-on; 74 }; 75 76 reg_usb_otg_vbus: regulator@2 { 77 compatible = "regulator-fixed"; 78 reg = <2>; 79 regulator-name = "usb_otg_vbus"; 80 regulator-min-microvolt = <5000000>; 81 regulator-max-microvolt = <5000000>; 82 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 83 enable-active-high; 84 }; 85 86 reg_wlan_vmmc: regulator@3 { 87 compatible = "regulator-fixed"; 88 reg = <3>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_wlan_vmmc>; 91 regulator-name = "reg_wlan_vmmc"; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 gpio = <&gpio6 7 GPIO_ACTIVE_HIGH>; 95 startup-delay-us = <70000>; 96 enable-active-high; 97 }; 98 }; 99 100 bt_rfkill { 101 compatible = "rfkill-gpio"; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pinctrl_bt_rfkill>; 104 gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; 105 name = "bt_rfkill"; 106 type = <2>; 107 }; 108 109 gpio-keys { 110 compatible = "gpio-keys"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pinctrl_gpio_keys>; 113 114 home { 115 label = "Home"; 116 gpios = <&gpio7 13 IRQ_TYPE_LEVEL_LOW>; 117 linux,code = <102>; 118 }; 119 120 back { 121 label = "Back"; 122 gpios = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>; 123 linux,code = <158>; 124 }; 125 }; 126 127 leds { 128 compatible = "gpio-leds"; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&pinctrl_leds>; 131 132 j14-pin1 { 133 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 134 retain-state-suspended; 135 default-state = "off"; 136 }; 137 138 j14-pin3 { 139 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 140 retain-state-suspended; 141 default-state = "off"; 142 }; 143 144 j14-pins8-9 { 145 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 146 retain-state-suspended; 147 default-state = "off"; 148 }; 149 150 j46-pin2 { 151 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 152 retain-state-suspended; 153 default-state = "off"; 154 }; 155 156 j46-pin3 { 157 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 158 retain-state-suspended; 159 default-state = "off"; 160 }; 161 }; 162 163 backlight_lcd { 164 compatible = "pwm-backlight"; 165 pwms = <&pwm1 0 5000000>; 166 brightness-levels = <0 4 8 16 32 64 128 255>; 167 default-brightness-level = <7>; 168 power-supply = <®_3p3v>; 169 status = "okay"; 170 }; 171 172 backlight_lvds0: backlight_lvds0 { 173 compatible = "pwm-backlight"; 174 pwms = <&pwm4 0 5000000>; 175 brightness-levels = <0 4 8 16 32 64 128 255>; 176 default-brightness-level = <7>; 177 power-supply = <®_3p3v>; 178 status = "okay"; 179 }; 180 181 panel_lvds0 { 182 compatible = "hannstar,hsd100pxn1"; 183 backlight = <&backlight_lvds0>; 184 185 port { 186 panel_in_lvds0: endpoint { 187 remote-endpoint = <&lvds0_out>; 188 }; 189 }; 190 }; 191 192 sound { 193 compatible = "fsl,imx6dl-nit6xlite-sgtl5000", 194 "fsl,imx-audio-sgtl5000"; 195 model = "imx6dl-nit6xlite-sgtl5000"; 196 ssi-controller = <&ssi1>; 197 audio-codec = <&codec>; 198 audio-routing = 199 "MIC_IN", "Mic Jack", 200 "Mic Jack", "Mic Bias", 201 "Headphone Jack", "HP_OUT"; 202 mux-int-port = <1>; 203 mux-ext-port = <3>; 204 }; 205}; 206 207&audmux { 208 pinctrl-names = "default"; 209 pinctrl-0 = <&pinctrl_audmux>; 210 status = "okay"; 211}; 212 213&clks { 214 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 215 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 218}; 219 220&ecspi1 { 221 fsl,spi-num-chipselects = <1>; 222 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_ecspi1>; 225 status = "okay"; 226 227 flash: m25p80@0 { 228 compatible = "microchip,sst25vf016b"; 229 spi-max-frequency = <20000000>; 230 reg = <0>; 231 }; 232}; 233 234&fec { 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_enet>; 237 phy-mode = "rgmii"; 238 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 239 txen-skew-ps = <0>; 240 txc-skew-ps = <3000>; 241 rxdv-skew-ps = <0>; 242 rxc-skew-ps = <3000>; 243 rxd0-skew-ps = <0>; 244 rxd1-skew-ps = <0>; 245 rxd2-skew-ps = <0>; 246 rxd3-skew-ps = <0>; 247 txd0-skew-ps = <0>; 248 txd1-skew-ps = <0>; 249 txd2-skew-ps = <0>; 250 txd3-skew-ps = <0>; 251 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 252 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 253 status = "okay"; 254}; 255 256&hdmi { 257 ddc-i2c-bus = <&i2c2>; 258 status = "okay"; 259}; 260 261&i2c1 { 262 clock-frequency = <100000>; 263 pinctrl-names = "default"; 264 pinctrl-0 = <&pinctrl_i2c1>; 265 status = "okay"; 266 267 codec: sgtl5000@0a { 268 compatible = "fsl,sgtl5000"; 269 pinctrl-names = "default"; 270 pinctrl-0 = <&pinctrl_sgtl5000>; 271 reg = <0x0a>; 272 clocks = <&clks 201>; 273 VDDA-supply = <®_2p5v>; 274 VDDIO-supply = <®_3p3v>; 275 }; 276}; 277 278&i2c2 { 279 clock-frequency = <100000>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_i2c2>; 282 status = "okay"; 283}; 284 285&i2c3 { 286 clock-frequency = <100000>; 287 pinctrl-names = "default"; 288 pinctrl-0 = <&pinctrl_i2c3>; 289 status = "okay"; 290 291 touchscreen@04 { 292 compatible = "eeti,egalax_ts"; 293 reg = <0x04>; 294 interrupt-parent = <&gpio1>; 295 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 296 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 297 }; 298 299 touchscreen@38 { 300 compatible = "edt,edt-ft5x06"; 301 reg = <0x38>; 302 interrupt-parent = <&gpio1>; 303 interrupts = <9 IRQ_TYPE_EDGE_FALLING>; 304 }; 305 306 rtc@6f { 307 compatible = "isil,isl1208"; 308 pinctrl-names = "default"; 309 pinctrl-0 = <&pinctrl_rtc>; 310 reg = <0x6f>; 311 interrupts-extended = <&gpio2 26 IRQ_TYPE_LEVEL_LOW>; 312 }; 313}; 314 315&iomuxc { 316 pinctrl-names = "default"; 317 pinctrl-0 = <&pinctrl_j10>; 318 pinctrl-1 = <&pinctrl_j28>; 319 320 imx6dl-nit6xlite { 321 pinctrl_audmux: audmuxgrp { 322 fsl,pins = < 323 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 324 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 325 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 326 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 327 >; 328 }; 329 330 pinctrl_bt_rfkill: bt_rfkillgrp { 331 fsl,pins = < 332 /* BT wake */ 333 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 334 /* BT reset */ 335 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0b0b0 336 /* BT reg en */ 337 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 338 /* BT host wake irq */ 339 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x100b0 340 >; 341 }; 342 343 pinctrl_ecspi1: ecspi1grp { 344 fsl,pins = < 345 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 346 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 347 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 348 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 349 >; 350 }; 351 352 pinctrl_enet: enetgrp { 353 fsl,pins = < 354 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 355 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 356 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 357 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 358 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 359 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 360 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 361 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 362 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 363 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 364 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 365 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 366 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 367 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 368 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 369 /* Phy reset */ 370 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x0f0b0 371 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 372 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 373 >; 374 }; 375 376 pinctrl_gpio_keys: gpio_keysgrp { 377 fsl,pins = < 378 /* Home Button: J14 pin 5 */ 379 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 380 /* Back Button: J14 pin 7 */ 381 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 382 >; 383 }; 384 385 pinctrl_i2c1: i2c1grp { 386 fsl,pins = < 387 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 388 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 389 >; 390 }; 391 392 pinctrl_i2c2: i2c2grp { 393 fsl,pins = < 394 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 395 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 396 >; 397 }; 398 399 pinctrl_i2c3: i2c3grp { 400 fsl,pins = < 401 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 402 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 403 /* Touch IRQ: J7 pin 4 */ 404 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 405 /* tcs2004 IRQ */ 406 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 407 /* tsc2004 reset */ 408 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x0b0b0 409 >; 410 }; 411 412 pinctrl_j10: j10grp { 413 fsl,pins = < 414 /* Broadcom WiFi module pins */ 415 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 416 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 417 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 418 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 419 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0 420 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 421 MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0 422 >; 423 }; 424 425 pinctrl_j28: j28grp { 426 fsl,pins = < 427 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 428 >; 429 }; 430 431 pinctrl_leds: ledsgrp { 432 fsl,pins = < 433 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0b0b0 434 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x0b0b0 435 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x030b0 436 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b0b0 437 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0b0b0 438 >; 439 }; 440 441 pinctrl_pwm1: pwm1grp { 442 fsl,pins = < 443 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 444 >; 445 }; 446 447 pinctrl_pwm3: pwm3grp { 448 fsl,pins = < 449 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 450 >; 451 }; 452 453 pinctrl_pwm4: pwm4grp { 454 fsl,pins = < 455 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 456 >; 457 }; 458 459 pinctrl_wlan_vmmc: wlan_vmmcgrp { 460 fsl,pins = < 461 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x030b0 462 >; 463 }; 464 465 pinctrl_rtc: rtcgrp { 466 fsl,pins = < 467 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b0b0 468 >; 469 }; 470 471 pinctrl_sgtl5000: sgtl5000grp { 472 fsl,pins = < 473 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 474 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 475 >; 476 }; 477 478 pinctrl_uart1: uart1grp { 479 fsl,pins = < 480 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 481 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 482 >; 483 }; 484 485 pinctrl_uart2: uart2grp { 486 fsl,pins = < 487 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 488 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 489 >; 490 }; 491 492 pinctrl_uart3: uart3grp { 493 fsl,pins = < 494 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 495 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 496 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 497 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 498 >; 499 }; 500 501 pinctrl_usbotg: usbotggrp { 502 fsl,pins = < 503 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 504 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 505 /* power enable, high active */ 506 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 507 >; 508 }; 509 510 pinctrl_usdhc2: usdhc2grp { 511 fsl,pins = < 512 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 513 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 514 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 515 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 516 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 517 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 518 >; 519 }; 520 521 pinctrl_usdhc3: usdhc3grp { 522 fsl,pins = < 523 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 524 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 525 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 526 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 527 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 528 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 529 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 530 >; 531 }; 532 }; 533}; 534 535&ldb { 536 status = "okay"; 537 538 lvds-channel@0 { 539 fsl,data-mapping = "spwg"; 540 fsl,data-width = <18>; 541 status = "okay"; 542 543 port@4 { 544 reg = <4>; 545 546 lvds0_out: endpoint { 547 remote-endpoint = <&panel_in_lvds0>; 548 }; 549 }; 550 }; 551}; 552 553&pcie { 554 status = "okay"; 555}; 556 557&pwm1 { 558 pinctrl-names = "default"; 559 pinctrl-0 = <&pinctrl_pwm1>; 560 status = "okay"; 561}; 562 563&pwm3 { 564 pinctrl-names = "default"; 565 pinctrl-0 = <&pinctrl_pwm3>; 566 status = "okay"; 567}; 568 569&pwm4 { 570 pinctrl-names = "default"; 571 pinctrl-0 = <&pinctrl_pwm4>; 572 status = "okay"; 573}; 574 575&ssi1 { 576 status = "okay"; 577}; 578 579&uart1 { 580 pinctrl-names = "default"; 581 pinctrl-0 = <&pinctrl_uart1>; 582 status = "okay"; 583}; 584 585&uart2 { 586 pinctrl-names = "default"; 587 pinctrl-0 = <&pinctrl_uart2>; 588 status = "okay"; 589}; 590 591&uart3 { 592 pinctrl-names = "default"; 593 pinctrl-0 = <&pinctrl_uart3>; 594 fsl,uart-has-rtscts; 595 status = "okay"; 596}; 597 598&usbh1 { 599 status = "okay"; 600}; 601 602&usbotg { 603 vbus-supply = <®_usb_otg_vbus>; 604 pinctrl-names = "default"; 605 pinctrl-0 = <&pinctrl_usbotg>; 606 disable-over-current; 607 status = "okay"; 608}; 609 610&usdhc2 { 611 pinctrl-names = "default"; 612 pinctrl-0 = <&pinctrl_usdhc2>; 613 bus-width = <4>; 614 non-removable; 615 vmmc-supply = <®_3p3v>; 616 vqmmc-supply = <®_wlan_vmmc>; 617 vqmmc-1-8-v; 618 ocr-limit = <0x180>; /* 1.65v - 2.1v */ 619 cap-power-off-card; 620 keep-power-in-suspend; 621 status = "okay"; 622}; 623 624&usdhc3 { 625 pinctrl-names = "default"; 626 pinctrl-0 = <&pinctrl_usdhc3>; 627 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 628 vmmc-supply = <®_3p3v>; 629 status = "okay"; 630}; 631