dove.dtsi revision 279377
1279377Simp/include/ "skeleton.dtsi" 2279377Simp 3279377Simp#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) 4279377Simp 5279377Simp/ { 6279377Simp compatible = "marvell,dove"; 7279377Simp model = "Marvell Armada 88AP510 SoC"; 8279377Simp interrupt-parent = <&intc>; 9279377Simp 10279377Simp aliases { 11279377Simp gpio0 = &gpio0; 12279377Simp gpio1 = &gpio1; 13279377Simp gpio2 = &gpio2; 14279377Simp }; 15279377Simp 16279377Simp cpus { 17279377Simp #address-cells = <1>; 18279377Simp #size-cells = <0>; 19279377Simp 20279377Simp cpu0: cpu@0 { 21279377Simp compatible = "marvell,pj4a", "marvell,sheeva-v7"; 22279377Simp device_type = "cpu"; 23279377Simp next-level-cache = <&l2>; 24279377Simp reg = <0>; 25279377Simp }; 26279377Simp }; 27279377Simp 28279377Simp l2: l2-cache { 29279377Simp compatible = "marvell,tauros2-cache"; 30279377Simp marvell,tauros2-cache-features = <0>; 31279377Simp }; 32279377Simp 33279377Simp mbus { 34279377Simp compatible = "marvell,dove-mbus", "marvell,mbus", "simple-bus"; 35279377Simp #address-cells = <2>; 36279377Simp #size-cells = <1>; 37279377Simp controller = <&mbusc>; 38279377Simp pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256M MEM space */ 39279377Simp pcie-io-aperture = <0xf2000000 0x00200000>; /* 2M I/O space */ 40279377Simp 41279377Simp ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x0100000 /* MBUS regs 1M */ 42279377Simp MBUS_ID(0xf0, 0x02) 0 0xf1800000 0x1000000 /* AXI regs 16M */ 43279377Simp MBUS_ID(0x01, 0xfd) 0 0xf8000000 0x8000000 /* BootROM 128M */ 44279377Simp MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ 45279377Simp MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ 46279377Simp 47279377Simp pcie: pcie-controller { 48279377Simp compatible = "marvell,dove-pcie"; 49279377Simp status = "disabled"; 50279377Simp device_type = "pci"; 51279377Simp #address-cells = <3>; 52279377Simp #size-cells = <2>; 53279377Simp 54279377Simp msi-parent = <&intc>; 55279377Simp bus-range = <0x00 0xff>; 56279377Simp 57279377Simp ranges = <0x82000000 0x0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x2000 58279377Simp 0x82000000 0x0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x2000 59279377Simp 0x82000000 0x1 0x0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 Mem */ 60279377Simp 0x81000000 0x1 0x0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 I/O */ 61279377Simp 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ 62279377Simp 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ 63279377Simp 64279377Simp pcie-port@0 { 65279377Simp device_type = "pci"; 66279377Simp status = "disabled"; 67279377Simp assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; 68279377Simp reg = <0x0800 0 0 0 0>; 69279377Simp clocks = <&gate_clk 4>; 70279377Simp marvell,pcie-port = <0>; 71279377Simp 72279377Simp #address-cells = <3>; 73279377Simp #size-cells = <2>; 74279377Simp ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 75279377Simp 0x81000000 0 0 0x81000000 0x1 0 1 0>; 76279377Simp 77279377Simp #interrupt-cells = <1>; 78279377Simp interrupt-map-mask = <0 0 0 0>; 79279377Simp interrupt-map = <0 0 0 0 &intc 16>; 80279377Simp }; 81279377Simp 82279377Simp pcie-port@1 { 83279377Simp device_type = "pci"; 84279377Simp status = "disabled"; 85279377Simp assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; 86279377Simp reg = <0x1000 0 0 0 0>; 87279377Simp clocks = <&gate_clk 5>; 88279377Simp marvell,pcie-port = <1>; 89279377Simp 90279377Simp #address-cells = <3>; 91279377Simp #size-cells = <2>; 92279377Simp ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 93279377Simp 0x81000000 0 0 0x81000000 0x2 0 1 0>; 94279377Simp 95279377Simp #interrupt-cells = <1>; 96279377Simp interrupt-map-mask = <0 0 0 0>; 97279377Simp interrupt-map = <0 0 0 0 &intc 18>; 98279377Simp }; 99279377Simp }; 100279377Simp 101279377Simp internal-regs { 102279377Simp compatible = "simple-bus"; 103279377Simp #address-cells = <1>; 104279377Simp #size-cells = <1>; 105279377Simp ranges = <0x00000000 MBUS_ID(0xf0, 0x01) 0 0x0100000 /* MBUS regs 1M */ 106279377Simp 0x00800000 MBUS_ID(0xf0, 0x02) 0 0x1000000 /* AXI regs 16M */ 107279377Simp 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ 108279377Simp 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ 109279377Simp 110279377Simp spi0: spi-ctrl@10600 { 111279377Simp compatible = "marvell,orion-spi"; 112279377Simp #address-cells = <1>; 113279377Simp #size-cells = <0>; 114279377Simp cell-index = <0>; 115279377Simp interrupts = <6>; 116279377Simp reg = <0x10600 0x28>; 117279377Simp clocks = <&core_clk 0>; 118279377Simp pinctrl-0 = <&pmx_spi0>; 119279377Simp pinctrl-names = "default"; 120279377Simp status = "disabled"; 121279377Simp }; 122279377Simp 123279377Simp i2c0: i2c-ctrl@11000 { 124279377Simp compatible = "marvell,mv64xxx-i2c"; 125279377Simp reg = <0x11000 0x20>; 126279377Simp #address-cells = <1>; 127279377Simp #size-cells = <0>; 128279377Simp interrupts = <11>; 129279377Simp clock-frequency = <400000>; 130279377Simp timeout-ms = <1000>; 131279377Simp clocks = <&core_clk 0>; 132279377Simp status = "disabled"; 133279377Simp }; 134279377Simp 135279377Simp uart0: serial@12000 { 136279377Simp compatible = "ns16550a"; 137279377Simp reg = <0x12000 0x100>; 138279377Simp reg-shift = <2>; 139279377Simp interrupts = <7>; 140279377Simp clocks = <&core_clk 0>; 141279377Simp status = "disabled"; 142279377Simp }; 143279377Simp 144279377Simp uart1: serial@12100 { 145279377Simp compatible = "ns16550a"; 146279377Simp reg = <0x12100 0x100>; 147279377Simp reg-shift = <2>; 148279377Simp interrupts = <8>; 149279377Simp clocks = <&core_clk 0>; 150279377Simp pinctrl-0 = <&pmx_uart1>; 151279377Simp pinctrl-names = "default"; 152279377Simp status = "disabled"; 153279377Simp }; 154279377Simp 155279377Simp uart2: serial@12200 { 156279377Simp compatible = "ns16550a"; 157279377Simp reg = <0x12000 0x100>; 158279377Simp reg-shift = <2>; 159279377Simp interrupts = <9>; 160279377Simp clocks = <&core_clk 0>; 161279377Simp status = "disabled"; 162279377Simp }; 163279377Simp 164279377Simp uart3: serial@12300 { 165279377Simp compatible = "ns16550a"; 166279377Simp reg = <0x12100 0x100>; 167279377Simp reg-shift = <2>; 168279377Simp interrupts = <10>; 169279377Simp clocks = <&core_clk 0>; 170279377Simp status = "disabled"; 171279377Simp }; 172279377Simp 173279377Simp spi1: spi-ctrl@14600 { 174279377Simp compatible = "marvell,orion-spi"; 175279377Simp #address-cells = <1>; 176279377Simp #size-cells = <0>; 177279377Simp cell-index = <1>; 178279377Simp interrupts = <5>; 179279377Simp reg = <0x14600 0x28>; 180279377Simp clocks = <&core_clk 0>; 181279377Simp status = "disabled"; 182279377Simp }; 183279377Simp 184279377Simp mbusc: mbus-ctrl@20000 { 185279377Simp compatible = "marvell,mbus-controller"; 186279377Simp reg = <0x20000 0x80>, <0x800100 0x8>; 187279377Simp }; 188279377Simp 189279377Simp sysc: system-ctrl@20000 { 190279377Simp compatible = "marvell,orion-system-controller"; 191279377Simp reg = <0x20000 0x110>; 192279377Simp }; 193279377Simp 194279377Simp bridge_intc: bridge-interrupt-ctrl@20110 { 195279377Simp compatible = "marvell,orion-bridge-intc"; 196279377Simp interrupt-controller; 197279377Simp #interrupt-cells = <1>; 198279377Simp reg = <0x20110 0x8>; 199279377Simp interrupts = <0>; 200279377Simp marvell,#interrupts = <5>; 201279377Simp }; 202279377Simp 203279377Simp intc: main-interrupt-ctrl@20200 { 204279377Simp compatible = "marvell,orion-intc"; 205279377Simp interrupt-controller; 206279377Simp #interrupt-cells = <1>; 207279377Simp reg = <0x20200 0x10>, <0x20210 0x10>; 208279377Simp }; 209279377Simp 210279377Simp timer: timer@20300 { 211279377Simp compatible = "marvell,orion-timer"; 212279377Simp reg = <0x20300 0x20>; 213279377Simp interrupt-parent = <&bridge_intc>; 214279377Simp interrupts = <1>, <2>; 215279377Simp clocks = <&core_clk 0>; 216279377Simp }; 217279377Simp 218279377Simp watchdog@20300 { 219279377Simp compatible = "marvell,orion-wdt"; 220279377Simp reg = <0x20300 0x28>, <0x20108 0x4>; 221279377Simp interrupt-parent = <&bridge_intc>; 222279377Simp interrupts = <3>; 223279377Simp clocks = <&core_clk 0>; 224279377Simp }; 225279377Simp 226279377Simp crypto: crypto-engine@30000 { 227279377Simp compatible = "marvell,orion-crypto"; 228279377Simp reg = <0x30000 0x10000>, 229279377Simp <0xffffe000 0x800>; 230279377Simp reg-names = "regs", "sram"; 231279377Simp interrupts = <31>; 232279377Simp clocks = <&gate_clk 15>; 233279377Simp status = "okay"; 234279377Simp }; 235279377Simp 236279377Simp ehci0: usb-host@50000 { 237279377Simp compatible = "marvell,orion-ehci"; 238279377Simp reg = <0x50000 0x1000>; 239279377Simp interrupts = <24>; 240279377Simp clocks = <&gate_clk 0>; 241279377Simp status = "okay"; 242279377Simp }; 243279377Simp 244279377Simp ehci1: usb-host@51000 { 245279377Simp compatible = "marvell,orion-ehci"; 246279377Simp reg = <0x51000 0x1000>; 247279377Simp interrupts = <25>; 248279377Simp clocks = <&gate_clk 1>; 249279377Simp status = "okay"; 250279377Simp }; 251279377Simp 252279377Simp xor0: dma-engine@60800 { 253279377Simp compatible = "marvell,orion-xor"; 254279377Simp reg = <0x60800 0x100 255279377Simp 0x60a00 0x100>; 256279377Simp clocks = <&gate_clk 23>; 257279377Simp status = "okay"; 258279377Simp 259279377Simp channel0 { 260279377Simp interrupts = <39>; 261279377Simp dmacap,memcpy; 262279377Simp dmacap,xor; 263279377Simp }; 264279377Simp 265279377Simp channel1 { 266279377Simp interrupts = <40>; 267279377Simp dmacap,memcpy; 268279377Simp dmacap,xor; 269279377Simp }; 270279377Simp }; 271279377Simp 272279377Simp xor1: dma-engine@60900 { 273279377Simp compatible = "marvell,orion-xor"; 274279377Simp reg = <0x60900 0x100 275279377Simp 0x60b00 0x100>; 276279377Simp clocks = <&gate_clk 24>; 277279377Simp status = "okay"; 278279377Simp 279279377Simp channel0 { 280279377Simp interrupts = <42>; 281279377Simp dmacap,memcpy; 282279377Simp dmacap,xor; 283279377Simp }; 284279377Simp 285279377Simp channel1 { 286279377Simp interrupts = <43>; 287279377Simp dmacap,memcpy; 288279377Simp dmacap,xor; 289279377Simp }; 290279377Simp }; 291279377Simp 292279377Simp sdio1: sdio-host@90000 { 293279377Simp compatible = "marvell,dove-sdhci"; 294279377Simp reg = <0x90000 0x100>; 295279377Simp interrupts = <36>, <38>; 296279377Simp clocks = <&gate_clk 9>; 297279377Simp pinctrl-0 = <&pmx_sdio1>; 298279377Simp pinctrl-names = "default"; 299279377Simp status = "disabled"; 300279377Simp }; 301279377Simp 302279377Simp eth: ethernet-ctrl@72000 { 303279377Simp compatible = "marvell,orion-eth"; 304279377Simp #address-cells = <1>; 305279377Simp #size-cells = <0>; 306279377Simp reg = <0x72000 0x4000>; 307279377Simp clocks = <&gate_clk 2>; 308279377Simp marvell,tx-checksum-limit = <1600>; 309279377Simp status = "disabled"; 310279377Simp 311279377Simp ethernet-port@0 { 312279377Simp compatible = "marvell,orion-eth-port"; 313279377Simp reg = <0>; 314279377Simp interrupts = <29>; 315279377Simp /* overwrite MAC address in bootloader */ 316279377Simp local-mac-address = [00 00 00 00 00 00]; 317279377Simp phy-handle = <ðphy>; 318279377Simp }; 319279377Simp }; 320279377Simp 321279377Simp mdio: mdio-bus@72004 { 322279377Simp compatible = "marvell,orion-mdio"; 323279377Simp #address-cells = <1>; 324279377Simp #size-cells = <0>; 325279377Simp reg = <0x72004 0x84>; 326279377Simp interrupts = <30>; 327279377Simp clocks = <&gate_clk 2>; 328279377Simp status = "disabled"; 329279377Simp 330279377Simp ethphy: ethernet-phy { 331279377Simp /* set phy address in board file */ 332279377Simp }; 333279377Simp }; 334279377Simp 335279377Simp sdio0: sdio-host@92000 { 336279377Simp compatible = "marvell,dove-sdhci"; 337279377Simp reg = <0x92000 0x100>; 338279377Simp interrupts = <35>, <37>; 339279377Simp clocks = <&gate_clk 8>; 340279377Simp pinctrl-0 = <&pmx_sdio0>; 341279377Simp pinctrl-names = "default"; 342279377Simp status = "disabled"; 343279377Simp }; 344279377Simp 345279377Simp sata0: sata-host@a0000 { 346279377Simp compatible = "marvell,orion-sata"; 347279377Simp reg = <0xa0000 0x2400>; 348279377Simp interrupts = <62>; 349279377Simp clocks = <&gate_clk 3>; 350279377Simp phys = <&sata_phy0>; 351279377Simp phy-names = "port0"; 352279377Simp nr-ports = <1>; 353279377Simp status = "disabled"; 354279377Simp }; 355279377Simp 356279377Simp sata_phy0: sata-phy@a2000 { 357279377Simp compatible = "marvell,mvebu-sata-phy"; 358279377Simp reg = <0xa2000 0x0334>; 359279377Simp clocks = <&gate_clk 3>; 360279377Simp clock-names = "sata"; 361279377Simp #phy-cells = <0>; 362279377Simp status = "ok"; 363279377Simp }; 364279377Simp 365279377Simp audio0: audio-controller@b0000 { 366279377Simp compatible = "marvell,dove-audio"; 367279377Simp reg = <0xb0000 0x2210>; 368279377Simp interrupts = <19>, <20>; 369279377Simp clocks = <&gate_clk 12>; 370279377Simp clock-names = "internal"; 371279377Simp status = "disabled"; 372279377Simp }; 373279377Simp 374279377Simp audio1: audio-controller@b4000 { 375279377Simp compatible = "marvell,dove-audio"; 376279377Simp reg = <0xb4000 0x2210>; 377279377Simp interrupts = <21>, <22>; 378279377Simp clocks = <&gate_clk 13>; 379279377Simp clock-names = "internal"; 380279377Simp status = "disabled"; 381279377Simp }; 382279377Simp 383279377Simp thermal: thermal-diode@d001c { 384279377Simp compatible = "marvell,dove-thermal"; 385279377Simp reg = <0xd001c 0x0c>, <0xd005c 0x08>; 386279377Simp }; 387279377Simp 388279377Simp gate_clk: clock-gating-ctrl@d0038 { 389279377Simp compatible = "marvell,dove-gating-clock"; 390279377Simp reg = <0xd0038 0x4>; 391279377Simp clocks = <&core_clk 0>; 392279377Simp #clock-cells = <1>; 393279377Simp }; 394279377Simp 395279377Simp pinctrl: pin-ctrl@d0200 { 396279377Simp compatible = "marvell,dove-pinctrl"; 397279377Simp reg = <0xd0200 0x14>, 398279377Simp <0xd0440 0x04>; 399279377Simp clocks = <&gate_clk 22>; 400279377Simp 401279377Simp pmx_gpio_0: pmx-gpio-0 { 402279377Simp marvell,pins = "mpp0"; 403279377Simp marvell,function = "gpio"; 404279377Simp }; 405279377Simp 406279377Simp pmx_gpio_1: pmx-gpio-1 { 407279377Simp marvell,pins = "mpp1"; 408279377Simp marvell,function = "gpio"; 409279377Simp }; 410279377Simp 411279377Simp pmx_gpio_2: pmx-gpio-2 { 412279377Simp marvell,pins = "mpp2"; 413279377Simp marvell,function = "gpio"; 414279377Simp }; 415279377Simp 416279377Simp pmx_gpio_3: pmx-gpio-3 { 417279377Simp marvell,pins = "mpp3"; 418279377Simp marvell,function = "gpio"; 419279377Simp }; 420279377Simp 421279377Simp pmx_gpio_4: pmx-gpio-4 { 422279377Simp marvell,pins = "mpp4"; 423279377Simp marvell,function = "gpio"; 424279377Simp }; 425279377Simp 426279377Simp pmx_gpio_5: pmx-gpio-5 { 427279377Simp marvell,pins = "mpp5"; 428279377Simp marvell,function = "gpio"; 429279377Simp }; 430279377Simp 431279377Simp pmx_gpio_6: pmx-gpio-6 { 432279377Simp marvell,pins = "mpp6"; 433279377Simp marvell,function = "gpio"; 434279377Simp }; 435279377Simp 436279377Simp pmx_gpio_7: pmx-gpio-7 { 437279377Simp marvell,pins = "mpp7"; 438279377Simp marvell,function = "gpio"; 439279377Simp }; 440279377Simp 441279377Simp pmx_gpio_8: pmx-gpio-8 { 442279377Simp marvell,pins = "mpp8"; 443279377Simp marvell,function = "gpio"; 444279377Simp }; 445279377Simp 446279377Simp pmx_gpio_9: pmx-gpio-9 { 447279377Simp marvell,pins = "mpp9"; 448279377Simp marvell,function = "gpio"; 449279377Simp }; 450279377Simp 451279377Simp pmx_gpio_10: pmx-gpio-10 { 452279377Simp marvell,pins = "mpp10"; 453279377Simp marvell,function = "gpio"; 454279377Simp }; 455279377Simp 456279377Simp pmx_gpio_11: pmx-gpio-11 { 457279377Simp marvell,pins = "mpp11"; 458279377Simp marvell,function = "gpio"; 459279377Simp }; 460279377Simp 461279377Simp pmx_gpio_12: pmx-gpio-12 { 462279377Simp marvell,pins = "mpp12"; 463279377Simp marvell,function = "gpio"; 464279377Simp }; 465279377Simp 466279377Simp pmx_gpio_13: pmx-gpio-13 { 467279377Simp marvell,pins = "mpp13"; 468279377Simp marvell,function = "gpio"; 469279377Simp }; 470279377Simp 471279377Simp pmx_audio1_extclk: pmx-audio1-extclk { 472279377Simp marvell,pins = "mpp13"; 473279377Simp marvell,function = "audio1"; 474279377Simp }; 475279377Simp 476279377Simp pmx_gpio_14: pmx-gpio-14 { 477279377Simp marvell,pins = "mpp14"; 478279377Simp marvell,function = "gpio"; 479279377Simp }; 480279377Simp 481279377Simp pmx_gpio_15: pmx-gpio-15 { 482279377Simp marvell,pins = "mpp15"; 483279377Simp marvell,function = "gpio"; 484279377Simp }; 485279377Simp 486279377Simp pmx_gpio_16: pmx-gpio-16 { 487279377Simp marvell,pins = "mpp16"; 488279377Simp marvell,function = "gpio"; 489279377Simp }; 490279377Simp 491279377Simp pmx_gpio_17: pmx-gpio-17 { 492279377Simp marvell,pins = "mpp17"; 493279377Simp marvell,function = "gpio"; 494279377Simp }; 495279377Simp 496279377Simp pmx_gpio_18: pmx-gpio-18 { 497279377Simp marvell,pins = "mpp18"; 498279377Simp marvell,function = "gpio"; 499279377Simp }; 500279377Simp 501279377Simp pmx_gpio_19: pmx-gpio-19 { 502279377Simp marvell,pins = "mpp19"; 503279377Simp marvell,function = "gpio"; 504279377Simp }; 505279377Simp 506279377Simp pmx_gpio_20: pmx-gpio-20 { 507279377Simp marvell,pins = "mpp20"; 508279377Simp marvell,function = "gpio"; 509279377Simp }; 510279377Simp 511279377Simp pmx_gpio_21: pmx-gpio-21 { 512279377Simp marvell,pins = "mpp21"; 513279377Simp marvell,function = "gpio"; 514279377Simp }; 515279377Simp 516279377Simp pmx_camera: pmx-camera { 517279377Simp marvell,pins = "mpp_camera"; 518279377Simp marvell,function = "camera"; 519279377Simp }; 520279377Simp 521279377Simp pmx_camera_gpio: pmx-camera-gpio { 522279377Simp marvell,pins = "mpp_camera"; 523279377Simp marvell,function = "gpio"; 524279377Simp }; 525279377Simp 526279377Simp pmx_sdio0: pmx-sdio0 { 527279377Simp marvell,pins = "mpp_sdio0"; 528279377Simp marvell,function = "sdio0"; 529279377Simp }; 530279377Simp 531279377Simp pmx_sdio0_gpio: pmx-sdio0-gpio { 532279377Simp marvell,pins = "mpp_sdio0"; 533279377Simp marvell,function = "gpio"; 534279377Simp }; 535279377Simp 536279377Simp pmx_sdio1: pmx-sdio1 { 537279377Simp marvell,pins = "mpp_sdio1"; 538279377Simp marvell,function = "sdio1"; 539279377Simp }; 540279377Simp 541279377Simp pmx_sdio1_gpio: pmx-sdio1-gpio { 542279377Simp marvell,pins = "mpp_sdio1"; 543279377Simp marvell,function = "gpio"; 544279377Simp }; 545279377Simp 546279377Simp pmx_audio1_gpio: pmx-audio1-gpio { 547279377Simp marvell,pins = "mpp_audio1"; 548279377Simp marvell,function = "gpio"; 549279377Simp }; 550279377Simp 551279377Simp pmx_audio1_i2s1_spdifo: pmx-audio1-i2s1-spdifo { 552279377Simp marvell,pins = "mpp_audio1"; 553279377Simp marvell,function = "i2s1/spdifo"; 554279377Simp }; 555279377Simp 556279377Simp pmx_spi0: pmx-spi0 { 557279377Simp marvell,pins = "mpp_spi0"; 558279377Simp marvell,function = "spi0"; 559279377Simp }; 560279377Simp 561279377Simp pmx_spi0_gpio: pmx-spi0-gpio { 562279377Simp marvell,pins = "mpp_spi0"; 563279377Simp marvell,function = "gpio"; 564279377Simp }; 565279377Simp 566279377Simp pmx_uart1: pmx-uart1 { 567279377Simp marvell,pins = "mpp_uart1"; 568279377Simp marvell,function = "uart1"; 569279377Simp }; 570279377Simp 571279377Simp pmx_uart1_gpio: pmx-uart1-gpio { 572279377Simp marvell,pins = "mpp_uart1"; 573279377Simp marvell,function = "gpio"; 574279377Simp }; 575279377Simp 576279377Simp pmx_nand: pmx-nand { 577279377Simp marvell,pins = "mpp_nand"; 578279377Simp marvell,function = "nand"; 579279377Simp }; 580279377Simp 581279377Simp pmx_nand_gpo: pmx-nand-gpo { 582279377Simp marvell,pins = "mpp_nand"; 583279377Simp marvell,function = "gpo"; 584279377Simp }; 585279377Simp }; 586279377Simp 587279377Simp core_clk: core-clocks@d0214 { 588279377Simp compatible = "marvell,dove-core-clock"; 589279377Simp reg = <0xd0214 0x4>; 590279377Simp #clock-cells = <1>; 591279377Simp }; 592279377Simp 593279377Simp gpio0: gpio-ctrl@d0400 { 594279377Simp compatible = "marvell,orion-gpio"; 595279377Simp #gpio-cells = <2>; 596279377Simp gpio-controller; 597279377Simp reg = <0xd0400 0x20>; 598279377Simp ngpios = <32>; 599279377Simp interrupt-controller; 600279377Simp #interrupt-cells = <2>; 601279377Simp interrupts = <12>, <13>, <14>, <60>; 602279377Simp }; 603279377Simp 604279377Simp gpio1: gpio-ctrl@d0420 { 605279377Simp compatible = "marvell,orion-gpio"; 606279377Simp #gpio-cells = <2>; 607279377Simp gpio-controller; 608279377Simp reg = <0xd0420 0x20>; 609279377Simp ngpios = <32>; 610279377Simp interrupt-controller; 611279377Simp #interrupt-cells = <2>; 612279377Simp interrupts = <61>; 613279377Simp }; 614279377Simp 615279377Simp rtc: real-time-clock@d8500 { 616279377Simp compatible = "marvell,orion-rtc"; 617279377Simp reg = <0xd8500 0x20>; 618279377Simp }; 619279377Simp 620279377Simp gconf: global-config@e802c { 621279377Simp compatible = "marvell,dove-global-config", 622279377Simp "syscon"; 623279377Simp reg = <0xe802c 0x14>; 624279377Simp }; 625279377Simp 626279377Simp gpio2: gpio-ctrl@e8400 { 627279377Simp compatible = "marvell,orion-gpio"; 628279377Simp #gpio-cells = <2>; 629279377Simp gpio-controller; 630279377Simp reg = <0xe8400 0x0c>; 631279377Simp ngpios = <8>; 632279377Simp }; 633279377Simp 634279377Simp lcd1: lcd-controller@810000 { 635279377Simp compatible = "marvell,dove-lcd"; 636279377Simp reg = <0x810000 0x1000>; 637279377Simp interrupts = <46>; 638279377Simp status = "disabled"; 639279377Simp }; 640279377Simp 641279377Simp lcd0: lcd-controller@820000 { 642279377Simp compatible = "marvell,dove-lcd"; 643279377Simp reg = <0x820000 0x1000>; 644279377Simp interrupts = <47>; 645279377Simp status = "disabled"; 646279377Simp }; 647279377Simp }; 648279377Simp }; 649279377Simp}; 650