bcm63138.dtsi revision 279377
1279377Simp/* 2279377Simp * Broadcom BCM63138 DSL SoCs Device Tree 3279377Simp */ 4279377Simp 5279377Simp#include <dt-bindings/interrupt-controller/arm-gic.h> 6279377Simp#include <dt-bindings/interrupt-controller/irq.h> 7279377Simp 8279377Simp#include "skeleton.dtsi" 9279377Simp 10279377Simp/ { 11279377Simp compatible = "brcm,bcm63138"; 12279377Simp model = "Broadcom BCM63138 DSL SoC"; 13279377Simp interrupt-parent = <&gic>; 14279377Simp 15279377Simp aliases { 16279377Simp uart0 = &serial0; 17279377Simp uart1 = &serial1; 18279377Simp }; 19279377Simp 20279377Simp cpus { 21279377Simp #address-cells = <1>; 22279377Simp #size-cells = <0>; 23279377Simp 24279377Simp cpu@0 { 25279377Simp device_type = "cpu"; 26279377Simp compatible = "arm,cortex-a9"; 27279377Simp next-level-cache = <&L2>; 28279377Simp reg = <0>; 29279377Simp }; 30279377Simp 31279377Simp cpu@1 { 32279377Simp device_type = "cpu"; 33279377Simp compatible = "arm,cortex-a9"; 34279377Simp next-level-cache = <&L2>; 35279377Simp reg = <1>; 36279377Simp }; 37279377Simp }; 38279377Simp 39279377Simp clocks { 40279377Simp #address-cells = <1>; 41279377Simp #size-cells = <0>; 42279377Simp 43279377Simp arm_timer_clk: arm_timer_clk { 44279377Simp #clock-cells = <0>; 45279377Simp compatible = "fixed-clock"; 46279377Simp clock-frequency = <500000000>; 47279377Simp }; 48279377Simp 49279377Simp periph_clk: periph_clk { 50279377Simp #clock-cells = <0>; 51279377Simp compatible = "fixed-clock"; 52279377Simp clock-frequency = <50000000>; 53279377Simp clock-output-names = "periph"; 54279377Simp }; 55279377Simp }; 56279377Simp 57279377Simp /* ARM bus */ 58279377Simp axi@80000000 { 59279377Simp compatible = "simple-bus"; 60279377Simp ranges = <0 0x80000000 0x784000>; 61279377Simp #address-cells = <1>; 62279377Simp #size-cells = <1>; 63279377Simp 64279377Simp L2: cache-controller@1d000 { 65279377Simp compatible = "arm,pl310-cache"; 66279377Simp reg = <0x1d000 0x1000>; 67279377Simp cache-unified; 68279377Simp cache-level = <2>; 69279377Simp cache-size = <524288>; 70279377Simp cache-sets = <1024>; 71279377Simp cache-line-size = <32>; 72279377Simp interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; 73279377Simp }; 74279377Simp 75279377Simp scu: scu@1e000 { 76279377Simp compatible = "arm,cortex-a9-scu"; 77279377Simp reg = <0x1e000 0x100>; 78279377Simp }; 79279377Simp 80279377Simp gic: interrupt-controller@1e100 { 81279377Simp compatible = "arm,cortex-a9-gic"; 82279377Simp reg = <0x1f000 0x1000 83279377Simp 0x1e100 0x100>; 84279377Simp #interrupt-cells = <3>; 85279377Simp #address-cells = <0>; 86279377Simp interrupt-controller; 87279377Simp }; 88279377Simp 89279377Simp global_timer: timer@1e200 { 90279377Simp compatible = "arm,cortex-a9-global-timer"; 91279377Simp reg = <0x1e200 0x20>; 92279377Simp interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 93279377Simp clocks = <&arm_timer_clk>; 94279377Simp }; 95279377Simp 96279377Simp local_timer: local-timer@1e600 { 97279377Simp compatible = "arm,cortex-a9-twd-timer"; 98279377Simp reg = <0x1e600 0x20>; 99279377Simp interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 100279377Simp clocks = <&arm_timer_clk>; 101279377Simp }; 102279377Simp 103279377Simp twd_watchdog: watchdog@1e620 { 104279377Simp compatible = "arm,cortex-a9-twd-wdt"; 105279377Simp reg = <0x1e620 0x20>; 106279377Simp interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>; 107279377Simp }; 108279377Simp }; 109279377Simp 110279377Simp /* Legacy UBUS base */ 111279377Simp ubus@fffe8000 { 112279377Simp compatible = "simple-bus"; 113279377Simp #address-cells = <1>; 114279377Simp #size-cells = <1>; 115279377Simp ranges = <0 0xfffe8000 0x8100>; 116279377Simp 117279377Simp serial0: serial@600 { 118279377Simp compatible = "brcm,bcm6345-uart"; 119279377Simp reg = <0x600 0x1b>; 120279377Simp interrupts = <GIC_SPI 32 0>; 121279377Simp clocks = <&periph_clk>; 122279377Simp clock-names = "periph"; 123279377Simp status = "disabled"; 124279377Simp }; 125279377Simp 126279377Simp serial1: serial@620 { 127279377Simp compatible = "brcm,bcm6345-uart"; 128279377Simp reg = <0x620 0x1b>; 129279377Simp interrupts = <GIC_SPI 33 0>; 130279377Simp clocks = <&periph_clk>; 131279377Simp clock-names = "periph"; 132279377Simp status = "disabled"; 133279377Simp }; 134279377Simp }; 135279377Simp}; 136