1/* 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8/dts-v1/; 9 10#include "dra74x.dtsi" 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13 14/ { 15 model = "TI AM5728 BeagleBoard-X15"; 16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; 17 18 aliases { 19 rtc0 = &mcp_rtc; 20 rtc1 = &tps659038_rtc; 21 rtc2 = &rtc; 22 display0 = &hdmi0; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x80000000 0x80000000>; 28 }; 29 30 vdd_3v3: fixedregulator-vdd_3v3 { 31 compatible = "regulator-fixed"; 32 regulator-name = "vdd_3v3"; 33 vin-supply = <®en1>; 34 regulator-min-microvolt = <3300000>; 35 regulator-max-microvolt = <3300000>; 36 }; 37 38 aic_dvdd: fixedregulator-aic_dvdd { 39 compatible = "regulator-fixed"; 40 regulator-name = "aic_dvdd_fixed"; 41 vin-supply = <&vdd_3v3>; 42 regulator-min-microvolt = <1800000>; 43 regulator-max-microvolt = <1800000>; 44 }; 45 46 vtt_fixed: fixedregulator-vtt { 47 /* TPS51200 */ 48 compatible = "regulator-fixed"; 49 regulator-name = "vtt_fixed"; 50 vin-supply = <&smps3_reg>; 51 regulator-min-microvolt = <3300000>; 52 regulator-max-microvolt = <3300000>; 53 regulator-always-on; 54 regulator-boot-on; 55 enable-active-high; 56 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 57 }; 58 59 leds { 60 compatible = "gpio-leds"; 61 pinctrl-names = "default"; 62 pinctrl-0 = <&leds_pins_default>; 63 64 led@0 { 65 label = "beagle-x15:usr0"; 66 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>; 67 linux,default-trigger = "heartbeat"; 68 default-state = "off"; 69 }; 70 71 led@1 { 72 label = "beagle-x15:usr1"; 73 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; 74 linux,default-trigger = "cpu0"; 75 default-state = "off"; 76 }; 77 78 led@2 { 79 label = "beagle-x15:usr2"; 80 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>; 81 linux,default-trigger = "mmc0"; 82 default-state = "off"; 83 }; 84 85 led@3 { 86 label = "beagle-x15:usr3"; 87 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>; 88 linux,default-trigger = "ide-disk"; 89 default-state = "off"; 90 }; 91 }; 92 93 gpio_fan: gpio_fan { 94 /* Based on 5v 500mA AFB02505HHB */ 95 compatible = "gpio-fan"; 96 gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>; 97 gpio-fan,speed-map = <0 0>, 98 <13000 1>; 99 #cooling-cells = <2>; 100 }; 101 102 extcon_usb1: extcon_usb1 { 103 compatible = "linux,extcon-usb-gpio"; 104 id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&extcon_usb1_pins>; 107 }; 108 109 hdmi0: connector { 110 compatible = "hdmi-connector"; 111 label = "hdmi"; 112 113 type = "a"; 114 115 port { 116 hdmi_connector_in: endpoint { 117 remote-endpoint = <&tpd12s015_out>; 118 }; 119 }; 120 }; 121 122 tpd12s015: encoder { 123 compatible = "ti,tpd12s015"; 124 125 pinctrl-names = "default"; 126 pinctrl-0 = <&tpd12s015_pins>; 127 128 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ 129 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */ 130 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ 131 132 ports { 133 #address-cells = <1>; 134 #size-cells = <0>; 135 136 port@0 { 137 reg = <0>; 138 139 tpd12s015_in: endpoint { 140 remote-endpoint = <&hdmi_out>; 141 }; 142 }; 143 144 port@1 { 145 reg = <1>; 146 147 tpd12s015_out: endpoint { 148 remote-endpoint = <&hdmi_connector_in>; 149 }; 150 }; 151 }; 152 }; 153 154 sound0: sound@0 { 155 compatible = "simple-audio-card"; 156 simple-audio-card,name = "BeagleBoard-X15"; 157 simple-audio-card,widgets = 158 "Line", "Line Out", 159 "Line", "Line In"; 160 simple-audio-card,routing = 161 "Line Out", "LLOUT", 162 "Line Out", "RLOUT", 163 "MIC2L", "Line In", 164 "MIC2R", "Line In"; 165 simple-audio-card,format = "dsp_b"; 166 simple-audio-card,bitclock-master = <&sound0_master>; 167 simple-audio-card,frame-master = <&sound0_master>; 168 simple-audio-card,bitclock-inversion; 169 170 simple-audio-card,cpu { 171 sound-dai = <&mcasp3>; 172 }; 173 174 sound0_master: simple-audio-card,codec { 175 sound-dai = <&tlv320aic3104>; 176 clocks = <&clkout2_clk>; 177 }; 178 }; 179}; 180 181&dra7_pmx_core { 182 leds_pins_default: leds_pins_default { 183 pinctrl-single,pins = < 184 DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */ 185 DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */ 186 DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */ 187 DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */ 188 >; 189 }; 190 191 i2c1_pins_default: i2c1_pins_default { 192 pinctrl-single,pins = < 193 DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ 194 DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ 195 >; 196 }; 197 198 hdmi_pins: pinmux_hdmi_pins { 199 pinctrl-single,pins = < 200 DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ 201 DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ 202 >; 203 }; 204 205 i2c3_pins_default: i2c3_pins_default { 206 pinctrl-single,pins = < 207 DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ 208 DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ 209 >; 210 }; 211 212 uart3_pins_default: uart3_pins_default { 213 pinctrl-single,pins = < 214 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ 215 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ 216 >; 217 }; 218 219 mmc1_pins_default: mmc1_pins_default { 220 pinctrl-single,pins = < 221 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ 222 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ 223 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ 224 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ 225 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ 226 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ 227 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ 228 >; 229 }; 230 231 mmc2_pins_default: mmc2_pins_default { 232 pinctrl-single,pins = < 233 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ 234 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ 235 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ 236 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ 237 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ 238 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ 239 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ 240 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ 241 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ 242 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ 243 >; 244 }; 245 246 cpsw_pins_default: cpsw_pins_default { 247 pinctrl-single,pins = < 248 /* Slave 1 */ 249 DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */ 250 DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */ 251 DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */ 252 DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */ 253 DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */ 254 DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */ 255 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */ 256 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */ 257 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */ 258 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */ 259 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */ 260 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */ 261 262 /* Slave 2 */ 263 DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */ 264 DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */ 265 DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */ 266 DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */ 267 DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */ 268 DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */ 269 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */ 270 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */ 271 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */ 272 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */ 273 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */ 274 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */ 275 >; 276 277 }; 278 279 cpsw_pins_sleep: cpsw_pins_sleep { 280 pinctrl-single,pins = < 281 /* Slave 1 */ 282 DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) 283 DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) 284 DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) 285 DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) 286 DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) 287 DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) 288 DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) 289 DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) 290 DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) 291 DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) 292 DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) 293 DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) 294 295 /* Slave 2 */ 296 DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) 297 DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) 298 DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) 299 DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) 300 DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) 301 DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) 302 DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) 303 DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) 304 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) 305 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) 306 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) 307 DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) 308 >; 309 }; 310 311 davinci_mdio_pins_default: davinci_mdio_pins_default { 312 pinctrl-single,pins = < 313 /* MDIO */ 314 DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */ 315 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */ 316 >; 317 }; 318 319 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { 320 pinctrl-single,pins = < 321 DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15) 322 DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15) 323 >; 324 }; 325 326 tps659038_pins_default: tps659038_pins_default { 327 pinctrl-single,pins = < 328 DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ 329 >; 330 }; 331 332 tmp102_pins_default: tmp102_pins_default { 333 pinctrl-single,pins = < 334 DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */ 335 >; 336 }; 337 338 mcp79410_pins_default: mcp79410_pins_default { 339 pinctrl-single,pins = < 340 DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ 341 >; 342 }; 343 344 usb1_pins: pinmux_usb1_pins { 345 pinctrl-single,pins = < 346 DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ 347 >; 348 }; 349 350 extcon_usb1_pins: extcon_usb1_pins { 351 pinctrl-single,pins = < 352 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */ 353 >; 354 }; 355 356 tpd12s015_pins: pinmux_tpd12s015_pins { 357 pinctrl-single,pins = < 358 DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */ 359 DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ 360 DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */ 361 >; 362 }; 363 364 clkout2_pins_default: clkout2_pins_default { 365 pinctrl-single,pins = < 366 DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */ 367 >; 368 }; 369 370 clkout2_pins_sleep: clkout2_pins_sleep { 371 pinctrl-single,pins = < 372 DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */ 373 >; 374 }; 375 376 mcasp3_pins_default: mcasp3_pins_default { 377 pinctrl-single,pins = < 378 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ 379 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ 380 DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ 381 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ 382 >; 383 }; 384 385 mcasp3_pins_sleep: mcasp3_pins_sleep { 386 pinctrl-single,pins = < 387 DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) 388 DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) 389 DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) 390 DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) 391 >; 392 }; 393}; 394 395&i2c1 { 396 status = "okay"; 397 pinctrl-names = "default"; 398 pinctrl-0 = <&i2c1_pins_default>; 399 clock-frequency = <400000>; 400 401 tps659038: tps659038@58 { 402 compatible = "ti,tps659038"; 403 reg = <0x58>; 404 interrupt-parent = <&gpio1>; 405 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 406 407 pinctrl-names = "default"; 408 pinctrl-0 = <&tps659038_pins_default>; 409 410 #interrupt-cells = <2>; 411 interrupt-controller; 412 413 ti,system-power-controller; 414 415 tps659038_pmic { 416 compatible = "ti,tps659038-pmic"; 417 418 regulators { 419 smps12_reg: smps12 { 420 /* VDD_MPU */ 421 regulator-name = "smps12"; 422 regulator-min-microvolt = < 850000>; 423 regulator-max-microvolt = <1250000>; 424 regulator-always-on; 425 regulator-boot-on; 426 }; 427 428 smps3_reg: smps3 { 429 /* VDD_DDR */ 430 regulator-name = "smps3"; 431 regulator-min-microvolt = <1350000>; 432 regulator-max-microvolt = <1350000>; 433 regulator-always-on; 434 regulator-boot-on; 435 }; 436 437 smps45_reg: smps45 { 438 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */ 439 regulator-name = "smps45"; 440 regulator-min-microvolt = < 850000>; 441 regulator-max-microvolt = <1150000>; 442 regulator-always-on; 443 regulator-boot-on; 444 }; 445 446 smps6_reg: smps6 { 447 /* VDD_CORE */ 448 regulator-name = "smps6"; 449 regulator-min-microvolt = <850000>; 450 regulator-max-microvolt = <1030000>; 451 regulator-always-on; 452 regulator-boot-on; 453 }; 454 455 /* SMPS7 unused */ 456 457 smps8_reg: smps8 { 458 /* VDD_1V8 */ 459 regulator-name = "smps8"; 460 regulator-min-microvolt = <1800000>; 461 regulator-max-microvolt = <1800000>; 462 regulator-always-on; 463 regulator-boot-on; 464 }; 465 466 /* SMPS9 unused */ 467 468 ldo1_reg: ldo1 { 469 /* VDD_SD / VDDSHV8 */ 470 regulator-name = "ldo1"; 471 regulator-min-microvolt = <1800000>; 472 regulator-max-microvolt = <3300000>; 473 regulator-boot-on; 474 regulator-always-on; 475 }; 476 477 ldo2_reg: ldo2 { 478 /* VDD_SHV5 */ 479 regulator-name = "ldo2"; 480 regulator-min-microvolt = <3300000>; 481 regulator-max-microvolt = <3300000>; 482 regulator-always-on; 483 regulator-boot-on; 484 }; 485 486 ldo3_reg: ldo3 { 487 /* VDDA_1V8_PHYA */ 488 regulator-name = "ldo3"; 489 regulator-min-microvolt = <1800000>; 490 regulator-max-microvolt = <1800000>; 491 regulator-always-on; 492 regulator-boot-on; 493 }; 494 495 ldo4_reg: ldo4 { 496 /* VDDA_1V8_PHYB */ 497 regulator-name = "ldo4"; 498 regulator-min-microvolt = <1800000>; 499 regulator-max-microvolt = <1800000>; 500 regulator-always-on; 501 regulator-boot-on; 502 }; 503 504 ldo9_reg: ldo9 { 505 /* VDD_RTC */ 506 regulator-name = "ldo9"; 507 regulator-min-microvolt = <1050000>; 508 regulator-max-microvolt = <1050000>; 509 regulator-always-on; 510 regulator-boot-on; 511 }; 512 513 ldoln_reg: ldoln { 514 /* VDDA_1V8_PLL */ 515 regulator-name = "ldoln"; 516 regulator-min-microvolt = <1800000>; 517 regulator-max-microvolt = <1800000>; 518 regulator-always-on; 519 regulator-boot-on; 520 }; 521 522 ldousb_reg: ldousb { 523 /* VDDA_3V_USB: VDDA_USBHS33 */ 524 regulator-name = "ldousb"; 525 regulator-min-microvolt = <3300000>; 526 regulator-max-microvolt = <3300000>; 527 regulator-boot-on; 528 }; 529 530 regen1: regen1 { 531 /* VDD_3V3_ON */ 532 regulator-name = "regen1"; 533 regulator-boot-on; 534 regulator-always-on; 535 }; 536 }; 537 }; 538 539 tps659038_rtc: tps659038_rtc { 540 compatible = "ti,palmas-rtc"; 541 interrupt-parent = <&tps659038>; 542 interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 543 wakeup-source; 544 }; 545 546 tps659038_pwr_button: tps659038_pwr_button { 547 compatible = "ti,palmas-pwrbutton"; 548 interrupt-parent = <&tps659038>; 549 interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 550 wakeup-source; 551 ti,palmas-long-press-seconds = <12>; 552 }; 553 554 tps659038_gpio: tps659038_gpio { 555 compatible = "ti,palmas-gpio"; 556 gpio-controller; 557 #gpio-cells = <2>; 558 }; 559 560 extcon_usb2: tps659038_usb { 561 compatible = "ti,palmas-usb-vid"; 562 ti,enable-vbus-detection; 563 ti,enable-id-detection; 564 id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>; 565 }; 566 567 }; 568 569 tmp102: tmp102@48 { 570 compatible = "ti,tmp102"; 571 reg = <0x48>; 572 pinctrl-names = "default"; 573 pinctrl-0 = <&tmp102_pins_default>; 574 interrupt-parent = <&gpio7>; 575 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 576 #thermal-sensor-cells = <1>; 577 }; 578 579 tlv320aic3104: tlv320aic3104@18 { 580 #sound-dai-cells = <0>; 581 compatible = "ti,tlv320aic3104"; 582 reg = <0x18>; 583 pinctrl-names = "default", "sleep"; 584 pinctrl-0 = <&clkout2_pins_default>; 585 pinctrl-1 = <&clkout2_pins_sleep>; 586 status = "okay"; 587 adc-settle-ms = <40>; 588 589 AVDD-supply = <&vdd_3v3>; 590 IOVDD-supply = <&vdd_3v3>; 591 DRVDD-supply = <&vdd_3v3>; 592 DVDD-supply = <&aic_dvdd>; 593 }; 594}; 595 596&i2c3 { 597 status = "okay"; 598 pinctrl-names = "default"; 599 pinctrl-0 = <&i2c3_pins_default>; 600 clock-frequency = <400000>; 601 602 mcp_rtc: rtc@6f { 603 compatible = "microchip,mcp7941x"; 604 reg = <0x6f>; 605 interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>, 606 <&dra7_pmx_core 0x424>; 607 interrupt-names = "irq", "wakeup"; 608 609 pinctrl-names = "default"; 610 pinctrl-0 = <&mcp79410_pins_default>; 611 612 vcc-supply = <&vdd_3v3>; 613 wakeup-source; 614 }; 615}; 616 617&gpio7 { 618 ti,no-reset-on-init; 619 ti,no-idle-on-init; 620}; 621 622&cpu0 { 623 cpu0-supply = <&smps12_reg>; 624 voltage-tolerance = <1>; 625}; 626 627&uart3 { 628 status = "okay"; 629 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 630 <&dra7_pmx_core 0x3f8>; 631 632 pinctrl-names = "default"; 633 pinctrl-0 = <&uart3_pins_default>; 634}; 635 636&mac { 637 status = "okay"; 638 pinctrl-names = "default", "sleep"; 639 pinctrl-0 = <&cpsw_pins_default>; 640 pinctrl-1 = <&cpsw_pins_sleep>; 641 dual_emac; 642}; 643 644&cpsw_emac0 { 645 phy_id = <&davinci_mdio>, <1>; 646 phy-mode = "rgmii"; 647 dual_emac_res_vlan = <1>; 648}; 649 650&cpsw_emac1 { 651 phy_id = <&davinci_mdio>, <2>; 652 phy-mode = "rgmii"; 653 dual_emac_res_vlan = <2>; 654}; 655 656&davinci_mdio { 657 pinctrl-names = "default", "sleep"; 658 pinctrl-0 = <&davinci_mdio_pins_default>; 659 pinctrl-1 = <&davinci_mdio_pins_sleep>; 660}; 661 662&mmc1 { 663 status = "okay"; 664 665 pinctrl-names = "default"; 666 pinctrl-0 = <&mmc1_pins_default>; 667 668 vmmc-supply = <&ldo1_reg>; 669 bus-width = <4>; 670 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ 671}; 672 673&mmc2 { 674 status = "okay"; 675 676 pinctrl-names = "default"; 677 pinctrl-0 = <&mmc2_pins_default>; 678 679 vmmc-supply = <&vdd_3v3>; 680 bus-width = <8>; 681 ti,non-removable; 682 cap-mmc-dual-data-rate; 683}; 684 685&sata { 686 status = "okay"; 687}; 688 689&usb2_phy1 { 690 phy-supply = <&ldousb_reg>; 691}; 692 693&usb2_phy2 { 694 phy-supply = <&ldousb_reg>; 695}; 696 697&usb1 { 698 dr_mode = "host"; 699 pinctrl-names = "default"; 700 pinctrl-0 = <&usb1_pins>; 701}; 702 703&omap_dwc3_1 { 704 extcon = <&extcon_usb1>; 705}; 706 707&omap_dwc3_2 { 708 extcon = <&extcon_usb2>; 709}; 710 711&usb2 { 712 /* 713 * Stand alone usage is peripheral only. 714 * However, with some resistor modifications 715 * this port can be used via expansion connectors 716 * as "host" or "dual-role". If so, provide 717 * the necessary dr_mode override in the expansion 718 * board's DT. 719 */ 720 dr_mode = "peripheral"; 721}; 722 723&cpu_trips { 724 cpu_alert1: cpu_alert1 { 725 temperature = <50000>; /* millicelsius */ 726 hysteresis = <2000>; /* millicelsius */ 727 type = "active"; 728 }; 729}; 730 731&cpu_cooling_maps { 732 map1 { 733 trip = <&cpu_alert1>; 734 cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 735 }; 736}; 737 738&thermal_zones { 739 board_thermal: board_thermal { 740 polling-delay-passive = <1250>; /* milliseconds */ 741 polling-delay = <1500>; /* milliseconds */ 742 743 /* sensor ID */ 744 thermal-sensors = <&tmp102 0>; 745 746 board_trips: trips { 747 board_alert0: board_alert { 748 temperature = <40000>; /* millicelsius */ 749 hysteresis = <2000>; /* millicelsius */ 750 type = "active"; 751 }; 752 753 board_crit: board_crit { 754 temperature = <105000>; /* millicelsius */ 755 hysteresis = <0>; /* millicelsius */ 756 type = "critical"; 757 }; 758 }; 759 760 board_cooling_maps: cooling-maps { 761 map0 { 762 trip = <&board_alert0>; 763 cooling-device = 764 <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 765 }; 766 }; 767 }; 768}; 769 770&dss { 771 status = "ok"; 772 773 vdda_video-supply = <&ldoln_reg>; 774}; 775 776&hdmi { 777 status = "ok"; 778 vdda-supply = <&ldo4_reg>; 779 780 pinctrl-names = "default"; 781 pinctrl-0 = <&hdmi_pins>; 782 783 port { 784 hdmi_out: endpoint { 785 remote-endpoint = <&tpd12s015_in>; 786 }; 787 }; 788}; 789 790&pcie1 { 791 gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; 792}; 793 794&mcasp3 { 795 #sound-dai-cells = <0>; 796 pinctrl-names = "default", "sleep"; 797 pinctrl-0 = <&mcasp3_pins_default>; 798 pinctrl-1 = <&mcasp3_pins_sleep>; 799 status = "okay"; 800 801 op-mode = <0>; /* MCASP_IIS_MODE */ 802 tdm-slots = <2>; 803 /* 4 serializers */ 804 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 805 1 2 0 0 806 >; 807}; 808 809&mailbox5 { 810 status = "okay"; 811 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 812 status = "okay"; 813 }; 814 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 815 status = "okay"; 816 }; 817}; 818 819&mailbox6 { 820 status = "okay"; 821 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 822 status = "okay"; 823 }; 824 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { 825 status = "okay"; 826 }; 827}; 828