1/*
2 * Device Tree Source for AM4372 SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2.  This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13
14#include "skeleton.dtsi"
15
16/ {
17	compatible = "ti,am4372", "ti,am43";
18	interrupt-parent = <&wakeupgen>;
19
20
21	aliases {
22		i2c0 = &i2c0;
23		i2c1 = &i2c1;
24		i2c2 = &i2c2;
25		serial0 = &uart0;
26		serial1 = &uart1;
27		serial2 = &uart2;
28		serial3 = &uart3;
29		serial4 = &uart4;
30		serial5 = &uart5;
31		ethernet0 = &cpsw_emac0;
32		ethernet1 = &cpsw_emac1;
33		spi0 = &qspi;
34	};
35
36	cpus {
37		#address-cells = <1>;
38		#size-cells = <0>;
39		cpu: cpu@0 {
40			compatible = "arm,cortex-a9";
41			device_type = "cpu";
42			reg = <0>;
43
44			clocks = <&dpll_mpu_ck>;
45			clock-names = "cpu";
46
47			clock-latency = <300000>; /* From omap-cpufreq driver */
48		};
49	};
50
51	gic: interrupt-controller@48241000 {
52		compatible = "arm,cortex-a9-gic";
53		interrupt-controller;
54		#interrupt-cells = <3>;
55		reg = <0x48241000 0x1000>,
56		      <0x48240100 0x0100>;
57		interrupt-parent = <&gic>;
58	};
59
60	wakeupgen: interrupt-controller@48281000 {
61		compatible = "ti,omap4-wugen-mpu";
62		interrupt-controller;
63		#interrupt-cells = <3>;
64		reg = <0x48281000 0x1000>;
65		interrupt-parent = <&gic>;
66	};
67
68	scu: scu@48240000 {
69		compatible = "arm,cortex-a9-scu";
70		reg = <0x48240000 0x100>;
71	};
72
73	global_timer: timer@48240200 {
74		compatible = "arm,cortex-a9-global-timer";
75		reg = <0x48240200 0x100>;
76		interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
77		interrupt-parent = <&gic>;
78		clocks = <&mpu_periphclk>;
79	};
80
81	local_timer: timer@48240600 {
82		compatible = "arm,cortex-a9-twd-timer";
83		reg = <0x48240600 0x100>;
84		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
85		interrupt-parent = <&gic>;
86		clocks = <&mpu_periphclk>;
87	};
88
89	l2-cache-controller@48242000 {
90		compatible = "arm,pl310-cache";
91		reg = <0x48242000 0x1000>;
92		cache-unified;
93		cache-level = <2>;
94	};
95
96	ocp {
97		compatible = "ti,am4372-l3-noc", "simple-bus";
98		#address-cells = <1>;
99		#size-cells = <1>;
100		ranges;
101		ti,hwmods = "l3_main";
102		reg = <0x44000000 0x400000
103		       0x44800000 0x400000>;
104		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
105			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
106
107		l4_wkup: l4_wkup@44c00000 {
108			compatible = "ti,am4-l4-wkup", "simple-bus";
109			#address-cells = <1>;
110			#size-cells = <1>;
111			ranges = <0 0x44c00000 0x287000>;
112
113			wkup_m3: wkup_m3@100000 {
114				compatible = "ti,am4372-wkup-m3";
115				reg = <0x100000 0x4000>,
116				      <0x180000	0x2000>;
117				reg-names = "umem", "dmem";
118				ti,hwmods = "wkup_m3";
119				ti,pm-firmware = "am335x-pm-firmware.elf";
120			};
121
122			prcm: prcm@1f0000 {
123				compatible = "ti,am4-prcm";
124				reg = <0x1f0000 0x11000>;
125				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
126
127				prcm_clocks: clocks {
128					#address-cells = <1>;
129					#size-cells = <0>;
130				};
131
132				prcm_clockdomains: clockdomains {
133				};
134			};
135
136			scm: scm@210000 {
137				compatible = "ti,am4-scm", "simple-bus";
138				reg = <0x210000 0x4000>;
139				#address-cells = <1>;
140				#size-cells = <1>;
141				ranges = <0 0x210000 0x4000>;
142
143				am43xx_pinmux: pinmux@800 {
144					compatible = "ti,am437-padconf",
145						     "pinctrl-single";
146					reg = <0x800 0x31c>;
147					#address-cells = <1>;
148					#size-cells = <0>;
149					#interrupt-cells = <1>;
150					interrupt-controller;
151					pinctrl-single,register-width = <32>;
152					pinctrl-single,function-mask = <0xffffffff>;
153				};
154
155				scm_conf: scm_conf@0 {
156					compatible = "syscon";
157					reg = <0x0 0x800>;
158					#address-cells = <1>;
159					#size-cells = <1>;
160
161					scm_clocks: clocks {
162						#address-cells = <1>;
163						#size-cells = <0>;
164					};
165				};
166
167				wkup_m3_ipc: wkup_m3_ipc@1324 {
168					compatible = "ti,am4372-wkup-m3-ipc";
169					reg = <0x1324 0x44>;
170					interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
171					ti,rproc = <&wkup_m3>;
172					mboxes = <&mailbox &mbox_wkupm3>;
173				};
174
175				edma_xbar: dma-router@f90 {
176					compatible = "ti,am335x-edma-crossbar";
177					reg = <0xf90 0x40>;
178					#dma-cells = <3>;
179					dma-requests = <64>;
180					dma-masters = <&edma>;
181				};
182
183				scm_clockdomains: clockdomains {
184				};
185			};
186		};
187
188		emif: emif@4c000000 {
189			compatible = "ti,emif-am4372";
190			reg = <0x4c000000 0x1000000>;
191			ti,hwmods = "emif";
192		};
193
194		edma: edma@49000000 {
195			compatible = "ti,edma3-tpcc";
196			ti,hwmods = "tpcc";
197			reg =	<0x49000000 0x10000>;
198			reg-names = "edma3_cc";
199			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
200				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
201				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
202			interrupt-names = "edma3_ccint", "emda3_mperr",
203					  "edma3_ccerrint";
204			dma-requests = <64>;
205			#dma-cells = <2>;
206
207			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
208				   <&edma_tptc2 0>;
209
210			ti,edma-memcpy-channels = <32 33>;
211		};
212
213		edma_tptc0: tptc@49800000 {
214			compatible = "ti,edma3-tptc";
215			ti,hwmods = "tptc0";
216			reg =	<0x49800000 0x100000>;
217			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
218			interrupt-names = "edma3_tcerrint";
219		};
220
221		edma_tptc1: tptc@49900000 {
222			compatible = "ti,edma3-tptc";
223			ti,hwmods = "tptc1";
224			reg =	<0x49900000 0x100000>;
225			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
226			interrupt-names = "edma3_tcerrint";
227		};
228
229		edma_tptc2: tptc@49a00000 {
230			compatible = "ti,edma3-tptc";
231			ti,hwmods = "tptc2";
232			reg =	<0x49a00000 0x100000>;
233			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
234			interrupt-names = "edma3_tcerrint";
235		};
236
237		uart0: serial@44e09000 {
238			compatible = "ti,am4372-uart","ti,omap2-uart";
239			reg = <0x44e09000 0x2000>;
240			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
241			ti,hwmods = "uart1";
242		};
243
244		uart1: serial@48022000 {
245			compatible = "ti,am4372-uart","ti,omap2-uart";
246			reg = <0x48022000 0x2000>;
247			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
248			ti,hwmods = "uart2";
249			status = "disabled";
250		};
251
252		uart2: serial@48024000 {
253			compatible = "ti,am4372-uart","ti,omap2-uart";
254			reg = <0x48024000 0x2000>;
255			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
256			ti,hwmods = "uart3";
257			status = "disabled";
258		};
259
260		uart3: serial@481a6000 {
261			compatible = "ti,am4372-uart","ti,omap2-uart";
262			reg = <0x481a6000 0x2000>;
263			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
264			ti,hwmods = "uart4";
265			status = "disabled";
266		};
267
268		uart4: serial@481a8000 {
269			compatible = "ti,am4372-uart","ti,omap2-uart";
270			reg = <0x481a8000 0x2000>;
271			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
272			ti,hwmods = "uart5";
273			status = "disabled";
274		};
275
276		uart5: serial@481aa000 {
277			compatible = "ti,am4372-uart","ti,omap2-uart";
278			reg = <0x481aa000 0x2000>;
279			interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
280			ti,hwmods = "uart6";
281			status = "disabled";
282		};
283
284		mailbox: mailbox@480C8000 {
285			compatible = "ti,omap4-mailbox";
286			reg = <0x480C8000 0x200>;
287			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
288			ti,hwmods = "mailbox";
289			#mbox-cells = <1>;
290			ti,mbox-num-users = <4>;
291			ti,mbox-num-fifos = <8>;
292			mbox_wkupm3: wkup_m3 {
293				ti,mbox-tx = <0 0 0>;
294				ti,mbox-rx = <0 0 3>;
295			};
296		};
297
298		timer1: timer@44e31000 {
299			compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
300			reg = <0x44e31000 0x400>;
301			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
302			ti,timer-alwon;
303			ti,hwmods = "timer1";
304		};
305
306		timer2: timer@48040000  {
307			compatible = "ti,am4372-timer","ti,am335x-timer";
308			reg = <0x48040000  0x400>;
309			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
310			ti,hwmods = "timer2";
311		};
312
313		timer3: timer@48042000 {
314			compatible = "ti,am4372-timer","ti,am335x-timer";
315			reg = <0x48042000 0x400>;
316			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
317			ti,hwmods = "timer3";
318			status = "disabled";
319		};
320
321		timer4: timer@48044000 {
322			compatible = "ti,am4372-timer","ti,am335x-timer";
323			reg = <0x48044000 0x400>;
324			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
325			ti,timer-pwm;
326			ti,hwmods = "timer4";
327			status = "disabled";
328		};
329
330		timer5: timer@48046000 {
331			compatible = "ti,am4372-timer","ti,am335x-timer";
332			reg = <0x48046000 0x400>;
333			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
334			ti,timer-pwm;
335			ti,hwmods = "timer5";
336			status = "disabled";
337		};
338
339		timer6: timer@48048000 {
340			compatible = "ti,am4372-timer","ti,am335x-timer";
341			reg = <0x48048000 0x400>;
342			interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
343			ti,timer-pwm;
344			ti,hwmods = "timer6";
345			status = "disabled";
346		};
347
348		timer7: timer@4804a000 {
349			compatible = "ti,am4372-timer","ti,am335x-timer";
350			reg = <0x4804a000 0x400>;
351			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
352			ti,timer-pwm;
353			ti,hwmods = "timer7";
354			status = "disabled";
355		};
356
357		timer8: timer@481c1000 {
358			compatible = "ti,am4372-timer","ti,am335x-timer";
359			reg = <0x481c1000 0x400>;
360			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
361			ti,hwmods = "timer8";
362			status = "disabled";
363		};
364
365		timer9: timer@4833d000 {
366			compatible = "ti,am4372-timer","ti,am335x-timer";
367			reg = <0x4833d000 0x400>;
368			interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
369			ti,hwmods = "timer9";
370			status = "disabled";
371		};
372
373		timer10: timer@4833f000 {
374			compatible = "ti,am4372-timer","ti,am335x-timer";
375			reg = <0x4833f000 0x400>;
376			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
377			ti,hwmods = "timer10";
378			status = "disabled";
379		};
380
381		timer11: timer@48341000 {
382			compatible = "ti,am4372-timer","ti,am335x-timer";
383			reg = <0x48341000 0x400>;
384			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
385			ti,hwmods = "timer11";
386			status = "disabled";
387		};
388
389		counter32k: counter@44e86000 {
390			compatible = "ti,am4372-counter32k","ti,omap-counter32k";
391			reg = <0x44e86000 0x40>;
392			ti,hwmods = "counter_32k";
393		};
394
395		rtc: rtc@44e3e000 {
396			compatible = "ti,am4372-rtc", "ti,am3352-rtc",
397				     "ti,da830-rtc";
398			reg = <0x44e3e000 0x1000>;
399			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
400				      GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
401			ti,hwmods = "rtc";
402			clocks = <&clk_32768_ck>;
403			clock-names = "int-clk";
404			status = "disabled";
405		};
406
407		wdt: wdt@44e35000 {
408			compatible = "ti,am4372-wdt","ti,omap3-wdt";
409			reg = <0x44e35000 0x1000>;
410			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
411			ti,hwmods = "wd_timer2";
412		};
413
414		gpio0: gpio@44e07000 {
415			compatible = "ti,am4372-gpio","ti,omap4-gpio";
416			reg = <0x44e07000 0x1000>;
417			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
418			gpio-controller;
419			#gpio-cells = <2>;
420			interrupt-controller;
421			#interrupt-cells = <2>;
422			ti,hwmods = "gpio1";
423			status = "disabled";
424		};
425
426		gpio1: gpio@4804c000 {
427			compatible = "ti,am4372-gpio","ti,omap4-gpio";
428			reg = <0x4804c000 0x1000>;
429			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
430			gpio-controller;
431			#gpio-cells = <2>;
432			interrupt-controller;
433			#interrupt-cells = <2>;
434			ti,hwmods = "gpio2";
435			status = "disabled";
436		};
437
438		gpio2: gpio@481ac000 {
439			compatible = "ti,am4372-gpio","ti,omap4-gpio";
440			reg = <0x481ac000 0x1000>;
441			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
442			gpio-controller;
443			#gpio-cells = <2>;
444			interrupt-controller;
445			#interrupt-cells = <2>;
446			ti,hwmods = "gpio3";
447			status = "disabled";
448		};
449
450		gpio3: gpio@481ae000 {
451			compatible = "ti,am4372-gpio","ti,omap4-gpio";
452			reg = <0x481ae000 0x1000>;
453			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
454			gpio-controller;
455			#gpio-cells = <2>;
456			interrupt-controller;
457			#interrupt-cells = <2>;
458			ti,hwmods = "gpio4";
459			status = "disabled";
460		};
461
462		gpio4: gpio@48320000 {
463			compatible = "ti,am4372-gpio","ti,omap4-gpio";
464			reg = <0x48320000 0x1000>;
465			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
466			gpio-controller;
467			#gpio-cells = <2>;
468			interrupt-controller;
469			#interrupt-cells = <2>;
470			ti,hwmods = "gpio5";
471			status = "disabled";
472		};
473
474		gpio5: gpio@48322000 {
475			compatible = "ti,am4372-gpio","ti,omap4-gpio";
476			reg = <0x48322000 0x1000>;
477			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
478			gpio-controller;
479			#gpio-cells = <2>;
480			interrupt-controller;
481			#interrupt-cells = <2>;
482			ti,hwmods = "gpio6";
483			status = "disabled";
484		};
485
486		hwspinlock: spinlock@480ca000 {
487			compatible = "ti,omap4-hwspinlock";
488			reg = <0x480ca000 0x1000>;
489			ti,hwmods = "spinlock";
490			#hwlock-cells = <1>;
491		};
492
493		i2c0: i2c@44e0b000 {
494			compatible = "ti,am4372-i2c","ti,omap4-i2c";
495			reg = <0x44e0b000 0x1000>;
496			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
497			ti,hwmods = "i2c1";
498			#address-cells = <1>;
499			#size-cells = <0>;
500			status = "disabled";
501		};
502
503		i2c1: i2c@4802a000 {
504			compatible = "ti,am4372-i2c","ti,omap4-i2c";
505			reg = <0x4802a000 0x1000>;
506			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
507			ti,hwmods = "i2c2";
508			#address-cells = <1>;
509			#size-cells = <0>;
510			status = "disabled";
511		};
512
513		i2c2: i2c@4819c000 {
514			compatible = "ti,am4372-i2c","ti,omap4-i2c";
515			reg = <0x4819c000 0x1000>;
516			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
517			ti,hwmods = "i2c3";
518			#address-cells = <1>;
519			#size-cells = <0>;
520			status = "disabled";
521		};
522
523		spi0: spi@48030000 {
524			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
525			reg = <0x48030000 0x400>;
526			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
527			ti,hwmods = "spi0";
528			#address-cells = <1>;
529			#size-cells = <0>;
530			status = "disabled";
531		};
532
533		mmc1: mmc@48060000 {
534			compatible = "ti,omap4-hsmmc";
535			reg = <0x48060000 0x1000>;
536			ti,hwmods = "mmc1";
537			ti,dual-volt;
538			ti,needs-special-reset;
539			dmas = <&edma 24 0>,
540				<&edma 25 0>;
541			dma-names = "tx", "rx";
542			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
543			status = "disabled";
544		};
545
546		mmc2: mmc@481d8000 {
547			compatible = "ti,omap4-hsmmc";
548			reg = <0x481d8000 0x1000>;
549			ti,hwmods = "mmc2";
550			ti,needs-special-reset;
551			dmas = <&edma 2 0>,
552				<&edma 3 0>;
553			dma-names = "tx", "rx";
554			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
555			status = "disabled";
556		};
557
558		mmc3: mmc@47810000 {
559			compatible = "ti,omap4-hsmmc";
560			reg = <0x47810000 0x1000>;
561			ti,hwmods = "mmc3";
562			ti,needs-special-reset;
563			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
564			status = "disabled";
565		};
566
567		spi1: spi@481a0000 {
568			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
569			reg = <0x481a0000 0x400>;
570			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
571			ti,hwmods = "spi1";
572			#address-cells = <1>;
573			#size-cells = <0>;
574			status = "disabled";
575		};
576
577		spi2: spi@481a2000 {
578			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
579			reg = <0x481a2000 0x400>;
580			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
581			ti,hwmods = "spi2";
582			#address-cells = <1>;
583			#size-cells = <0>;
584			status = "disabled";
585		};
586
587		spi3: spi@481a4000 {
588			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
589			reg = <0x481a4000 0x400>;
590			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
591			ti,hwmods = "spi3";
592			#address-cells = <1>;
593			#size-cells = <0>;
594			status = "disabled";
595		};
596
597		spi4: spi@48345000 {
598			compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
599			reg = <0x48345000 0x400>;
600			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
601			ti,hwmods = "spi4";
602			#address-cells = <1>;
603			#size-cells = <0>;
604			status = "disabled";
605		};
606
607		mac: ethernet@4a100000 {
608			compatible = "ti,am4372-cpsw","ti,cpsw";
609			reg = <0x4a100000 0x800
610			       0x4a101200 0x100>;
611			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
612				      GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
613				      GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
614				      GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
615			#address-cells = <1>;
616			#size-cells = <1>;
617			ti,hwmods = "cpgmac0";
618			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
619				 <&dpll_clksel_mac_clk>;
620			clock-names = "fck", "cpts", "50mclk";
621			assigned-clocks = <&dpll_clksel_mac_clk>;
622			assigned-clock-rates = <50000000>;
623			status = "disabled";
624			cpdma_channels = <8>;
625			ale_entries = <1024>;
626			bd_ram_size = <0x2000>;
627			no_bd_ram = <0>;
628			rx_descs = <64>;
629			mac_control = <0x20>;
630			slaves = <2>;
631			active_slave = <0>;
632			cpts_clock_mult = <0x80000000>;
633			cpts_clock_shift = <29>;
634			ranges;
635			syscon = <&scm_conf>;
636
637			davinci_mdio: mdio@4a101000 {
638				compatible = "ti,am4372-mdio","ti,davinci_mdio";
639				reg = <0x4a101000 0x100>;
640				#address-cells = <1>;
641				#size-cells = <0>;
642				ti,hwmods = "davinci_mdio";
643				bus_freq = <1000000>;
644				status = "disabled";
645			};
646
647			cpsw_emac0: slave@4a100200 {
648				/* Filled in by U-Boot */
649				mac-address = [ 00 00 00 00 00 00 ];
650			};
651
652			cpsw_emac1: slave@4a100300 {
653				/* Filled in by U-Boot */
654				mac-address = [ 00 00 00 00 00 00 ];
655			};
656
657			phy_sel: cpsw-phy-sel@44e10650 {
658				compatible = "ti,am43xx-cpsw-phy-sel";
659				reg= <0x44e10650 0x4>;
660				reg-names = "gmii-sel";
661			};
662		};
663
664		epwmss0: epwmss@48300000 {
665			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
666			reg = <0x48300000 0x10>;
667			#address-cells = <1>;
668			#size-cells = <1>;
669			ranges;
670			ti,hwmods = "epwmss0";
671			status = "disabled";
672
673			ecap0: ecap@48300100 {
674				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
675				#pwm-cells = <3>;
676				reg = <0x48300100 0x80>;
677				ti,hwmods = "ecap0";
678				status = "disabled";
679			};
680
681			ehrpwm0: ehrpwm@48300200 {
682				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
683				#pwm-cells = <3>;
684				reg = <0x48300200 0x80>;
685				ti,hwmods = "ehrpwm0";
686				status = "disabled";
687			};
688		};
689
690		epwmss1: epwmss@48302000 {
691			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
692			reg = <0x48302000 0x10>;
693			#address-cells = <1>;
694			#size-cells = <1>;
695			ranges;
696			ti,hwmods = "epwmss1";
697			status = "disabled";
698
699			ecap1: ecap@48302100 {
700				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
701				#pwm-cells = <3>;
702				reg = <0x48302100 0x80>;
703				ti,hwmods = "ecap1";
704				status = "disabled";
705			};
706
707			ehrpwm1: ehrpwm@48302200 {
708				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
709				#pwm-cells = <3>;
710				reg = <0x48302200 0x80>;
711				ti,hwmods = "ehrpwm1";
712				status = "disabled";
713			};
714		};
715
716		epwmss2: epwmss@48304000 {
717			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
718			reg = <0x48304000 0x10>;
719			#address-cells = <1>;
720			#size-cells = <1>;
721			ranges;
722			ti,hwmods = "epwmss2";
723			status = "disabled";
724
725			ecap2: ecap@48304100 {
726				compatible = "ti,am4372-ecap","ti,am33xx-ecap";
727				#pwm-cells = <3>;
728				reg = <0x48304100 0x80>;
729				ti,hwmods = "ecap2";
730				status = "disabled";
731			};
732
733			ehrpwm2: ehrpwm@48304200 {
734				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
735				#pwm-cells = <3>;
736				reg = <0x48304200 0x80>;
737				ti,hwmods = "ehrpwm2";
738				status = "disabled";
739			};
740		};
741
742		epwmss3: epwmss@48306000 {
743			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
744			reg = <0x48306000 0x10>;
745			#address-cells = <1>;
746			#size-cells = <1>;
747			ranges;
748			ti,hwmods = "epwmss3";
749			status = "disabled";
750
751			ehrpwm3: ehrpwm@48306200 {
752				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
753				#pwm-cells = <3>;
754				reg = <0x48306200 0x80>;
755				ti,hwmods = "ehrpwm3";
756				status = "disabled";
757			};
758		};
759
760		epwmss4: epwmss@48308000 {
761			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
762			reg = <0x48308000 0x10>;
763			#address-cells = <1>;
764			#size-cells = <1>;
765			ranges;
766			ti,hwmods = "epwmss4";
767			status = "disabled";
768
769			ehrpwm4: ehrpwm@48308200 {
770				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
771				#pwm-cells = <3>;
772				reg = <0x48308200 0x80>;
773				ti,hwmods = "ehrpwm4";
774				status = "disabled";
775			};
776		};
777
778		epwmss5: epwmss@4830a000 {
779			compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
780			reg = <0x4830a000 0x10>;
781			#address-cells = <1>;
782			#size-cells = <1>;
783			ranges;
784			ti,hwmods = "epwmss5";
785			status = "disabled";
786
787			ehrpwm5: ehrpwm@4830a200 {
788				compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
789				#pwm-cells = <3>;
790				reg = <0x4830a200 0x80>;
791				ti,hwmods = "ehrpwm5";
792				status = "disabled";
793			};
794		};
795
796		tscadc: tscadc@44e0d000 {
797			compatible = "ti,am3359-tscadc";
798			reg = <0x44e0d000 0x1000>;
799			ti,hwmods = "adc_tsc";
800			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
801			clocks = <&adc_tsc_fck>;
802			clock-names = "fck";
803			status = "disabled";
804
805			tsc {
806				compatible = "ti,am3359-tsc";
807			};
808
809			adc {
810				#io-channel-cells = <1>;
811				compatible = "ti,am3359-adc";
812			};
813
814		};
815
816		sham: sham@53100000 {
817			compatible = "ti,omap5-sham";
818			ti,hwmods = "sham";
819			reg = <0x53100000 0x300>;
820			dmas = <&edma 36 0>;
821			dma-names = "rx";
822			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
823		};
824
825		aes: aes@53501000 {
826			compatible = "ti,omap4-aes";
827			ti,hwmods = "aes";
828			reg = <0x53501000 0xa0>;
829			interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
830			dmas = <&edma 6 0>,
831				<&edma 5 0>;
832			dma-names = "tx", "rx";
833		};
834
835		des: des@53701000 {
836			compatible = "ti,omap4-des";
837			ti,hwmods = "des";
838			reg = <0x53701000 0xa0>;
839			interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
840			dmas = <&edma 34 0>,
841				<&edma 33 0>;
842			dma-names = "tx", "rx";
843		};
844
845		mcasp0: mcasp@48038000 {
846			compatible = "ti,am33xx-mcasp-audio";
847			ti,hwmods = "mcasp0";
848			reg = <0x48038000 0x2000>,
849			      <0x46000000 0x400000>;
850			reg-names = "mpu", "dat";
851			interrupts = <80>, <81>;
852			interrupt-names = "tx", "rx";
853			status = "disabled";
854			dmas = <&edma 8 2>,
855			       <&edma 9 2>;
856			dma-names = "tx", "rx";
857		};
858
859		mcasp1: mcasp@4803C000 {
860			compatible = "ti,am33xx-mcasp-audio";
861			ti,hwmods = "mcasp1";
862			reg = <0x4803C000 0x2000>,
863			      <0x46400000 0x400000>;
864			reg-names = "mpu", "dat";
865			interrupts = <82>, <83>;
866			interrupt-names = "tx", "rx";
867			status = "disabled";
868			dmas = <&edma 10 2>,
869			       <&edma 11 2>;
870			dma-names = "tx", "rx";
871		};
872
873		elm: elm@48080000 {
874			compatible = "ti,am3352-elm";
875			reg = <0x48080000 0x2000>;
876			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
877			ti,hwmods = "elm";
878			clocks = <&l4ls_gclk>;
879			clock-names = "fck";
880			status = "disabled";
881		};
882
883		gpmc: gpmc@50000000 {
884			compatible = "ti,am3352-gpmc";
885			ti,hwmods = "gpmc";
886			dmas = <&edma 52>;
887			dma-names = "rxtx";
888			clocks = <&l3s_gclk>;
889			clock-names = "fck";
890			reg = <0x50000000 0x2000>;
891			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
892			gpmc,num-cs = <7>;
893			gpmc,num-waitpins = <2>;
894			#address-cells = <2>;
895			#size-cells = <1>;
896			status = "disabled";
897		};
898
899		am43xx_control_usb2phy1: control-phy@44e10620 {
900			compatible = "ti,control-phy-usb2-am437";
901			reg = <0x44e10620 0x4>;
902			reg-names = "power";
903		};
904
905		am43xx_control_usb2phy2: control-phy@0x44e10628 {
906			compatible = "ti,control-phy-usb2-am437";
907			reg = <0x44e10628 0x4>;
908			reg-names = "power";
909		};
910
911		ocp2scp0: ocp2scp@483a8000 {
912			compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
913			#address-cells = <1>;
914			#size-cells = <1>;
915			ranges;
916			ti,hwmods = "ocp2scp0";
917
918			usb2_phy1: phy@483a8000 {
919				compatible = "ti,am437x-usb2";
920				reg = <0x483a8000 0x8000>;
921				ctrl-module = <&am43xx_control_usb2phy1>;
922				clocks = <&usb_phy0_always_on_clk32k>,
923					 <&usb_otg_ss0_refclk960m>;
924				clock-names = "wkupclk", "refclk";
925				#phy-cells = <0>;
926				status = "disabled";
927			};
928		};
929
930		ocp2scp1: ocp2scp@483e8000 {
931			compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
932			#address-cells = <1>;
933			#size-cells = <1>;
934			ranges;
935			ti,hwmods = "ocp2scp1";
936
937			usb2_phy2: phy@483e8000 {
938				compatible = "ti,am437x-usb2";
939				reg = <0x483e8000 0x8000>;
940				ctrl-module = <&am43xx_control_usb2phy2>;
941				clocks = <&usb_phy1_always_on_clk32k>,
942					 <&usb_otg_ss1_refclk960m>;
943				clock-names = "wkupclk", "refclk";
944				#phy-cells = <0>;
945				status = "disabled";
946			};
947		};
948
949		dwc3_1: omap_dwc3@48380000 {
950			compatible = "ti,am437x-dwc3";
951			ti,hwmods = "usb_otg_ss0";
952			reg = <0x48380000 0x10000>;
953			interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
954			#address-cells = <1>;
955			#size-cells = <1>;
956			utmi-mode = <1>;
957			ranges;
958
959			usb1: usb@48390000 {
960				compatible = "synopsys,dwc3";
961				reg = <0x48390000 0x10000>;
962				interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
963					     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
964					     <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
965				interrupt-names = "peripheral",
966						  "host",
967						  "otg";
968				phys = <&usb2_phy1>;
969				phy-names = "usb2-phy";
970				maximum-speed = "high-speed";
971				dr_mode = "otg";
972				status = "disabled";
973				snps,dis_u3_susphy_quirk;
974				snps,dis_u2_susphy_quirk;
975			};
976		};
977
978		dwc3_2: omap_dwc3@483c0000 {
979			compatible = "ti,am437x-dwc3";
980			ti,hwmods = "usb_otg_ss1";
981			reg = <0x483c0000 0x10000>;
982			interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
983			#address-cells = <1>;
984			#size-cells = <1>;
985			utmi-mode = <1>;
986			ranges;
987
988			usb2: usb@483d0000 {
989				compatible = "synopsys,dwc3";
990				reg = <0x483d0000 0x10000>;
991				interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
992					     <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
993					     <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
994				interrupt-names = "peripheral",
995						  "host",
996						  "otg";
997				phys = <&usb2_phy2>;
998				phy-names = "usb2-phy";
999				maximum-speed = "high-speed";
1000				dr_mode = "otg";
1001				status = "disabled";
1002				snps,dis_u3_susphy_quirk;
1003				snps,dis_u2_susphy_quirk;
1004			};
1005		};
1006
1007		qspi: qspi@47900000 {
1008			compatible = "ti,am4372-qspi";
1009			reg = <0x47900000 0x100>,
1010			      <0x30000000 0x4000000>;
1011			reg-names = "qspi_base", "qspi_mmap";
1012			#address-cells = <1>;
1013			#size-cells = <0>;
1014			ti,hwmods = "qspi";
1015			interrupts = <0 138 0x4>;
1016			num-cs = <4>;
1017			status = "disabled";
1018		};
1019
1020		hdq: hdq@48347000 {
1021			compatible = "ti,am4372-hdq";
1022			reg = <0x48347000 0x1000>;
1023			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
1024			clocks = <&func_12m_clk>;
1025			clock-names = "fck";
1026			ti,hwmods = "hdq1w";
1027			status = "disabled";
1028		};
1029
1030		dss: dss@4832a000 {
1031			compatible = "ti,omap3-dss";
1032			reg = <0x4832a000 0x200>;
1033			status = "disabled";
1034			ti,hwmods = "dss_core";
1035			clocks = <&disp_clk>;
1036			clock-names = "fck";
1037			#address-cells = <1>;
1038			#size-cells = <1>;
1039			ranges;
1040
1041			dispc: dispc@4832a400 {
1042				compatible = "ti,omap3-dispc";
1043				reg = <0x4832a400 0x400>;
1044				interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1045				ti,hwmods = "dss_dispc";
1046				clocks = <&disp_clk>;
1047				clock-names = "fck";
1048			};
1049
1050			rfbi: rfbi@4832a800 {
1051				compatible = "ti,omap3-rfbi";
1052				reg = <0x4832a800 0x100>;
1053				ti,hwmods = "dss_rfbi";
1054				clocks = <&disp_clk>;
1055				clock-names = "fck";
1056				status = "disabled";
1057			};
1058		};
1059
1060		ocmcram: ocmcram@40300000 {
1061			compatible = "mmio-sram";
1062			reg = <0x40300000 0x40000>; /* 256k */
1063		};
1064
1065		dcan0: can@481cc000 {
1066			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1067			ti,hwmods = "d_can0";
1068			clocks = <&dcan0_fck>;
1069			clock-names = "fck";
1070			reg = <0x481cc000 0x2000>;
1071			syscon-raminit = <&scm_conf 0x644 0>;
1072			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1073			status = "disabled";
1074		};
1075
1076		dcan1: can@481d0000 {
1077			compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1078			ti,hwmods = "d_can1";
1079			clocks = <&dcan1_fck>;
1080			clock-names = "fck";
1081			reg = <0x481d0000 0x2000>;
1082			syscon-raminit = <&scm_conf 0x644 1>;
1083			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1084			status = "disabled";
1085		};
1086
1087		vpfe0: vpfe@48326000 {
1088			compatible = "ti,am437x-vpfe";
1089			reg = <0x48326000 0x2000>;
1090			interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1091			ti,hwmods = "vpfe0";
1092			status = "disabled";
1093		};
1094
1095		vpfe1: vpfe@48328000 {
1096			compatible = "ti,am437x-vpfe";
1097			reg = <0x48328000 0x2000>;
1098			interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1099			ti,hwmods = "vpfe1";
1100			status = "disabled";
1101		};
1102	};
1103};
1104
1105/include/ "am43xx-clocks.dtsi"
1106