1/* 2 * Device Tree Source for AM33XX SoC 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/pinctrl/am33xx.h> 13 14#include "skeleton.dtsi" 15 16/ { 17 compatible = "ti,am33xx"; 18 interrupt-parent = <&intc>; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 serial0 = &uart0; 25 serial1 = &uart1; 26 serial2 = &uart2; 27 serial3 = &uart3; 28 serial4 = &uart4; 29 serial5 = &uart5; 30 d_can0 = &dcan0; 31 d_can1 = &dcan1; 32 usb0 = &usb0; 33 usb1 = &usb1; 34 phy0 = &usb0_phy; 35 phy1 = &usb1_phy; 36 ethernet0 = &cpsw_emac0; 37 ethernet1 = &cpsw_emac1; 38 }; 39 40 cpus { 41 #address-cells = <1>; 42 #size-cells = <0>; 43 cpu@0 { 44 compatible = "arm,cortex-a8"; 45 device_type = "cpu"; 46 reg = <0>; 47 48 /* 49 * To consider voltage drop between PMIC and SoC, 50 * tolerance value is reduced to 2% from 4% and 51 * voltage value is increased as a precaution. 52 */ 53 operating-points = < 54 /* kHz uV */ 55 720000 1285000 56 600000 1225000 57 500000 1125000 58 275000 1125000 59 >; 60 voltage-tolerance = <2>; /* 2 percentage */ 61 62 clocks = <&dpll_mpu_ck>; 63 clock-names = "cpu"; 64 65 clock-latency = <300000>; /* From omap-cpufreq driver */ 66 }; 67 }; 68 69 pmu { 70 compatible = "arm,cortex-a8-pmu"; 71 interrupts = <3>; 72 }; 73 74 /* 75 * The soc node represents the soc top level view. It is used for IPs 76 * that are not memory mapped in the MPU view or for the MPU itself. 77 */ 78 soc { 79 compatible = "ti,omap-infra"; 80 mpu { 81 compatible = "ti,omap3-mpu"; 82 ti,hwmods = "mpu"; 83 }; 84 }; 85 86 /* 87 * XXX: Use a flat representation of the AM33XX interconnect. 88 * The real AM33XX interconnect network is quite complex. Since 89 * it will not bring real advantage to represent that in DT 90 * for the moment, just use a fake OCP bus entry to represent 91 * the whole bus hierarchy. 92 */ 93 ocp { 94 compatible = "simple-bus"; 95 #address-cells = <1>; 96 #size-cells = <1>; 97 ranges; 98 ti,hwmods = "l3_main"; 99 100 l4_wkup: l4_wkup@44c00000 { 101 compatible = "ti,am3-l4-wkup", "simple-bus"; 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges = <0 0x44c00000 0x280000>; 105 106 wkup_m3: wkup_m3@100000 { 107 compatible = "ti,am3352-wkup-m3"; 108 reg = <0x100000 0x4000>, 109 <0x180000 0x2000>; 110 reg-names = "umem", "dmem"; 111 ti,hwmods = "wkup_m3"; 112 ti,pm-firmware = "am335x-pm-firmware.elf"; 113 }; 114 115 prcm: prcm@200000 { 116 compatible = "ti,am3-prcm"; 117 reg = <0x200000 0x4000>; 118 119 prcm_clocks: clocks { 120 #address-cells = <1>; 121 #size-cells = <0>; 122 }; 123 124 prcm_clockdomains: clockdomains { 125 }; 126 }; 127 128 scm: scm@210000 { 129 compatible = "ti,am3-scm", "simple-bus"; 130 reg = <0x210000 0x2000>; 131 #address-cells = <1>; 132 #size-cells = <1>; 133 ranges = <0 0x210000 0x2000>; 134 135 am33xx_pinmux: pinmux@800 { 136 compatible = "pinctrl-single"; 137 reg = <0x800 0x238>; 138 #address-cells = <1>; 139 #size-cells = <0>; 140 pinctrl-single,register-width = <32>; 141 pinctrl-single,function-mask = <0x7f>; 142 }; 143 144 scm_conf: scm_conf@0 { 145 compatible = "syscon"; 146 reg = <0x0 0x800>; 147 #address-cells = <1>; 148 #size-cells = <1>; 149 150 scm_clocks: clocks { 151 #address-cells = <1>; 152 #size-cells = <0>; 153 }; 154 }; 155 156 wkup_m3_ipc: wkup_m3_ipc@1324 { 157 compatible = "ti,am3352-wkup-m3-ipc"; 158 reg = <0x1324 0x24>; 159 interrupts = <78>; 160 ti,rproc = <&wkup_m3>; 161 mboxes = <&mailbox &mbox_wkupm3>; 162 }; 163 164 edma_xbar: dma-router@f90 { 165 compatible = "ti,am335x-edma-crossbar"; 166 reg = <0xf90 0x40>; 167 #dma-cells = <3>; 168 dma-requests = <32>; 169 dma-masters = <&edma>; 170 }; 171 172 scm_clockdomains: clockdomains { 173 }; 174 }; 175 }; 176 177 intc: interrupt-controller@48200000 { 178 compatible = "ti,am33xx-intc"; 179 interrupt-controller; 180 #interrupt-cells = <1>; 181 reg = <0x48200000 0x1000>; 182 }; 183 184 edma: edma@49000000 { 185 compatible = "ti,edma3-tpcc"; 186 ti,hwmods = "tpcc"; 187 reg = <0x49000000 0x10000>; 188 reg-names = "edma3_cc"; 189 interrupts = <12 13 14>; 190 interrupt-names = "edma3_ccint", "emda3_mperr", 191 "edma3_ccerrint"; 192 dma-requests = <64>; 193 #dma-cells = <2>; 194 195 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, 196 <&edma_tptc2 0>; 197 198 ti,edma-memcpy-channels = <20 21>; 199 }; 200 201 edma_tptc0: tptc@49800000 { 202 compatible = "ti,edma3-tptc"; 203 ti,hwmods = "tptc0"; 204 reg = <0x49800000 0x100000>; 205 interrupts = <112>; 206 interrupt-names = "edma3_tcerrint"; 207 }; 208 209 edma_tptc1: tptc@49900000 { 210 compatible = "ti,edma3-tptc"; 211 ti,hwmods = "tptc1"; 212 reg = <0x49900000 0x100000>; 213 interrupts = <113>; 214 interrupt-names = "edma3_tcerrint"; 215 }; 216 217 edma_tptc2: tptc@49a00000 { 218 compatible = "ti,edma3-tptc"; 219 ti,hwmods = "tptc2"; 220 reg = <0x49a00000 0x100000>; 221 interrupts = <114>; 222 interrupt-names = "edma3_tcerrint"; 223 }; 224 225 gpio0: gpio@44e07000 { 226 compatible = "ti,omap4-gpio"; 227 ti,hwmods = "gpio1"; 228 gpio-controller; 229 #gpio-cells = <2>; 230 interrupt-controller; 231 #interrupt-cells = <2>; 232 reg = <0x44e07000 0x1000>; 233 interrupts = <96>; 234 }; 235 236 gpio1: gpio@4804c000 { 237 compatible = "ti,omap4-gpio"; 238 ti,hwmods = "gpio2"; 239 gpio-controller; 240 #gpio-cells = <2>; 241 interrupt-controller; 242 #interrupt-cells = <2>; 243 reg = <0x4804c000 0x1000>; 244 interrupts = <98>; 245 }; 246 247 gpio2: gpio@481ac000 { 248 compatible = "ti,omap4-gpio"; 249 ti,hwmods = "gpio3"; 250 gpio-controller; 251 #gpio-cells = <2>; 252 interrupt-controller; 253 #interrupt-cells = <2>; 254 reg = <0x481ac000 0x1000>; 255 interrupts = <32>; 256 }; 257 258 gpio3: gpio@481ae000 { 259 compatible = "ti,omap4-gpio"; 260 ti,hwmods = "gpio4"; 261 gpio-controller; 262 #gpio-cells = <2>; 263 interrupt-controller; 264 #interrupt-cells = <2>; 265 reg = <0x481ae000 0x1000>; 266 interrupts = <62>; 267 }; 268 269 uart0: serial@44e09000 { 270 compatible = "ti,am3352-uart", "ti,omap3-uart"; 271 ti,hwmods = "uart1"; 272 clock-frequency = <48000000>; 273 reg = <0x44e09000 0x2000>; 274 interrupts = <72>; 275 status = "disabled"; 276 dmas = <&edma 26 0>, <&edma 27 0>; 277 dma-names = "tx", "rx"; 278 }; 279 280 uart1: serial@48022000 { 281 compatible = "ti,am3352-uart", "ti,omap3-uart"; 282 ti,hwmods = "uart2"; 283 clock-frequency = <48000000>; 284 reg = <0x48022000 0x2000>; 285 interrupts = <73>; 286 status = "disabled"; 287 dmas = <&edma 28 0>, <&edma 29 0>; 288 dma-names = "tx", "rx"; 289 }; 290 291 uart2: serial@48024000 { 292 compatible = "ti,am3352-uart", "ti,omap3-uart"; 293 ti,hwmods = "uart3"; 294 clock-frequency = <48000000>; 295 reg = <0x48024000 0x2000>; 296 interrupts = <74>; 297 status = "disabled"; 298 dmas = <&edma 30 0>, <&edma 31 0>; 299 dma-names = "tx", "rx"; 300 }; 301 302 uart3: serial@481a6000 { 303 compatible = "ti,am3352-uart", "ti,omap3-uart"; 304 ti,hwmods = "uart4"; 305 clock-frequency = <48000000>; 306 reg = <0x481a6000 0x2000>; 307 interrupts = <44>; 308 status = "disabled"; 309 }; 310 311 uart4: serial@481a8000 { 312 compatible = "ti,am3352-uart", "ti,omap3-uart"; 313 ti,hwmods = "uart5"; 314 clock-frequency = <48000000>; 315 reg = <0x481a8000 0x2000>; 316 interrupts = <45>; 317 status = "disabled"; 318 }; 319 320 uart5: serial@481aa000 { 321 compatible = "ti,am3352-uart", "ti,omap3-uart"; 322 ti,hwmods = "uart6"; 323 clock-frequency = <48000000>; 324 reg = <0x481aa000 0x2000>; 325 interrupts = <46>; 326 status = "disabled"; 327 }; 328 329 i2c0: i2c@44e0b000 { 330 compatible = "ti,omap4-i2c"; 331 #address-cells = <1>; 332 #size-cells = <0>; 333 ti,hwmods = "i2c1"; 334 reg = <0x44e0b000 0x1000>; 335 interrupts = <70>; 336 status = "disabled"; 337 }; 338 339 i2c1: i2c@4802a000 { 340 compatible = "ti,omap4-i2c"; 341 #address-cells = <1>; 342 #size-cells = <0>; 343 ti,hwmods = "i2c2"; 344 reg = <0x4802a000 0x1000>; 345 interrupts = <71>; 346 status = "disabled"; 347 }; 348 349 i2c2: i2c@4819c000 { 350 compatible = "ti,omap4-i2c"; 351 #address-cells = <1>; 352 #size-cells = <0>; 353 ti,hwmods = "i2c3"; 354 reg = <0x4819c000 0x1000>; 355 interrupts = <30>; 356 status = "disabled"; 357 }; 358 359 mmc1: mmc@48060000 { 360 compatible = "ti,omap4-hsmmc"; 361 ti,hwmods = "mmc1"; 362 ti,dual-volt; 363 ti,needs-special-reset; 364 ti,needs-special-hs-handling; 365 dmas = <&edma_xbar 24 0 0 366 &edma_xbar 25 0 0>; 367 dma-names = "tx", "rx"; 368 interrupts = <64>; 369 interrupt-parent = <&intc>; 370 reg = <0x48060000 0x1000>; 371 status = "disabled"; 372 }; 373 374 mmc2: mmc@481d8000 { 375 compatible = "ti,omap4-hsmmc"; 376 ti,hwmods = "mmc2"; 377 ti,needs-special-reset; 378 dmas = <&edma 2 0 379 &edma 3 0>; 380 dma-names = "tx", "rx"; 381 interrupts = <28>; 382 interrupt-parent = <&intc>; 383 reg = <0x481d8000 0x1000>; 384 status = "disabled"; 385 }; 386 387 mmc3: mmc@47810000 { 388 compatible = "ti,omap4-hsmmc"; 389 ti,hwmods = "mmc3"; 390 ti,needs-special-reset; 391 interrupts = <29>; 392 interrupt-parent = <&intc>; 393 reg = <0x47810000 0x1000>; 394 status = "disabled"; 395 }; 396 397 hwspinlock: spinlock@480ca000 { 398 compatible = "ti,omap4-hwspinlock"; 399 reg = <0x480ca000 0x1000>; 400 ti,hwmods = "spinlock"; 401 #hwlock-cells = <1>; 402 }; 403 404 wdt2: wdt@44e35000 { 405 compatible = "ti,omap3-wdt"; 406 ti,hwmods = "wd_timer2"; 407 reg = <0x44e35000 0x1000>; 408 interrupts = <91>; 409 }; 410 411 dcan0: can@481cc000 { 412 compatible = "ti,am3352-d_can"; 413 ti,hwmods = "d_can0"; 414 reg = <0x481cc000 0x2000>; 415 clocks = <&dcan0_fck>; 416 clock-names = "fck"; 417 syscon-raminit = <&scm_conf 0x644 0>; 418 interrupts = <52>; 419 status = "disabled"; 420 }; 421 422 dcan1: can@481d0000 { 423 compatible = "ti,am3352-d_can"; 424 ti,hwmods = "d_can1"; 425 reg = <0x481d0000 0x2000>; 426 clocks = <&dcan1_fck>; 427 clock-names = "fck"; 428 syscon-raminit = <&scm_conf 0x644 1>; 429 interrupts = <55>; 430 status = "disabled"; 431 }; 432 433 mailbox: mailbox@480C8000 { 434 compatible = "ti,omap4-mailbox"; 435 reg = <0x480C8000 0x200>; 436 interrupts = <77>; 437 ti,hwmods = "mailbox"; 438 #mbox-cells = <1>; 439 ti,mbox-num-users = <4>; 440 ti,mbox-num-fifos = <8>; 441 mbox_wkupm3: wkup_m3 { 442 ti,mbox-tx = <0 0 0>; 443 ti,mbox-rx = <0 0 3>; 444 }; 445 }; 446 447 timer1: timer@44e31000 { 448 compatible = "ti,am335x-timer-1ms"; 449 reg = <0x44e31000 0x400>; 450 interrupts = <67>; 451 ti,hwmods = "timer1"; 452 ti,timer-alwon; 453 }; 454 455 timer2: timer@48040000 { 456 compatible = "ti,am335x-timer"; 457 reg = <0x48040000 0x400>; 458 interrupts = <68>; 459 ti,hwmods = "timer2"; 460 }; 461 462 timer3: timer@48042000 { 463 compatible = "ti,am335x-timer"; 464 reg = <0x48042000 0x400>; 465 interrupts = <69>; 466 ti,hwmods = "timer3"; 467 }; 468 469 timer4: timer@48044000 { 470 compatible = "ti,am335x-timer"; 471 reg = <0x48044000 0x400>; 472 interrupts = <92>; 473 ti,hwmods = "timer4"; 474 ti,timer-pwm; 475 }; 476 477 timer5: timer@48046000 { 478 compatible = "ti,am335x-timer"; 479 reg = <0x48046000 0x400>; 480 interrupts = <93>; 481 ti,hwmods = "timer5"; 482 ti,timer-pwm; 483 }; 484 485 timer6: timer@48048000 { 486 compatible = "ti,am335x-timer"; 487 reg = <0x48048000 0x400>; 488 interrupts = <94>; 489 ti,hwmods = "timer6"; 490 ti,timer-pwm; 491 }; 492 493 timer7: timer@4804a000 { 494 compatible = "ti,am335x-timer"; 495 reg = <0x4804a000 0x400>; 496 interrupts = <95>; 497 ti,hwmods = "timer7"; 498 ti,timer-pwm; 499 }; 500 501 rtc: rtc@44e3e000 { 502 compatible = "ti,am3352-rtc", "ti,da830-rtc"; 503 reg = <0x44e3e000 0x1000>; 504 interrupts = <75 505 76>; 506 ti,hwmods = "rtc"; 507 }; 508 509 spi0: spi@48030000 { 510 compatible = "ti,omap4-mcspi"; 511 #address-cells = <1>; 512 #size-cells = <0>; 513 reg = <0x48030000 0x400>; 514 interrupts = <65>; 515 ti,spi-num-cs = <2>; 516 ti,hwmods = "spi0"; 517 dmas = <&edma 16 0 518 &edma 17 0 519 &edma 18 0 520 &edma 19 0>; 521 dma-names = "tx0", "rx0", "tx1", "rx1"; 522 status = "disabled"; 523 }; 524 525 spi1: spi@481a0000 { 526 compatible = "ti,omap4-mcspi"; 527 #address-cells = <1>; 528 #size-cells = <0>; 529 reg = <0x481a0000 0x400>; 530 interrupts = <125>; 531 ti,spi-num-cs = <2>; 532 ti,hwmods = "spi1"; 533 dmas = <&edma 42 0 534 &edma 43 0 535 &edma 44 0 536 &edma 45 0>; 537 dma-names = "tx0", "rx0", "tx1", "rx1"; 538 status = "disabled"; 539 }; 540 541 usb: usb@47400000 { 542 compatible = "ti,am33xx-usb"; 543 reg = <0x47400000 0x1000>; 544 ranges; 545 #address-cells = <1>; 546 #size-cells = <1>; 547 ti,hwmods = "usb_otg_hs"; 548 status = "disabled"; 549 550 usb_ctrl_mod: control@44e10620 { 551 compatible = "ti,am335x-usb-ctrl-module"; 552 reg = <0x44e10620 0x10 553 0x44e10648 0x4>; 554 reg-names = "phy_ctrl", "wakeup"; 555 status = "disabled"; 556 }; 557 558 usb0_phy: usb-phy@47401300 { 559 compatible = "ti,am335x-usb-phy"; 560 reg = <0x47401300 0x100>; 561 reg-names = "phy"; 562 status = "disabled"; 563 ti,ctrl_mod = <&usb_ctrl_mod>; 564 }; 565 566 usb0: usb@47401000 { 567 compatible = "ti,musb-am33xx"; 568 status = "disabled"; 569 reg = <0x47401400 0x400 570 0x47401000 0x200>; 571 reg-names = "mc", "control"; 572 573 interrupts = <18>; 574 interrupt-names = "mc"; 575 dr_mode = "otg"; 576 mentor,multipoint = <1>; 577 mentor,num-eps = <16>; 578 mentor,ram-bits = <12>; 579 mentor,power = <500>; 580 phys = <&usb0_phy>; 581 582 dmas = <&cppi41dma 0 0 &cppi41dma 1 0 583 &cppi41dma 2 0 &cppi41dma 3 0 584 &cppi41dma 4 0 &cppi41dma 5 0 585 &cppi41dma 6 0 &cppi41dma 7 0 586 &cppi41dma 8 0 &cppi41dma 9 0 587 &cppi41dma 10 0 &cppi41dma 11 0 588 &cppi41dma 12 0 &cppi41dma 13 0 589 &cppi41dma 14 0 &cppi41dma 0 1 590 &cppi41dma 1 1 &cppi41dma 2 1 591 &cppi41dma 3 1 &cppi41dma 4 1 592 &cppi41dma 5 1 &cppi41dma 6 1 593 &cppi41dma 7 1 &cppi41dma 8 1 594 &cppi41dma 9 1 &cppi41dma 10 1 595 &cppi41dma 11 1 &cppi41dma 12 1 596 &cppi41dma 13 1 &cppi41dma 14 1>; 597 dma-names = 598 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 599 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 600 "rx14", "rx15", 601 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 602 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 603 "tx14", "tx15"; 604 }; 605 606 usb1_phy: usb-phy@47401b00 { 607 compatible = "ti,am335x-usb-phy"; 608 reg = <0x47401b00 0x100>; 609 reg-names = "phy"; 610 status = "disabled"; 611 ti,ctrl_mod = <&usb_ctrl_mod>; 612 }; 613 614 usb1: usb@47401800 { 615 compatible = "ti,musb-am33xx"; 616 status = "disabled"; 617 reg = <0x47401c00 0x400 618 0x47401800 0x200>; 619 reg-names = "mc", "control"; 620 interrupts = <19>; 621 interrupt-names = "mc"; 622 dr_mode = "otg"; 623 mentor,multipoint = <1>; 624 mentor,num-eps = <16>; 625 mentor,ram-bits = <12>; 626 mentor,power = <500>; 627 phys = <&usb1_phy>; 628 629 dmas = <&cppi41dma 15 0 &cppi41dma 16 0 630 &cppi41dma 17 0 &cppi41dma 18 0 631 &cppi41dma 19 0 &cppi41dma 20 0 632 &cppi41dma 21 0 &cppi41dma 22 0 633 &cppi41dma 23 0 &cppi41dma 24 0 634 &cppi41dma 25 0 &cppi41dma 26 0 635 &cppi41dma 27 0 &cppi41dma 28 0 636 &cppi41dma 29 0 &cppi41dma 15 1 637 &cppi41dma 16 1 &cppi41dma 17 1 638 &cppi41dma 18 1 &cppi41dma 19 1 639 &cppi41dma 20 1 &cppi41dma 21 1 640 &cppi41dma 22 1 &cppi41dma 23 1 641 &cppi41dma 24 1 &cppi41dma 25 1 642 &cppi41dma 26 1 &cppi41dma 27 1 643 &cppi41dma 28 1 &cppi41dma 29 1>; 644 dma-names = 645 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 646 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 647 "rx14", "rx15", 648 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 649 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 650 "tx14", "tx15"; 651 }; 652 653 cppi41dma: dma-controller@47402000 { 654 compatible = "ti,am3359-cppi41"; 655 reg = <0x47400000 0x1000 656 0x47402000 0x1000 657 0x47403000 0x1000 658 0x47404000 0x4000>; 659 reg-names = "glue", "controller", "scheduler", "queuemgr"; 660 interrupts = <17>; 661 interrupt-names = "glue"; 662 #dma-cells = <2>; 663 #dma-channels = <30>; 664 #dma-requests = <256>; 665 status = "disabled"; 666 }; 667 }; 668 669 epwmss0: epwmss@48300000 { 670 compatible = "ti,am33xx-pwmss"; 671 reg = <0x48300000 0x10>; 672 ti,hwmods = "epwmss0"; 673 #address-cells = <1>; 674 #size-cells = <1>; 675 status = "disabled"; 676 ranges = <0x48300100 0x48300100 0x80 /* ECAP */ 677 0x48300180 0x48300180 0x80 /* EQEP */ 678 0x48300200 0x48300200 0x80>; /* EHRPWM */ 679 680 ecap0: ecap@48300100 { 681 compatible = "ti,am33xx-ecap"; 682 #pwm-cells = <3>; 683 reg = <0x48300100 0x80>; 684 interrupts = <31>; 685 interrupt-names = "ecap0"; 686 ti,hwmods = "ecap0"; 687 status = "disabled"; 688 }; 689 690 ehrpwm0: ehrpwm@48300200 { 691 compatible = "ti,am33xx-ehrpwm"; 692 #pwm-cells = <3>; 693 reg = <0x48300200 0x80>; 694 ti,hwmods = "ehrpwm0"; 695 status = "disabled"; 696 }; 697 }; 698 699 epwmss1: epwmss@48302000 { 700 compatible = "ti,am33xx-pwmss"; 701 reg = <0x48302000 0x10>; 702 ti,hwmods = "epwmss1"; 703 #address-cells = <1>; 704 #size-cells = <1>; 705 status = "disabled"; 706 ranges = <0x48302100 0x48302100 0x80 /* ECAP */ 707 0x48302180 0x48302180 0x80 /* EQEP */ 708 0x48302200 0x48302200 0x80>; /* EHRPWM */ 709 710 ecap1: ecap@48302100 { 711 compatible = "ti,am33xx-ecap"; 712 #pwm-cells = <3>; 713 reg = <0x48302100 0x80>; 714 interrupts = <47>; 715 interrupt-names = "ecap1"; 716 ti,hwmods = "ecap1"; 717 status = "disabled"; 718 }; 719 720 ehrpwm1: ehrpwm@48302200 { 721 compatible = "ti,am33xx-ehrpwm"; 722 #pwm-cells = <3>; 723 reg = <0x48302200 0x80>; 724 ti,hwmods = "ehrpwm1"; 725 status = "disabled"; 726 }; 727 }; 728 729 epwmss2: epwmss@48304000 { 730 compatible = "ti,am33xx-pwmss"; 731 reg = <0x48304000 0x10>; 732 ti,hwmods = "epwmss2"; 733 #address-cells = <1>; 734 #size-cells = <1>; 735 status = "disabled"; 736 ranges = <0x48304100 0x48304100 0x80 /* ECAP */ 737 0x48304180 0x48304180 0x80 /* EQEP */ 738 0x48304200 0x48304200 0x80>; /* EHRPWM */ 739 740 ecap2: ecap@48304100 { 741 compatible = "ti,am33xx-ecap"; 742 #pwm-cells = <3>; 743 reg = <0x48304100 0x80>; 744 interrupts = <61>; 745 interrupt-names = "ecap2"; 746 ti,hwmods = "ecap2"; 747 status = "disabled"; 748 }; 749 750 ehrpwm2: ehrpwm@48304200 { 751 compatible = "ti,am33xx-ehrpwm"; 752 #pwm-cells = <3>; 753 reg = <0x48304200 0x80>; 754 ti,hwmods = "ehrpwm2"; 755 status = "disabled"; 756 }; 757 }; 758 759 mac: ethernet@4a100000 { 760 compatible = "ti,am335x-cpsw","ti,cpsw"; 761 ti,hwmods = "cpgmac0"; 762 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 763 clock-names = "fck", "cpts"; 764 cpdma_channels = <8>; 765 ale_entries = <1024>; 766 bd_ram_size = <0x2000>; 767 no_bd_ram = <0>; 768 rx_descs = <64>; 769 mac_control = <0x20>; 770 slaves = <2>; 771 active_slave = <0>; 772 cpts_clock_mult = <0x80000000>; 773 cpts_clock_shift = <29>; 774 reg = <0x4a100000 0x800 775 0x4a101200 0x100>; 776 #address-cells = <1>; 777 #size-cells = <1>; 778 interrupt-parent = <&intc>; 779 /* 780 * c0_rx_thresh_pend 781 * c0_rx_pend 782 * c0_tx_pend 783 * c0_misc_pend 784 */ 785 interrupts = <40 41 42 43>; 786 ranges; 787 syscon = <&scm_conf>; 788 status = "disabled"; 789 790 davinci_mdio: mdio@4a101000 { 791 compatible = "ti,davinci_mdio"; 792 #address-cells = <1>; 793 #size-cells = <0>; 794 ti,hwmods = "davinci_mdio"; 795 bus_freq = <1000000>; 796 reg = <0x4a101000 0x100>; 797 status = "disabled"; 798 }; 799 800 cpsw_emac0: slave@4a100200 { 801 /* Filled in by U-Boot */ 802 mac-address = [ 00 00 00 00 00 00 ]; 803 }; 804 805 cpsw_emac1: slave@4a100300 { 806 /* Filled in by U-Boot */ 807 mac-address = [ 00 00 00 00 00 00 ]; 808 }; 809 810 phy_sel: cpsw-phy-sel@44e10650 { 811 compatible = "ti,am3352-cpsw-phy-sel"; 812 reg= <0x44e10650 0x4>; 813 reg-names = "gmii-sel"; 814 }; 815 }; 816 817 ocmcram: ocmcram@40300000 { 818 compatible = "mmio-sram"; 819 reg = <0x40300000 0x10000>; /* 64k */ 820 }; 821 822 elm: elm@48080000 { 823 compatible = "ti,am3352-elm"; 824 reg = <0x48080000 0x2000>; 825 interrupts = <4>; 826 ti,hwmods = "elm"; 827 status = "disabled"; 828 }; 829 830 lcdc: lcdc@4830e000 { 831 compatible = "ti,am33xx-tilcdc"; 832 reg = <0x4830e000 0x1000>; 833 interrupt-parent = <&intc>; 834 interrupts = <36>; 835 ti,hwmods = "lcdc"; 836 status = "disabled"; 837 }; 838 839 tscadc: tscadc@44e0d000 { 840 compatible = "ti,am3359-tscadc"; 841 reg = <0x44e0d000 0x1000>; 842 interrupt-parent = <&intc>; 843 interrupts = <16>; 844 ti,hwmods = "adc_tsc"; 845 status = "disabled"; 846 847 tsc { 848 compatible = "ti,am3359-tsc"; 849 }; 850 am335x_adc: adc { 851 #io-channel-cells = <1>; 852 compatible = "ti,am3359-adc"; 853 }; 854 }; 855 856 gpmc: gpmc@50000000 { 857 compatible = "ti,am3352-gpmc"; 858 ti,hwmods = "gpmc"; 859 ti,no-idle-on-init; 860 reg = <0x50000000 0x2000>; 861 interrupts = <100>; 862 dmas = <&edma 52>; 863 dma-names = "rxtx"; 864 gpmc,num-cs = <7>; 865 gpmc,num-waitpins = <2>; 866 #address-cells = <2>; 867 #size-cells = <1>; 868 status = "disabled"; 869 }; 870 871 sham: sham@53100000 { 872 compatible = "ti,omap4-sham"; 873 ti,hwmods = "sham"; 874 reg = <0x53100000 0x200>; 875 interrupts = <109>; 876 dmas = <&edma 36 0>; 877 dma-names = "rx"; 878 }; 879 880 aes: aes@53500000 { 881 compatible = "ti,omap4-aes"; 882 ti,hwmods = "aes"; 883 reg = <0x53500000 0xa0>; 884 interrupts = <103>; 885 dmas = <&edma 6 0>, 886 <&edma 5 0>; 887 dma-names = "tx", "rx"; 888 }; 889 890 mcasp0: mcasp@48038000 { 891 compatible = "ti,am33xx-mcasp-audio"; 892 ti,hwmods = "mcasp0"; 893 reg = <0x48038000 0x2000>, 894 <0x46000000 0x400000>; 895 reg-names = "mpu", "dat"; 896 interrupts = <80>, <81>; 897 interrupt-names = "tx", "rx"; 898 status = "disabled"; 899 dmas = <&edma 8 2>, 900 <&edma 9 2>; 901 dma-names = "tx", "rx"; 902 }; 903 904 mcasp1: mcasp@4803C000 { 905 compatible = "ti,am33xx-mcasp-audio"; 906 ti,hwmods = "mcasp1"; 907 reg = <0x4803C000 0x2000>, 908 <0x46400000 0x400000>; 909 reg-names = "mpu", "dat"; 910 interrupts = <82>, <83>; 911 interrupt-names = "tx", "rx"; 912 status = "disabled"; 913 dmas = <&edma 10 2>, 914 <&edma 11 2>; 915 dma-names = "tx", "rx"; 916 }; 917 918 rng: rng@48310000 { 919 compatible = "ti,omap4-rng"; 920 ti,hwmods = "rng"; 921 reg = <0x48310000 0x2000>; 922 interrupts = <111>; 923 }; 924 }; 925}; 926 927/include/ "am33xx-clocks.dtsi" 928