1/*-
2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/*
28 * This driver supports several multiport USB-to-RS232 serial adapters driven
29 * by MosChip mos7820 and mos7840, bridge chips.
30 * The adapters are sold under many different brand names.
31 *
32 * Datasheets are available at MosChip www site at
33 * http://www.moschip.com.  The datasheets don't contain full
34 * programming information for the chip.
35 *
36 * It is nornal to have only two enabled ports in devices, based on
37 * quad-port mos7840.
38 *
39 */
40#include <sys/cdefs.h>
41__FBSDID("$FreeBSD: releng/11.0/sys/dev/usb/serial/umcs.c 298300 2016-04-19 22:07:36Z pfg $");
42
43#include <sys/stdint.h>
44#include <sys/stddef.h>
45#include <sys/param.h>
46#include <sys/queue.h>
47#include <sys/types.h>
48#include <sys/systm.h>
49#include <sys/kernel.h>
50#include <sys/bus.h>
51#include <sys/linker_set.h>
52#include <sys/module.h>
53#include <sys/lock.h>
54#include <sys/mutex.h>
55#include <sys/condvar.h>
56#include <sys/sysctl.h>
57#include <sys/sx.h>
58#include <sys/unistd.h>
59#include <sys/callout.h>
60#include <sys/malloc.h>
61#include <sys/priv.h>
62
63#include <dev/usb/usb.h>
64#include <dev/usb/usbdi.h>
65#include <dev/usb/usbdi_util.h>
66#include <dev/usb/usb_cdc.h>
67#include "usbdevs.h"
68
69#define	USB_DEBUG_VAR umcs_debug
70#include <dev/usb/usb_debug.h>
71#include <dev/usb/usb_process.h>
72
73#include <dev/usb/serial/usb_serial.h>
74
75#include <dev/usb/serial/umcs.h>
76
77#define	UMCS7840_MODVER	1
78
79#ifdef USB_DEBUG
80static int umcs_debug = 0;
81
82static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
83SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RWTUN, &umcs_debug, 0, "Debug level");
84#endif					/* USB_DEBUG */
85
86
87/*
88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89 * have ports 0 and 2, with ports 1 and 3 omitted.
90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
91 * This driver trys to use physical numbers as much as possible.
92 */
93
94/*
95 * Indexed by PHYSICAL port number.
96 * Pack non-regular registers to array to easier if-less access.
97 */
98struct umcs7840_port_registers {
99	uint8_t	reg_sp;			/* SP register. */
100	uint8_t	reg_control;		/* CONTROL register. */
101	uint8_t	reg_dcr;		/* DCR0 register. DCR1 & DCR2 can be
102					 * calculated */
103};
104
105static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
106	{.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
107	{.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
108	{.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
109	{.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
110};
111
112enum {
113	UMCS7840_BULK_RD_EP,
114	UMCS7840_BULK_WR_EP,
115	UMCS7840_N_TRANSFERS
116};
117
118struct umcs7840_softc_oneport {
119	struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS];	/* Control structures
120							 * for two transfers */
121
122	uint8_t	sc_lcr;			/* local line control register */
123	uint8_t	sc_mcr;			/* local modem control register */
124};
125
126struct umcs7840_softc {
127	struct ucom_super_softc sc_super_ucom;
128	struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS];	/* Need to be continuous
129							 * array, so indexed by
130							 * LOGICAL port
131							 * (subunit) number */
132
133	struct usb_xfer *sc_intr_xfer;	/* Interrupt endpoint */
134
135	device_t sc_dev;		/* Device for error prints */
136	struct usb_device *sc_udev;	/* USB Device for all operations */
137	struct mtx sc_mtx;		/* ucom requires this */
138
139	uint8_t	sc_driver_done;		/* Flag when enumeration is finished */
140
141	uint8_t	sc_numports;		/* Number of ports (subunits) */
142	struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS];	/* Indexed by PHYSICAL
143									 * port number. */
144};
145
146/* prototypes */
147static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
148static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
149static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
150static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
151
152static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
153static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
154
155static void	umcs7840_free(struct ucom_softc *);
156static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
157static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
158static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
159static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
160static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
161static void umcs7840_cfg_open(struct ucom_softc *);
162static void umcs7840_cfg_close(struct ucom_softc *);
163
164static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
165
166static void umcs7840_start_read(struct ucom_softc *);
167static void umcs7840_stop_read(struct ucom_softc *);
168
169static void umcs7840_start_write(struct ucom_softc *);
170static void umcs7840_stop_write(struct ucom_softc *);
171
172static void umcs7840_poll(struct ucom_softc *ucom);
173
174static device_probe_t umcs7840_probe;
175static device_attach_t umcs7840_attach;
176static device_detach_t umcs7840_detach;
177static void umcs7840_free_softc(struct umcs7840_softc *);
178
179static usb_callback_t umcs7840_intr_callback;
180static usb_callback_t umcs7840_read_callback1;
181static usb_callback_t umcs7840_read_callback2;
182static usb_callback_t umcs7840_read_callback3;
183static usb_callback_t umcs7840_read_callback4;
184static usb_callback_t umcs7840_write_callback1;
185static usb_callback_t umcs7840_write_callback2;
186static usb_callback_t umcs7840_write_callback3;
187static usb_callback_t umcs7840_write_callback4;
188
189static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
190static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
191
192/* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
193static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
194	{&umcs7840_read_callback1, &umcs7840_write_callback1},
195	{&umcs7840_read_callback2, &umcs7840_write_callback2},
196	{&umcs7840_read_callback3, &umcs7840_write_callback3},
197	{&umcs7840_read_callback4, &umcs7840_write_callback4},
198};
199
200static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
201	[UMCS7840_BULK_RD_EP] = {
202		.type = UE_BULK,
203		.endpoint = 0x01,
204		.direction = UE_DIR_IN,
205		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
206		.bufsize = 0,		/* use wMaxPacketSize */
207		.callback = &umcs7840_read_callback1,
208		.if_index = 0,
209	},
210
211	[UMCS7840_BULK_WR_EP] = {
212		.type = UE_BULK,
213		.endpoint = 0x02,
214		.direction = UE_DIR_OUT,
215		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
216		.bufsize = 0,		/* use wMaxPacketSize */
217		.callback = &umcs7840_write_callback1,
218		.if_index = 0,
219	},
220};
221
222static const struct usb_config umcs7840_intr_config_data[1] = {
223	[0] = {
224		.type = UE_INTERRUPT,
225		.endpoint = 0x09,
226		.direction = UE_DIR_IN,
227		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
228		.bufsize = 0,		/* use wMaxPacketSize */
229		.callback = &umcs7840_intr_callback,
230		.if_index = 0,
231	},
232};
233
234static struct ucom_callback umcs7840_callback = {
235	.ucom_cfg_get_status = &umcs7840_cfg_get_status,
236
237	.ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
238	.ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
239	.ucom_cfg_set_break = &umcs7840_cfg_set_break,
240
241	.ucom_cfg_param = &umcs7840_cfg_param,
242	.ucom_cfg_open = &umcs7840_cfg_open,
243	.ucom_cfg_close = &umcs7840_cfg_close,
244
245	.ucom_pre_param = &umcs7840_pre_param,
246
247	.ucom_start_read = &umcs7840_start_read,
248	.ucom_stop_read = &umcs7840_stop_read,
249
250	.ucom_start_write = &umcs7840_start_write,
251	.ucom_stop_write = &umcs7840_stop_write,
252
253	.ucom_poll = &umcs7840_poll,
254	.ucom_free = &umcs7840_free,
255};
256
257static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
258	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
259	{USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
260};
261
262static device_method_t umcs7840_methods[] = {
263	DEVMETHOD(device_probe, umcs7840_probe),
264	DEVMETHOD(device_attach, umcs7840_attach),
265	DEVMETHOD(device_detach, umcs7840_detach),
266	DEVMETHOD_END
267};
268
269static devclass_t umcs7840_devclass;
270
271static driver_t umcs7840_driver = {
272	.name = "umcs7840",
273	.methods = umcs7840_methods,
274	.size = sizeof(struct umcs7840_softc),
275};
276
277DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
278MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
279MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
280MODULE_VERSION(umcs7840, UMCS7840_MODVER);
281USB_PNP_HOST_INFO(umcs7840_devs);
282
283static int
284umcs7840_probe(device_t dev)
285{
286	struct usb_attach_arg *uaa = device_get_ivars(dev);
287
288	if (uaa->usb_mode != USB_MODE_HOST)
289		return (ENXIO);
290	if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
291		return (ENXIO);
292	if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
293		return (ENXIO);
294	return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
295}
296
297static int
298umcs7840_attach(device_t dev)
299{
300	struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
301	struct usb_attach_arg *uaa = device_get_ivars(dev);
302	struct umcs7840_softc *sc = device_get_softc(dev);
303
304	uint8_t iface_index = MCS7840_IFACE_INDEX;
305	int error;
306	int subunit;
307	int n;
308	uint8_t data;
309
310	for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
311		umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
312
313	device_set_usb_desc(dev);
314	mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
315	ucom_ref(&sc->sc_super_ucom);
316
317	sc->sc_dev = dev;
318	sc->sc_udev = uaa->device;
319
320	/*
321	 * Get number of ports
322	 * Documentation (full datasheet) says, that number of ports is
323	 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
324	 * register. But vendor driver uses these undocumented
325	 * register & bit.
326	 *
327	 * Experiments show, that MODE register can have `0'
328	 * (4 ports) bit on 2-port device, so use vendor driver's way.
329	 *
330	 * Also, see notes in header file for these constants.
331	 */
332	umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
333	if (data & MCS7840_DEV_GPIO_4PORTS) {
334		sc->sc_numports = 4;
335		/* Store physical port numbers in sc_portno */
336		sc->sc_ucom[0].sc_portno = 0;
337		sc->sc_ucom[1].sc_portno = 1;
338		sc->sc_ucom[2].sc_portno = 2;
339		sc->sc_ucom[3].sc_portno = 3;
340	} else {
341		sc->sc_numports = 2;
342		/* Store physical port numbers in sc_portno */
343		sc->sc_ucom[0].sc_portno = 0;
344		sc->sc_ucom[1].sc_portno = 2;	/* '1' is skipped */
345	}
346	device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
347	if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
348		device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
349		    (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
350		    (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
351		    (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
352		    (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
353		    (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
354		    (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
355		    (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
356	}
357	/* Setup all transfers */
358	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
359		for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
360			/* Set endpoint address */
361			umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
362			umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
363		}
364		error = usbd_transfer_setup(uaa->device,
365		    &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
366		    UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
367		if (error) {
368			device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
369			    subunit + 1, sc->sc_numports);
370			goto detach;
371		}
372	}
373	error = usbd_transfer_setup(uaa->device,
374	    &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
375	    1, sc, &sc->sc_mtx);
376	if (error) {
377		device_printf(dev, "allocating USB transfers failed for interrupt\n");
378		goto detach;
379	}
380	/* clear stall at first run */
381	mtx_lock(&sc->sc_mtx);
382	for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
383		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
384		usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
385	}
386	mtx_unlock(&sc->sc_mtx);
387
388	error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
389	    &umcs7840_callback, &sc->sc_mtx);
390	if (error)
391		goto detach;
392
393	ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
394
395	return (0);
396
397detach:
398	umcs7840_detach(dev);
399	return (ENXIO);
400}
401
402static int
403umcs7840_detach(device_t dev)
404{
405	struct umcs7840_softc *sc = device_get_softc(dev);
406	int subunit;
407
408	ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
409
410	for (subunit = 0; subunit < sc->sc_numports; ++subunit)
411		usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
412	usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
413
414	device_claim_softc(dev);
415
416	umcs7840_free_softc(sc);
417
418	return (0);
419}
420
421UCOM_UNLOAD_DRAIN(umcs7840);
422
423static void
424umcs7840_free_softc(struct umcs7840_softc *sc)
425{
426	if (ucom_unref(&sc->sc_super_ucom)) {
427		mtx_destroy(&sc->sc_mtx);
428		device_free_softc(sc);
429	}
430}
431
432static void
433umcs7840_free(struct ucom_softc *ucom)
434{
435	umcs7840_free_softc(ucom->sc_parent);
436}
437
438static void
439umcs7840_cfg_open(struct ucom_softc *ucom)
440{
441	struct umcs7840_softc *sc = ucom->sc_parent;
442	uint16_t pn = ucom->sc_portno;
443	uint8_t data;
444
445	/* If it very first open, finish global configuration */
446	if (!sc->sc_driver_done) {
447		/*
448		 * USB enumeration is finished, pass internal memory to FIFOs
449		 * If it is done in the end of "attach", kernel panics.
450		 */
451		if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
452			return;
453		data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
454		if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
455			return;
456		sc->sc_driver_done = 1;
457	}
458	/* Toggle reset bit on-off */
459	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
460		return;
461	data |= MCS7840_DEV_SPx_UART_RESET;
462	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
463		return;
464	data &= ~MCS7840_DEV_SPx_UART_RESET;
465	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
466		return;
467
468	/* Set RS-232 mode */
469	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
470		return;
471
472	/* Disable RX on time of initialization */
473	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
474		return;
475	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
476	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
477		return;
478
479	/* Disable all interrupts */
480	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
481		return;
482
483	/* Reset FIFO -- documented */
484	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
485		return;
486	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
487	    MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
488	    MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
489		return;
490
491	/* Set 8 bit, no parity, 1 stop bit -- documented */
492	sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
493	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
494		return;
495
496	/*
497	 * Enable DTR/RTS on modem control, enable modem interrupts --
498	 * documented
499	 */
500	sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
501	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
502		return;
503
504	/* Clearing Bulkin and Bulkout FIFO */
505	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
506		return;
507	data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
508	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
509		return;
510	data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
511	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
512		return;
513
514	/* Set speed 9600 */
515	if (umcs7840_set_baudrate(sc, pn, 9600))
516		return;
517
518
519	/* Finally enable all interrupts -- documented */
520	/*
521	 * Copied from vendor driver, I don't know why we should read LCR
522	 * here
523	 */
524	if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
525		return;
526	if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
527	    MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
528		return;
529
530	/* Enable RX */
531	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
532		return;
533	data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
534	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
535		return;
536
537	DPRINTF("Port %d has been opened\n", pn);
538}
539
540static void
541umcs7840_cfg_close(struct ucom_softc *ucom)
542{
543	struct umcs7840_softc *sc = ucom->sc_parent;
544	uint16_t pn = ucom->sc_portno;
545	uint8_t data;
546
547	umcs7840_stop_read(ucom);
548	umcs7840_stop_write(ucom);
549
550	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
551	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
552
553	/* Disable RX */
554	if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
555		return;
556	data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
557	if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
558		return;
559	DPRINTF("Port %d has been closed\n", pn);
560}
561
562static void
563umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
564{
565	struct umcs7840_softc *sc = ucom->sc_parent;
566	uint8_t pn = ucom->sc_portno;
567
568	if (onoff)
569		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
570	else
571		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
572
573	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
574	DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
575}
576
577static void
578umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
579{
580	struct umcs7840_softc *sc = ucom->sc_parent;
581	uint8_t pn = ucom->sc_portno;
582
583	if (onoff)
584		sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
585	else
586		sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
587
588	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
589	DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
590}
591
592static void
593umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
594{
595	struct umcs7840_softc *sc = ucom->sc_parent;
596	uint8_t pn = ucom->sc_portno;
597
598	if (onoff)
599		sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
600	else
601		sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
602
603	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
604	DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
605}
606
607
608static void
609umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
610{
611	struct umcs7840_softc *sc = ucom->sc_parent;
612	uint8_t pn = ucom->sc_portno;
613	uint8_t lcr = sc->sc_ports[pn].sc_lcr;
614	uint8_t mcr = sc->sc_ports[pn].sc_mcr;
615
616	DPRINTF("Port %d config:\n", pn);
617	if (t->c_cflag & CSTOPB) {
618		DPRINTF("  2 stop bits\n");
619		lcr |= MCS7840_UART_LCR_STOPB2;
620	} else {
621		lcr |= MCS7840_UART_LCR_STOPB1;
622		DPRINTF("  1 stop bit\n");
623	}
624
625	lcr &= ~MCS7840_UART_LCR_PARITYMASK;
626	if (t->c_cflag & PARENB) {
627		lcr |= MCS7840_UART_LCR_PARITYON;
628		if (t->c_cflag & PARODD) {
629			lcr = MCS7840_UART_LCR_PARITYODD;
630			DPRINTF("  parity on - odd\n");
631		} else {
632			lcr = MCS7840_UART_LCR_PARITYEVEN;
633			DPRINTF("  parity on - even\n");
634		}
635	} else {
636		lcr &= ~MCS7840_UART_LCR_PARITYON;
637		DPRINTF("  parity off\n");
638	}
639
640	lcr &= ~MCS7840_UART_LCR_DATALENMASK;
641	switch (t->c_cflag & CSIZE) {
642	case CS5:
643		lcr |= MCS7840_UART_LCR_DATALEN5;
644		DPRINTF("  5 bit\n");
645		break;
646	case CS6:
647		lcr |= MCS7840_UART_LCR_DATALEN6;
648		DPRINTF("  6 bit\n");
649		break;
650	case CS7:
651		lcr |= MCS7840_UART_LCR_DATALEN7;
652		DPRINTF("  7 bit\n");
653		break;
654	case CS8:
655		lcr |= MCS7840_UART_LCR_DATALEN8;
656		DPRINTF("  8 bit\n");
657		break;
658	}
659
660	if (t->c_cflag & CRTSCTS) {
661		mcr |= MCS7840_UART_MCR_CTSRTS;
662		DPRINTF("  CTS/RTS\n");
663	} else
664		mcr &= ~MCS7840_UART_MCR_CTSRTS;
665
666	if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
667		mcr |= MCS7840_UART_MCR_DTRDSR;
668		DPRINTF("  DTR/DSR\n");
669	} else
670		mcr &= ~MCS7840_UART_MCR_DTRDSR;
671
672	sc->sc_ports[pn].sc_lcr = lcr;
673	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
674	DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
675
676	sc->sc_ports[pn].sc_mcr = mcr;
677	umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
678	DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
679
680	umcs7840_set_baudrate(sc, pn, t->c_ospeed);
681}
682
683
684static int
685umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
686{
687	uint8_t clk;
688	uint16_t divisor;
689
690	if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
691		return (EINVAL);
692	return (0);
693}
694
695static void
696umcs7840_start_read(struct ucom_softc *ucom)
697{
698	struct umcs7840_softc *sc = ucom->sc_parent;
699	uint8_t pn = ucom->sc_portno;
700
701	/* Start interrupt transfer */
702	usbd_transfer_start(sc->sc_intr_xfer);
703
704	/* Start read transfer */
705	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
706}
707
708static void
709umcs7840_stop_read(struct ucom_softc *ucom)
710{
711	struct umcs7840_softc *sc = ucom->sc_parent;
712	uint8_t pn = ucom->sc_portno;
713
714	/* Stop read transfer */
715	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
716}
717
718static void
719umcs7840_start_write(struct ucom_softc *ucom)
720{
721	struct umcs7840_softc *sc = ucom->sc_parent;
722	uint8_t pn = ucom->sc_portno;
723
724	/* Start interrupt transfer */
725	usbd_transfer_start(sc->sc_intr_xfer);
726
727	/* Start write transfer */
728	usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
729}
730
731static void
732umcs7840_stop_write(struct ucom_softc *ucom)
733{
734	struct umcs7840_softc *sc = ucom->sc_parent;
735	uint8_t pn = ucom->sc_portno;
736
737	/* Stop write transfer */
738	usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
739}
740
741static void
742umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
743{
744	struct umcs7840_softc *sc = ucom->sc_parent;
745	uint8_t pn = ucom->sc_portno;
746	uint8_t	hw_lsr = 0;	/* local line status register */
747	uint8_t	hw_msr = 0;	/* local modem status register */
748
749	/* Read LSR & MSR */
750	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &hw_lsr);
751	umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr);
752
753	*lsr = hw_lsr;
754	*msr = hw_msr;
755
756	DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
757}
758
759static void
760umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
761{
762	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
763	struct usb_page_cache *pc;
764	uint8_t buf[13];
765	int actlen;
766	int subunit;
767
768	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
769
770	switch (USB_GET_STATE(xfer)) {
771	case USB_ST_TRANSFERRED:
772		if (actlen == 5 || actlen == 13) {
773			pc = usbd_xfer_get_frame(xfer, 0);
774			usbd_copy_out(pc, 0, buf, actlen);
775			/* Check status of all ports */
776			for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
777				uint8_t pn = sc->sc_ucom[subunit].sc_portno;
778
779				if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
780					continue;
781				DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
782				switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
783				case MCS7840_UART_ISR_RXERR:
784				case MCS7840_UART_ISR_RXHASDATA:
785				case MCS7840_UART_ISR_RXTIMEOUT:
786				case MCS7840_UART_ISR_MSCHANGE:
787					ucom_status_change(&sc->sc_ucom[subunit]);
788					break;
789				default:
790					/* Do nothing */
791					break;
792				}
793			}
794		} else
795			device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
796		/* FALLTHROUGH */
797	case USB_ST_SETUP:
798tr_setup:
799		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
800		usbd_transfer_submit(xfer);
801		return;
802
803	default:			/* Error */
804		if (error != USB_ERR_CANCELLED) {
805			/* try to clear stall first */
806			usbd_xfer_set_stall(xfer);
807			goto tr_setup;
808		}
809		return;
810	}
811}
812
813static void
814umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
815{
816	umcs7840_read_callbackN(xfer, error, 0);
817}
818
819static void
820umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
821{
822	umcs7840_read_callbackN(xfer, error, 1);
823}
824static void
825umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
826{
827	umcs7840_read_callbackN(xfer, error, 2);
828}
829
830static void
831umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
832{
833	umcs7840_read_callbackN(xfer, error, 3);
834}
835
836static void
837umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
838{
839	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
840	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
841	struct usb_page_cache *pc;
842	int actlen;
843
844	usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
845
846	DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
847
848	switch (USB_GET_STATE(xfer)) {
849	case USB_ST_TRANSFERRED:
850		pc = usbd_xfer_get_frame(xfer, 0);
851		ucom_put_data(ucom, pc, 0, actlen);
852		/* FALLTHROUGH */
853	case USB_ST_SETUP:
854tr_setup:
855		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
856		usbd_transfer_submit(xfer);
857		return;
858
859	default:			/* Error */
860		if (error != USB_ERR_CANCELLED) {
861			/* try to clear stall first */
862			usbd_xfer_set_stall(xfer);
863			goto tr_setup;
864		}
865		return;
866	}
867}
868
869static void
870umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
871{
872	umcs7840_write_callbackN(xfer, error, 0);
873}
874
875static void
876umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
877{
878	umcs7840_write_callbackN(xfer, error, 1);
879}
880
881static void
882umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
883{
884	umcs7840_write_callbackN(xfer, error, 2);
885}
886
887static void
888umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
889{
890	umcs7840_write_callbackN(xfer, error, 3);
891}
892
893static void
894umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
895{
896	struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
897	struct ucom_softc *ucom = &sc->sc_ucom[subunit];
898	struct usb_page_cache *pc;
899	uint32_t actlen;
900
901	DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
902
903	switch (USB_GET_STATE(xfer)) {
904	case USB_ST_SETUP:
905	case USB_ST_TRANSFERRED:
906tr_setup:
907		pc = usbd_xfer_get_frame(xfer, 0);
908		if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
909			DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
910			usbd_xfer_set_frame_len(xfer, 0, actlen);
911			usbd_transfer_submit(xfer);
912		}
913		return;
914
915	default:			/* Error */
916		if (error != USB_ERR_CANCELLED) {
917			/* try to clear stall first */
918			usbd_xfer_set_stall(xfer);
919			goto tr_setup;
920		}
921		return;
922	}
923}
924
925static void
926umcs7840_poll(struct ucom_softc *ucom)
927{
928	struct umcs7840_softc *sc = ucom->sc_parent;
929
930	DPRINTF("Port %d poll\n", ucom->sc_portno);
931	usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
932	usbd_transfer_poll(&sc->sc_intr_xfer, 1);
933}
934
935static usb_error_t
936umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
937{
938	struct usb_device_request req;
939	usb_error_t err;
940	uint16_t len;
941
942	req.bmRequestType = UT_READ_VENDOR_DEVICE;
943	req.bRequest = MCS7840_RDREQ;
944	USETW(req.wValue, 0);
945	USETW(req.wIndex, reg);
946	USETW(req.wLength, UMCS7840_READ_LENGTH);
947
948	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
949	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
950		device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
951		return (USB_ERR_INVAL);
952	} else if (err)
953		device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
954	return (err);
955}
956
957static usb_error_t
958umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
959{
960	struct usb_device_request req;
961	usb_error_t err;
962
963	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
964	req.bRequest = MCS7840_WRREQ;
965	USETW(req.wValue, data);
966	USETW(req.wIndex, reg);
967	USETW(req.wLength, 0);
968
969	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
970	if (err)
971		device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
972
973	return (err);
974}
975
976static usb_error_t
977umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
978{
979	struct usb_device_request req;
980	uint16_t wVal;
981	usb_error_t err;
982	uint16_t len;
983
984	/* portno is port number */
985	wVal = ((uint16_t)(portno + 1)) << 8;
986
987	req.bmRequestType = UT_READ_VENDOR_DEVICE;
988	req.bRequest = MCS7840_RDREQ;
989	USETW(req.wValue, wVal);
990	USETW(req.wIndex, reg);
991	USETW(req.wLength, UMCS7840_READ_LENGTH);
992
993	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
994	if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
995		device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
996		return (USB_ERR_INVAL);
997	} else if (err)
998		device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
999	return (err);
1000}
1001
1002static usb_error_t
1003umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
1004{
1005	struct usb_device_request req;
1006	usb_error_t err;
1007	uint16_t wVal;
1008
1009	/* portno is port number */
1010	wVal = ((uint16_t)(portno + 1)) << 8 | data;
1011
1012	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1013	req.bRequest = MCS7840_WRREQ;
1014	USETW(req.wValue, wVal);
1015	USETW(req.wIndex, reg);
1016	USETW(req.wLength, 0);
1017
1018	err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
1019	if (err)
1020		device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1021	return (err);
1022}
1023
1024static usb_error_t
1025umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1026{
1027	usb_error_t err;
1028	uint16_t divisor;
1029	uint8_t clk;
1030	uint8_t data;
1031
1032	if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1033		DPRINTF("Port %d bad speed: %d\n", portno, rate);
1034		return (-1);
1035	}
1036	if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1037		DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1038		return (-1);
1039	}
1040	DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1041
1042	/* Set clock source for standard BAUD frequences */
1043	err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1044	if (err)
1045		return (err);
1046	data &= MCS7840_DEV_SPx_CLOCK_MASK;
1047	data |= clk;
1048	err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1049	if (err)
1050		return (err);
1051
1052	/* Set divider */
1053	sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1054	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1055	if (err)
1056		return (err);
1057
1058	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1059	if (err)
1060		return (err);
1061	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1062	if (err)
1063		return (err);
1064
1065	/* Turn off access to DLL/DLM registers of UART */
1066	sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1067	err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1068	if (err)
1069		return (err);
1070	return (0);
1071}
1072
1073/* Maximum speeds for standard frequences, when PLL is not used */
1074static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1075static const uint8_t umcs7840_baudrate_divisors_len = nitems(umcs7840_baudrate_divisors);
1076
1077static usb_error_t
1078umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1079{
1080	uint8_t i = 0;
1081
1082	if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1083		return (-1);
1084
1085	for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1086	    !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1087	if (rate == 0)
1088		*divisor = 1;	/* XXX */
1089	else
1090		*divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1091	/* 0x00 .. 0x70 */
1092	*clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;
1093	return (0);
1094}
1095