uhci.h revision 186730
1184610Salfred/* $FreeBSD: head/sys/dev/usb2/controller/uhci2.h 186730 2009-01-04 00:12:01Z alfred $ */ 2184610Salfred/*- 3184610Salfred * Copyright (c) 1998 The NetBSD Foundation, Inc. 4184610Salfred * All rights reserved. 5184610Salfred * 6184610Salfred * This code is derived from software contributed to The NetBSD Foundation 7184610Salfred * by Lennart Augustsson (lennart@augustsson.net) at 8184610Salfred * Carlstedt Research & Technology. 9184610Salfred * 10184610Salfred * Redistribution and use in source and binary forms, with or without 11184610Salfred * modification, are permitted provided that the following conditions 12184610Salfred * are met: 13184610Salfred * 1. Redistributions of source code must retain the above copyright 14184610Salfred * notice, this list of conditions and the following disclaimer. 15184610Salfred * 2. Redistributions in binary form must reproduce the above copyright 16184610Salfred * notice, this list of conditions and the following disclaimer in the 17184610Salfred * documentation and/or other materials provided with the distribution. 18184610Salfred * 3. All advertising materials mentioning features or use of this software 19184610Salfred * must display the following acknowledgement: 20184610Salfred * This product includes software developed by the NetBSD 21184610Salfred * Foundation, Inc. and its contributors. 22184610Salfred * 4. Neither the name of The NetBSD Foundation nor the names of its 23184610Salfred * contributors may be used to endorse or promote products derived 24184610Salfred * from this software without specific prior written permission. 25184610Salfred * 26184610Salfred * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27184610Salfred * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28184610Salfred * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29184610Salfred * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30184610Salfred * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31184610Salfred * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32184610Salfred * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33184610Salfred * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34184610Salfred * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35184610Salfred * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36184610Salfred * POSSIBILITY OF SUCH DAMAGE. 37184610Salfred */ 38184610Salfred 39184610Salfred#ifndef _UHCI_H_ 40184610Salfred#define _UHCI_H_ 41184610Salfred 42184610Salfred/* PCI config registers */ 43184610Salfred#define PCI_USBREV 0x60 /* USB protocol revision */ 44184610Salfred#define PCI_USB_REV_MASK 0xff 45184610Salfred#define PCI_USB_REV_PRE_1_0 0x00 46184610Salfred#define PCI_USB_REV_1_0 0x10 47184610Salfred#define PCI_USB_REV_1_1 0x11 48184610Salfred#define PCI_LEGSUP 0xc0 /* Legacy Support register */ 49184610Salfred#define PCI_LEGSUP_USBPIRQDEN 0x2000 /* USB PIRQ D Enable */ 50184610Salfred#define PCI_CBIO 0x20 /* configuration base IO */ 51184610Salfred#define PCI_INTERFACE_UHCI 0x00 52184610Salfred 53184610Salfred/* UHCI registers */ 54184610Salfred#define UHCI_CMD 0x00 55184610Salfred#define UHCI_CMD_RS 0x0001 56184610Salfred#define UHCI_CMD_HCRESET 0x0002 57184610Salfred#define UHCI_CMD_GRESET 0x0004 58184610Salfred#define UHCI_CMD_EGSM 0x0008 59184610Salfred#define UHCI_CMD_FGR 0x0010 60184610Salfred#define UHCI_CMD_SWDBG 0x0020 61184610Salfred#define UHCI_CMD_CF 0x0040 62184610Salfred#define UHCI_CMD_MAXP 0x0080 63184610Salfred#define UHCI_STS 0x02 64184610Salfred#define UHCI_STS_USBINT 0x0001 65184610Salfred#define UHCI_STS_USBEI 0x0002 66184610Salfred#define UHCI_STS_RD 0x0004 67184610Salfred#define UHCI_STS_HSE 0x0008 68184610Salfred#define UHCI_STS_HCPE 0x0010 69184610Salfred#define UHCI_STS_HCH 0x0020 70184610Salfred#define UHCI_STS_ALLINTRS 0x003f 71184610Salfred#define UHCI_INTR 0x04 72184610Salfred#define UHCI_INTR_TOCRCIE 0x0001 73184610Salfred#define UHCI_INTR_RIE 0x0002 74184610Salfred#define UHCI_INTR_IOCE 0x0004 75184610Salfred#define UHCI_INTR_SPIE 0x0008 76184610Salfred#define UHCI_FRNUM 0x06 77184610Salfred#define UHCI_FRNUM_MASK 0x03ff 78184610Salfred#define UHCI_FLBASEADDR 0x08 79184610Salfred#define UHCI_SOF 0x0c 80184610Salfred#define UHCI_SOF_MASK 0x7f 81184610Salfred#define UHCI_PORTSC1 0x010 82184610Salfred#define UHCI_PORTSC2 0x012 83184610Salfred#define UHCI_PORTSC_CCS 0x0001 84184610Salfred#define UHCI_PORTSC_CSC 0x0002 85184610Salfred#define UHCI_PORTSC_PE 0x0004 86184610Salfred#define UHCI_PORTSC_POEDC 0x0008 87184610Salfred#define UHCI_PORTSC_LS 0x0030 88184610Salfred#define UHCI_PORTSC_LS_SHIFT 4 89184610Salfred#define UHCI_PORTSC_RD 0x0040 90184610Salfred#define UHCI_PORTSC_LSDA 0x0100 91184610Salfred#define UHCI_PORTSC_PR 0x0200 92184610Salfred#define UHCI_PORTSC_OCI 0x0400 93184610Salfred#define UHCI_PORTSC_OCIC 0x0800 94184610Salfred#define UHCI_PORTSC_SUSP 0x1000 95184610Salfred 96184610Salfred#define URWMASK(x) ((x) & (UHCI_PORTSC_SUSP | \ 97184610Salfred UHCI_PORTSC_PR | UHCI_PORTSC_RD | \ 98184610Salfred UHCI_PORTSC_PE)) 99184610Salfred 100184610Salfred#define UHCI_FRAMELIST_COUNT 1024 /* units */ 101184610Salfred#define UHCI_FRAMELIST_ALIGN 4096 /* bytes */ 102184610Salfred 103184610Salfred/* Structures alignment (bytes) */ 104184610Salfred#define UHCI_TD_ALIGN 16 105184610Salfred#define UHCI_QH_ALIGN 16 106184610Salfred 107184610Salfred#if ((USB_PAGE_SIZE < UHCI_TD_ALIGN) || (UHCI_TD_ALIGN == 0) || \ 108184610Salfred (USB_PAGE_SIZE < UHCI_QH_ALIGN) || (UHCI_QH_ALIGN == 0)) 109184610Salfred#error "Invalid USB page size!" 110184610Salfred#endif 111184610Salfred 112184610Salfredtypedef uint32_t uhci_physaddr_t; 113184610Salfred 114184610Salfred#define UHCI_PTR_T 0x00000001 115184610Salfred#define UHCI_PTR_TD 0x00000000 116184610Salfred#define UHCI_PTR_QH 0x00000002 117184610Salfred#define UHCI_PTR_VF 0x00000004 118184610Salfred 119184610Salfred#define UHCI_QH_REMOVE_DELAY 5 /* us - QH remove delay */ 120184610Salfred 121184610Salfred/* 122184610Salfred * The Queue Heads (QH) and Transfer Descriptors (TD) are accessed by 123184610Salfred * both the CPU and the USB-controller which run concurrently. Great 124184610Salfred * care must be taken. When the data-structures are linked into the 125184610Salfred * USB controller's frame list, the USB-controller "owns" the 126184610Salfred * td_status and qh_elink fields, which will not be written by the 127184610Salfred * CPU. 128184610Salfred * 129184610Salfred */ 130184610Salfred 131184610Salfredstruct uhci_td { 132184610Salfred/* 133184610Salfred * Data used by the UHCI controller. 134184610Salfred * volatile is used in order to mantain struct members ordering. 135184610Salfred */ 136184610Salfred volatile uint32_t td_next; 137184610Salfred volatile uint32_t td_status; 138184610Salfred#define UHCI_TD_GET_ACTLEN(s) (((s) + 1) & 0x3ff) 139184610Salfred#define UHCI_TD_ZERO_ACTLEN(t) ((t) | 0x3ff) 140184610Salfred#define UHCI_TD_BITSTUFF 0x00020000 141184610Salfred#define UHCI_TD_CRCTO 0x00040000 142184610Salfred#define UHCI_TD_NAK 0x00080000 143184610Salfred#define UHCI_TD_BABBLE 0x00100000 144184610Salfred#define UHCI_TD_DBUFFER 0x00200000 145184610Salfred#define UHCI_TD_STALLED 0x00400000 146184610Salfred#define UHCI_TD_ACTIVE 0x00800000 147184610Salfred#define UHCI_TD_IOC 0x01000000 148184610Salfred#define UHCI_TD_IOS 0x02000000 149184610Salfred#define UHCI_TD_LS 0x04000000 150184610Salfred#define UHCI_TD_GET_ERRCNT(s) (((s) >> 27) & 3) 151184610Salfred#define UHCI_TD_SET_ERRCNT(n) ((n) << 27) 152184610Salfred#define UHCI_TD_SPD 0x20000000 153184610Salfred volatile uint32_t td_token; 154184610Salfred#define UHCI_TD_PID 0x000000ff 155184610Salfred#define UHCI_TD_PID_IN 0x00000069 156184610Salfred#define UHCI_TD_PID_OUT 0x000000e1 157184610Salfred#define UHCI_TD_PID_SETUP 0x0000002d 158184610Salfred#define UHCI_TD_GET_PID(s) ((s) & 0xff) 159184610Salfred#define UHCI_TD_SET_DEVADDR(a) ((a) << 8) 160184610Salfred#define UHCI_TD_GET_DEVADDR(s) (((s) >> 8) & 0x7f) 161184610Salfred#define UHCI_TD_SET_ENDPT(e) (((e) & 0xf) << 15) 162184610Salfred#define UHCI_TD_GET_ENDPT(s) (((s) >> 15) & 0xf) 163184610Salfred#define UHCI_TD_SET_DT(t) ((t) << 19) 164184610Salfred#define UHCI_TD_GET_DT(s) (((s) >> 19) & 1) 165184610Salfred#define UHCI_TD_SET_MAXLEN(l) (((l)-1) << 21) 166184610Salfred#define UHCI_TD_GET_MAXLEN(s) ((((s) >> 21) + 1) & 0x7ff) 167184610Salfred#define UHCI_TD_MAXLEN_MASK 0xffe00000 168184610Salfred volatile uint32_t td_buffer; 169184610Salfred/* 170184610Salfred * Extra information needed: 171184610Salfred */ 172184610Salfred struct uhci_td *next; 173184610Salfred struct uhci_td *prev; 174184610Salfred struct uhci_td *obj_next; 175184610Salfred struct usb2_page_cache *page_cache; 176184610Salfred struct usb2_page_cache *fix_pc; 177184610Salfred uint32_t td_self; 178184610Salfred uint16_t len; 179184610Salfred} __aligned(UHCI_TD_ALIGN); 180184610Salfred 181184610Salfredtypedef struct uhci_td uhci_td_t; 182184610Salfred 183184610Salfred#define UHCI_TD_ERROR (UHCI_TD_BITSTUFF | UHCI_TD_CRCTO | \ 184184610Salfred UHCI_TD_BABBLE | UHCI_TD_DBUFFER | UHCI_TD_STALLED) 185184610Salfred 186184610Salfred#define UHCI_TD_SETUP(len, endp, dev) (UHCI_TD_SET_MAXLEN(len) | \ 187184610Salfred UHCI_TD_SET_ENDPT(endp) | \ 188184610Salfred UHCI_TD_SET_DEVADDR(dev) | \ 189184610Salfred UHCI_TD_PID_SETUP) 190184610Salfred 191184610Salfred#define UHCI_TD_OUT(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 192184610Salfred UHCI_TD_SET_ENDPT(endp) | \ 193184610Salfred UHCI_TD_SET_DEVADDR(dev) | \ 194184610Salfred UHCI_TD_PID_OUT | UHCI_TD_SET_DT(dt)) 195184610Salfred 196184610Salfred#define UHCI_TD_IN(len, endp, dev, dt) (UHCI_TD_SET_MAXLEN(len) | \ 197184610Salfred UHCI_TD_SET_ENDPT(endp) | \ 198184610Salfred UHCI_TD_SET_DEVADDR(dev) | \ 199184610Salfred UHCI_TD_PID_IN | UHCI_TD_SET_DT(dt)) 200184610Salfred 201184610Salfredstruct uhci_qh { 202184610Salfred/* 203184610Salfred * Data used by the UHCI controller. 204184610Salfred */ 205184610Salfred volatile uint32_t qh_h_next; 206184610Salfred volatile uint32_t qh_e_next; 207184610Salfred/* 208184610Salfred * Extra information needed: 209184610Salfred */ 210184610Salfred struct uhci_qh *h_next; 211184610Salfred struct uhci_qh *h_prev; 212184610Salfred struct uhci_qh *obj_next; 213184610Salfred struct uhci_td *e_next; 214184610Salfred struct usb2_page_cache *page_cache; 215184610Salfred uint32_t qh_self; 216184610Salfred uint16_t intr_pos; 217184610Salfred} __aligned(UHCI_QH_ALIGN); 218184610Salfred 219184610Salfredtypedef struct uhci_qh uhci_qh_t; 220184610Salfred 221184610Salfred/* Maximum number of isochronous TD's and QH's interrupt */ 222184610Salfred#define UHCI_VFRAMELIST_COUNT 128 223184610Salfred#define UHCI_IFRAMELIST_COUNT (2 * UHCI_VFRAMELIST_COUNT) 224184610Salfred 225184610Salfred#if (((UHCI_VFRAMELIST_COUNT & (UHCI_VFRAMELIST_COUNT-1)) != 0) || \ 226184610Salfred (UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT)) 227184610Salfred#error "UHCI_VFRAMELIST_COUNT is not power of two" 228184610Salfred#error "or UHCI_VFRAMELIST_COUNT > UHCI_FRAMELIST_COUNT" 229184610Salfred#endif 230184610Salfred 231184610Salfred#if (UHCI_VFRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER) 232184610Salfred#error "maximum number of full-speed isochronous frames is higher than supported!" 233184610Salfred#endif 234184610Salfred 235184610Salfredstruct uhci_config_desc { 236184610Salfred struct usb2_config_descriptor confd; 237184610Salfred struct usb2_interface_descriptor ifcd; 238184610Salfred struct usb2_endpoint_descriptor endpd; 239184610Salfred} __packed; 240184610Salfred 241184610Salfredunion uhci_hub_desc { 242184610Salfred struct usb2_status stat; 243184610Salfred struct usb2_port_status ps; 244184610Salfred struct usb2_device_descriptor devd; 245184610Salfred uint8_t temp[128]; 246184610Salfred}; 247184610Salfred 248184610Salfredstruct uhci_hw_softc { 249184610Salfred struct usb2_page_cache pframes_pc; 250184610Salfred struct usb2_page_cache isoc_start_pc[UHCI_VFRAMELIST_COUNT]; 251184610Salfred struct usb2_page_cache intr_start_pc[UHCI_IFRAMELIST_COUNT]; 252184610Salfred struct usb2_page_cache ls_ctl_start_pc; 253184610Salfred struct usb2_page_cache fs_ctl_start_pc; 254184610Salfred struct usb2_page_cache bulk_start_pc; 255184610Salfred struct usb2_page_cache last_qh_pc; 256184610Salfred struct usb2_page_cache last_td_pc; 257184610Salfred 258184610Salfred struct usb2_page pframes_pg; 259184610Salfred struct usb2_page isoc_start_pg[UHCI_VFRAMELIST_COUNT]; 260184610Salfred struct usb2_page intr_start_pg[UHCI_IFRAMELIST_COUNT]; 261184610Salfred struct usb2_page ls_ctl_start_pg; 262184610Salfred struct usb2_page fs_ctl_start_pg; 263184610Salfred struct usb2_page bulk_start_pg; 264184610Salfred struct usb2_page last_qh_pg; 265184610Salfred struct usb2_page last_td_pg; 266184610Salfred}; 267184610Salfred 268184610Salfredtypedef struct uhci_softc { 269184610Salfred struct uhci_hw_softc sc_hw; 270184610Salfred struct usb2_bus sc_bus; /* base device */ 271184610Salfred struct usb2_config_td sc_config_td; 272184610Salfred union uhci_hub_desc sc_hub_desc; 273184610Salfred struct usb2_sw_transfer sc_root_ctrl; 274184610Salfred struct usb2_sw_transfer sc_root_intr; 275184610Salfred 276184610Salfred struct uhci_td *sc_isoc_p_last[UHCI_VFRAMELIST_COUNT]; /* pointer to last TD 277184610Salfred * for isochronous */ 278184610Salfred struct uhci_qh *sc_intr_p_last[UHCI_IFRAMELIST_COUNT]; /* pointer to last QH 279184610Salfred * for interrupt */ 280184610Salfred struct uhci_qh *sc_ls_ctl_p_last; /* pointer to last QH for low 281184610Salfred * speed control */ 282184610Salfred struct uhci_qh *sc_fs_ctl_p_last; /* pointer to last QH for full 283184610Salfred * speed control */ 284184610Salfred struct uhci_qh *sc_bulk_p_last; /* pointer to last QH for bulk */ 285184610Salfred struct uhci_qh *sc_reclaim_qh_p; 286184610Salfred struct uhci_qh *sc_last_qh_p; 287184610Salfred struct uhci_td *sc_last_td_p; 288184610Salfred struct resource *sc_io_res; 289184610Salfred struct resource *sc_irq_res; 290184610Salfred void *sc_intr_hdl; 291184610Salfred device_t sc_dev; 292184610Salfred bus_size_t sc_io_size; 293184610Salfred bus_space_tag_t sc_io_tag; 294184610Salfred bus_space_handle_t sc_io_hdl; 295184610Salfred 296184610Salfred uint32_t sc_loops; /* number of QHs that wants looping */ 297184610Salfred 298184610Salfred uint16_t sc_intr_stat[UHCI_IFRAMELIST_COUNT]; 299184610Salfred uint16_t sc_saved_frnum; 300184610Salfred 301184610Salfred uint8_t sc_addr; /* device address */ 302184610Salfred uint8_t sc_conf; /* device configuration */ 303186730Salfred uint8_t sc_isreset; /* bits set if a root hub is reset */ 304186730Salfred uint8_t sc_isresumed; /* bits set if a port was resumed */ 305184610Salfred uint8_t sc_saved_sof; 306184610Salfred uint8_t sc_hub_idata[1]; 307184610Salfred 308184610Salfred char sc_vendor[16]; /* vendor string for root hub */ 309184610Salfred} uhci_softc_t; 310184610Salfred 311184610Salfredusb2_bus_mem_cb_t uhci_iterate_hw_softc; 312184610Salfred 313184610Salfredusb2_error_t uhci_init(uhci_softc_t *sc); 314184610Salfredvoid uhci_suspend(uhci_softc_t *sc); 315184610Salfredvoid uhci_resume(uhci_softc_t *sc); 316184610Salfredvoid uhci_reset(uhci_softc_t *sc); 317184610Salfredvoid uhci_interrupt(uhci_softc_t *sc); 318184610Salfred 319184610Salfred#endif /* _UHCI_H_ */ 320