nfc_rb.c revision 286298
1/*- 2 * Copyright (C) 2015 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* RouterBoard 600/800 NAND controller driver. */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/sys/dev/nand/nfc_rb.c 286298 2015-08-05 01:52:11Z jhibbits $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/kernel.h> 36#include <sys/module.h> 37#include <sys/malloc.h> 38#include <sys/rman.h> 39#include <sys/slicer.h> 40 41#include <machine/bus.h> 42 43#include <dev/ofw/ofw_bus.h> 44#include <dev/ofw/ofw_bus_subr.h> 45 46#include <dev/nand/nand.h> 47#include <dev/nand/nandbus.h> 48 49#include <powerpc/mpc85xx/mpc85xx.h> 50 51#include "nfc_if.h" 52#include "gpio_if.h" 53 54#define RB_NAND_DATA (0x00) 55 56struct rb_nand_softc { 57 struct nand_softc nand_dev; 58 struct resource *sc_mem; 59 int rid; 60 device_t sc_gpio; 61 uint32_t sc_rdy_pin; 62 uint32_t sc_nce_pin; 63 uint32_t sc_cle_pin; 64 uint32_t sc_ale_pin; 65}; 66 67static int rb_nand_attach(device_t); 68static int rb_nand_probe(device_t); 69static int rb_nand_send_command(device_t, uint8_t); 70static int rb_nand_send_address(device_t, uint8_t); 71static uint8_t rb_nand_read_byte(device_t); 72static void rb_nand_read_buf(device_t, void *, uint32_t); 73static void rb_nand_write_buf(device_t, void *, uint32_t); 74static int rb_nand_select_cs(device_t, uint8_t); 75static int rb_nand_read_rnb(device_t); 76 77static device_method_t rb_nand_methods[] = { 78 DEVMETHOD(device_probe, rb_nand_probe), 79 DEVMETHOD(device_attach, rb_nand_attach), 80 81 DEVMETHOD(nfc_send_command, rb_nand_send_command), 82 DEVMETHOD(nfc_send_address, rb_nand_send_address), 83 DEVMETHOD(nfc_read_byte, rb_nand_read_byte), 84 DEVMETHOD(nfc_read_buf, rb_nand_read_buf), 85 DEVMETHOD(nfc_write_buf, rb_nand_write_buf), 86 DEVMETHOD(nfc_select_cs, rb_nand_select_cs), 87 DEVMETHOD(nfc_read_rnb, rb_nand_read_rnb), 88 89 { 0, 0 }, 90}; 91 92static driver_t rb_nand_driver = { 93 "nand", 94 rb_nand_methods, 95 sizeof(struct rb_nand_softc), 96}; 97 98static devclass_t rb_nand_devclass; 99DRIVER_MODULE(rb_nand, ofwbus, rb_nand_driver, rb_nand_devclass, 0, 0); 100 101#if 0 102static const struct nand_ecc_data rb_ecc = { 103 .eccsize = 6, 104 .eccmode = NAND_ECC_SOFT, 105 .eccbytes = 6, 106 .eccpositions = { 8, 9, 10, 13, 14, 15 }, 107}; 108#endif 109 110static int 111rb_nand_probe(device_t dev) 112{ 113 const char *device_type; 114 115 device_type = ofw_bus_get_type(dev); 116 117 if (!device_type || strcmp(device_type, "rb,nand")) 118 return (ENXIO); 119 120 device_set_desc(dev, "RouterBoard 333/600/800 NAND controller"); 121 return (BUS_PROBE_DEFAULT); 122} 123 124static int 125rb_nand_attach(device_t dev) 126{ 127 struct rb_nand_softc *sc; 128 phandle_t node; 129 uint32_t ale[2],cle[2],nce[2],rdy[2]; 130 u_long size,start; 131 int err; 132 133 sc = device_get_softc(dev); 134 node = ofw_bus_get_node(dev); 135 136 if (OF_getprop(node, "ale", ale, sizeof(ale)) <= 0) { 137 return (ENXIO); 138 } 139 if (OF_getprop(node, "cle", cle, sizeof(cle)) <= 0) { 140 return (ENXIO); 141 } 142 if (OF_getprop(node, "nce", nce, sizeof(nce)) <= 0) { 143 return (ENXIO); 144 } 145 if (OF_getprop(node, "rdy", rdy, sizeof(rdy)) <= 0) { 146 return (ENXIO); 147 } 148 149 if (ale[0] != cle[0] || ale[0] != nce[0] || ale[0] != rdy[0]) { 150 device_printf(dev, "GPIO handles for signals must match.\n"); 151 return (ENXIO); 152 } 153 sc->sc_ale_pin = ale[1]; 154 sc->sc_cle_pin = cle[1]; 155 sc->sc_nce_pin = nce[1]; 156 sc->sc_rdy_pin = rdy[1]; 157 158 sc->sc_gpio = OF_device_from_xref(ale[0]); 159 if (sc->sc_gpio == NULL) { 160 device_printf(dev, "No GPIO resource found!\n"); 161 return (ENXIO); 162 } 163 164 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, 165 RF_ACTIVE); 166 if (sc->sc_mem == NULL) { 167 device_printf(dev, "could not allocate resources!\n"); 168 return (ENXIO); 169 } 170 171 start = rman_get_start(sc->sc_mem); 172 size = rman_get_size(sc->sc_mem); 173 if (law_enable(OCP85XX_TGTIF_LBC, start, size) != 0) { 174 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->sc_mem); 175 device_printf(dev, "could not allocate local address window.\n"); 176 return (ENXIO); 177 } 178 179 nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL); 180 181 err = nandbus_create(dev); 182 183 return (err); 184} 185 186static int 187rb_nand_send_command(device_t dev, uint8_t command) 188{ 189 struct rb_nand_softc *sc; 190 191 nand_debug(NDBG_DRV,"rb_nand: send command %x", command); 192 193 sc = device_get_softc(dev); 194 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 1); 195 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 196 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 197 bus_write_1(sc->sc_mem, RB_NAND_DATA, command); 198 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 199 return (0); 200} 201 202static int 203rb_nand_send_address(device_t dev, uint8_t addr) 204{ 205 struct rb_nand_softc *sc; 206 207 nand_debug(NDBG_DRV,"rb_nand: send address %x", addr); 208 209 sc = device_get_softc(dev); 210 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 211 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 1); 212 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 213 bus_write_1(sc->sc_mem, RB_NAND_DATA, addr); 214 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 215 return (0); 216} 217 218static uint8_t 219rb_nand_read_byte(device_t dev) 220{ 221 struct rb_nand_softc *sc; 222 uint8_t data; 223 224 sc = device_get_softc(dev); 225 data = bus_read_1(sc->sc_mem, RB_NAND_DATA); 226 227 nand_debug(NDBG_DRV,"rb_nand: read %x", data); 228 229 return (data); 230} 231 232static void 233rb_nand_read_buf(device_t dev, void* buf, uint32_t len) 234{ 235 struct rb_nand_softc *sc; 236 237 sc = device_get_softc(dev); 238 239 bus_read_region_1(sc->sc_mem, RB_NAND_DATA, buf, len); 240} 241 242static void 243rb_nand_write_buf(device_t dev, void* buf, uint32_t len) 244{ 245 struct rb_nand_softc *sc; 246 int i; 247 uint8_t *b = (uint8_t*)buf; 248 249 sc = device_get_softc(dev); 250 251 for (i = 0; i < len; i++) { 252#ifdef NAND_DEBUG 253 if (!(i % 16)) 254 printf("%s", i == 0 ? "rb_nand:\n" : "\n"); 255 printf(" %x", b[i]); 256 if (i == len - 1) 257 printf("\n"); 258#endif 259 bus_write_1(sc->sc_mem, RB_NAND_DATA, b[i]); 260 } 261} 262 263static int 264rb_nand_select_cs(device_t dev, uint8_t cs) 265{ 266 267 if (cs > 0) 268 return (ENODEV); 269 270 return (0); 271} 272 273static int 274rb_nand_read_rnb(device_t dev) 275{ 276 struct rb_nand_softc *sc; 277 uint32_t rdy_bit; 278 279 sc = device_get_softc(dev); 280 GPIO_PIN_GET(sc->sc_gpio, sc->sc_rdy_pin, &rdy_bit); 281 282 return (rdy_bit); /* ready */ 283} 284