1/*- 2 * Copyright (C) 2015 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* RouterBoard 600/800 NAND controller driver. */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: releng/11.0/sys/dev/nand/nfc_rb.c 286299 2015-08-05 01:52:52Z jhibbits $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/kernel.h> 36#include <sys/module.h> 37#include <sys/malloc.h> 38#include <sys/rman.h> 39 40#include <machine/bus.h> 41 42#include <dev/ofw/ofw_bus.h> 43#include <dev/ofw/ofw_bus_subr.h> 44 45#include <dev/nand/nand.h> 46#include <dev/nand/nandbus.h> 47 48#include <powerpc/mpc85xx/mpc85xx.h> 49 50#include "nfc_if.h" 51#include "gpio_if.h" 52 53#define RB_NAND_DATA (0x00) 54 55struct rb_nand_softc { 56 struct nand_softc nand_dev; 57 struct resource *sc_mem; 58 int rid; 59 device_t sc_gpio; 60 uint32_t sc_rdy_pin; 61 uint32_t sc_nce_pin; 62 uint32_t sc_cle_pin; 63 uint32_t sc_ale_pin; 64}; 65 66static int rb_nand_attach(device_t); 67static int rb_nand_probe(device_t); 68static int rb_nand_send_command(device_t, uint8_t); 69static int rb_nand_send_address(device_t, uint8_t); 70static uint8_t rb_nand_read_byte(device_t); 71static void rb_nand_read_buf(device_t, void *, uint32_t); 72static void rb_nand_write_buf(device_t, void *, uint32_t); 73static int rb_nand_select_cs(device_t, uint8_t); 74static int rb_nand_read_rnb(device_t); 75 76static device_method_t rb_nand_methods[] = { 77 DEVMETHOD(device_probe, rb_nand_probe), 78 DEVMETHOD(device_attach, rb_nand_attach), 79 80 DEVMETHOD(nfc_send_command, rb_nand_send_command), 81 DEVMETHOD(nfc_send_address, rb_nand_send_address), 82 DEVMETHOD(nfc_read_byte, rb_nand_read_byte), 83 DEVMETHOD(nfc_read_buf, rb_nand_read_buf), 84 DEVMETHOD(nfc_write_buf, rb_nand_write_buf), 85 DEVMETHOD(nfc_select_cs, rb_nand_select_cs), 86 DEVMETHOD(nfc_read_rnb, rb_nand_read_rnb), 87 88 { 0, 0 }, 89}; 90 91static driver_t rb_nand_driver = { 92 "nand", 93 rb_nand_methods, 94 sizeof(struct rb_nand_softc), 95}; 96 97static devclass_t rb_nand_devclass; 98DRIVER_MODULE(rb_nand, ofwbus, rb_nand_driver, rb_nand_devclass, 0, 0); 99 100#if 0 101static const struct nand_ecc_data rb_ecc = { 102 .eccsize = 6, 103 .eccmode = NAND_ECC_SOFT, 104 .eccbytes = 6, 105 .eccpositions = { 8, 9, 10, 13, 14, 15 }, 106}; 107#endif 108 109static int 110rb_nand_probe(device_t dev) 111{ 112 const char *device_type; 113 114 device_type = ofw_bus_get_type(dev); 115 116 if (!device_type || strcmp(device_type, "rb,nand")) 117 return (ENXIO); 118 119 device_set_desc(dev, "RouterBoard 333/600/800 NAND controller"); 120 return (BUS_PROBE_DEFAULT); 121} 122 123static int 124rb_nand_attach(device_t dev) 125{ 126 struct rb_nand_softc *sc; 127 phandle_t node; 128 uint32_t ale[2],cle[2],nce[2],rdy[2]; 129 u_long size,start; 130 int err; 131 132 sc = device_get_softc(dev); 133 node = ofw_bus_get_node(dev); 134 135 if (OF_getprop(node, "ale", ale, sizeof(ale)) <= 0) { 136 return (ENXIO); 137 } 138 if (OF_getprop(node, "cle", cle, sizeof(cle)) <= 0) { 139 return (ENXIO); 140 } 141 if (OF_getprop(node, "nce", nce, sizeof(nce)) <= 0) { 142 return (ENXIO); 143 } 144 if (OF_getprop(node, "rdy", rdy, sizeof(rdy)) <= 0) { 145 return (ENXIO); 146 } 147 148 if (ale[0] != cle[0] || ale[0] != nce[0] || ale[0] != rdy[0]) { 149 device_printf(dev, "GPIO handles for signals must match.\n"); 150 return (ENXIO); 151 } 152 sc->sc_ale_pin = ale[1]; 153 sc->sc_cle_pin = cle[1]; 154 sc->sc_nce_pin = nce[1]; 155 sc->sc_rdy_pin = rdy[1]; 156 157 sc->sc_gpio = OF_device_from_xref(ale[0]); 158 if (sc->sc_gpio == NULL) { 159 device_printf(dev, "No GPIO resource found!\n"); 160 return (ENXIO); 161 } 162 163 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, 164 RF_ACTIVE); 165 if (sc->sc_mem == NULL) { 166 device_printf(dev, "could not allocate resources!\n"); 167 return (ENXIO); 168 } 169 170 start = rman_get_start(sc->sc_mem); 171 size = rman_get_size(sc->sc_mem); 172 if (law_enable(OCP85XX_TGTIF_LBC, start, size) != 0) { 173 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->sc_mem); 174 device_printf(dev, "could not allocate local address window.\n"); 175 return (ENXIO); 176 } 177 178 nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL); 179 180 err = nandbus_create(dev); 181 182 return (err); 183} 184 185static int 186rb_nand_send_command(device_t dev, uint8_t command) 187{ 188 struct rb_nand_softc *sc; 189 190 nand_debug(NDBG_DRV,"rb_nand: send command %x", command); 191 192 sc = device_get_softc(dev); 193 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 1); 194 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 195 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 196 bus_write_1(sc->sc_mem, RB_NAND_DATA, command); 197 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 198 return (0); 199} 200 201static int 202rb_nand_send_address(device_t dev, uint8_t addr) 203{ 204 struct rb_nand_softc *sc; 205 206 nand_debug(NDBG_DRV,"rb_nand: send address %x", addr); 207 208 sc = device_get_softc(dev); 209 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 210 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 1); 211 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 212 bus_write_1(sc->sc_mem, RB_NAND_DATA, addr); 213 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 214 return (0); 215} 216 217static uint8_t 218rb_nand_read_byte(device_t dev) 219{ 220 struct rb_nand_softc *sc; 221 uint8_t data; 222 223 sc = device_get_softc(dev); 224 data = bus_read_1(sc->sc_mem, RB_NAND_DATA); 225 226 nand_debug(NDBG_DRV,"rb_nand: read %x", data); 227 228 return (data); 229} 230 231static void 232rb_nand_read_buf(device_t dev, void* buf, uint32_t len) 233{ 234 struct rb_nand_softc *sc; 235 236 sc = device_get_softc(dev); 237 238 bus_read_region_1(sc->sc_mem, RB_NAND_DATA, buf, len); 239} 240 241static void 242rb_nand_write_buf(device_t dev, void* buf, uint32_t len) 243{ 244 struct rb_nand_softc *sc; 245 int i; 246 uint8_t *b = (uint8_t*)buf; 247 248 sc = device_get_softc(dev); 249 250 for (i = 0; i < len; i++) { 251#ifdef NAND_DEBUG 252 if (!(i % 16)) 253 printf("%s", i == 0 ? "rb_nand:\n" : "\n"); 254 printf(" %x", b[i]); 255 if (i == len - 1) 256 printf("\n"); 257#endif 258 bus_write_1(sc->sc_mem, RB_NAND_DATA, b[i]); 259 } 260} 261 262static int 263rb_nand_select_cs(device_t dev, uint8_t cs) 264{ 265 266 if (cs > 0) 267 return (ENODEV); 268 269 return (0); 270} 271 272static int 273rb_nand_read_rnb(device_t dev) 274{ 275 struct rb_nand_softc *sc; 276 uint32_t rdy_bit; 277 278 sc = device_get_softc(dev); 279 GPIO_PIN_GET(sc->sc_gpio, sc->sc_rdy_pin, &rdy_bit); 280 281 return (rdy_bit); /* ready */ 282} 283