nfc_rb.c revision 282430
1/*- 2 * Copyright (C) 2015 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* RouterBoard 600/800 NAND controller driver. */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/sys/dev/nand/nfc_rb.c 282430 2015-05-04 20:36:00Z jhibbits $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/proc.h> 35#include <sys/bus.h> 36#include <sys/conf.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/rman.h> 41#include <sys/lock.h> 42#include <sys/mutex.h> 43#include <sys/time.h> 44 45#include <machine/bus.h> 46 47#include <dev/ofw/ofw_bus.h> 48#include <dev/ofw/ofw_bus_subr.h> 49 50#include <dev/nand/nand.h> 51#include <dev/nand/nandbus.h> 52#include "nfc_if.h" 53#include "gpio_if.h" 54 55#define RB_NAND_DATA (0x00) 56 57struct rb_nand_softc { 58 struct nand_softc nand_dev; 59 struct resource *sc_mem; 60 int rid; 61 device_t sc_gpio; 62 uint32_t sc_rdy_pin; 63 uint32_t sc_nce_pin; 64 uint32_t sc_cle_pin; 65 uint32_t sc_ale_pin; 66}; 67 68static int rb_nand_attach(device_t); 69static int rb_nand_probe(device_t); 70static int rb_nand_send_command(device_t, uint8_t); 71static int rb_nand_send_address(device_t, uint8_t); 72static uint8_t rb_nand_read_byte(device_t); 73static void rb_nand_read_buf(device_t, void *, uint32_t); 74static void rb_nand_write_buf(device_t, void *, uint32_t); 75static int rb_nand_select_cs(device_t, uint8_t); 76static int rb_nand_read_rnb(device_t); 77 78static device_method_t rb_nand_methods[] = { 79 DEVMETHOD(device_probe, rb_nand_probe), 80 DEVMETHOD(device_attach, rb_nand_attach), 81 82 DEVMETHOD(nfc_send_command, rb_nand_send_command), 83 DEVMETHOD(nfc_send_address, rb_nand_send_address), 84 DEVMETHOD(nfc_read_byte, rb_nand_read_byte), 85 DEVMETHOD(nfc_read_buf, rb_nand_read_buf), 86 DEVMETHOD(nfc_write_buf, rb_nand_write_buf), 87 DEVMETHOD(nfc_select_cs, rb_nand_select_cs), 88 DEVMETHOD(nfc_read_rnb, rb_nand_read_rnb), 89 90 { 0, 0 }, 91}; 92 93static driver_t rb_nand_driver = { 94 "nand", 95 rb_nand_methods, 96 sizeof(struct rb_nand_softc), 97}; 98 99static devclass_t rb_nand_devclass; 100DRIVER_MODULE(rb_nand, ofwbus, rb_nand_driver, rb_nand_devclass, 0, 0); 101 102#if 0 103static const struct nand_ecc_data rb_ecc = { 104 .eccsize = 6, 105 .eccmode = NAND_ECC_SOFT, 106 .eccbytes = 6, 107 .eccpositions = { 8, 9, 10, 13, 14, 15 }, 108}; 109#endif 110 111static int 112rb_nand_probe(device_t dev) 113{ 114 const char *device_type; 115 116 device_type = ofw_bus_get_type(dev); 117 118 if (!device_type || strcmp(device_type, "rb,nand")) 119 return (ENXIO); 120 121 device_set_desc(dev, "RouterBoard 333/600/800 NAND controller"); 122 return (BUS_PROBE_DEFAULT); 123} 124 125static int 126rb_nand_attach(device_t dev) 127{ 128 struct rb_nand_softc *sc; 129 phandle_t node; 130 uint32_t ale[2],cle[2],nce[2],rdy[2]; 131 int err; 132 133 sc = device_get_softc(dev); 134 node = ofw_bus_get_node(dev); 135 136 if (OF_getprop(node, "ale", ale, sizeof(ale)) <= 0) { 137 return (ENXIO); 138 } 139 if (OF_getprop(node, "cle", cle, sizeof(cle)) <= 0) { 140 return (ENXIO); 141 } 142 if (OF_getprop(node, "nce", nce, sizeof(nce)) <= 0) { 143 return (ENXIO); 144 } 145 if (OF_getprop(node, "rdy", rdy, sizeof(rdy)) <= 0) { 146 return (ENXIO); 147 } 148 149 if (ale[0] != cle[0] || ale[0] != nce[0] || ale[0] != rdy[0]) { 150 device_printf(dev, "GPIO handles for signals must match.\n"); 151 return (ENXIO); 152 } 153 sc->sc_ale_pin = ale[1]; 154 sc->sc_cle_pin = cle[1]; 155 sc->sc_nce_pin = nce[1]; 156 sc->sc_rdy_pin = rdy[1]; 157 158 sc->sc_gpio = OF_device_from_xref(ale[0]); 159 if (sc->sc_gpio == NULL) { 160 device_printf(dev, "No GPIO resource found!\n"); 161 return (ENXIO); 162 } 163 164 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, 165 RF_ACTIVE); 166 if (sc->sc_mem == NULL) { 167 device_printf(dev, "could not allocate resources!\n"); 168 return (ENXIO); 169 } 170 171 nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL); 172 173 err = nandbus_create(dev); 174 175 return (err); 176} 177 178static int 179rb_nand_send_command(device_t dev, uint8_t command) 180{ 181 struct rb_nand_softc *sc; 182 183 nand_debug(NDBG_DRV,"rb_nand: send command %x", command); 184 185 sc = device_get_softc(dev); 186 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 1); 187 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 188 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 189 bus_write_1(sc->sc_mem, RB_NAND_DATA, command); 190 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 191 return (0); 192} 193 194static int 195rb_nand_send_address(device_t dev, uint8_t addr) 196{ 197 struct rb_nand_softc *sc; 198 199 nand_debug(NDBG_DRV,"rb_nand: send address %x", addr); 200 201 sc = device_get_softc(dev); 202 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 203 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 1); 204 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 205 bus_write_1(sc->sc_mem, RB_NAND_DATA, addr); 206 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 207 return (0); 208} 209 210static uint8_t 211rb_nand_read_byte(device_t dev) 212{ 213 struct rb_nand_softc *sc; 214 uint8_t data; 215 216 sc = device_get_softc(dev); 217 data = bus_read_1(sc->sc_mem, RB_NAND_DATA); 218 219 nand_debug(NDBG_DRV,"rb_nand: read %x", data); 220 221 return (data); 222} 223 224static void 225rb_nand_read_buf(device_t dev, void* buf, uint32_t len) 226{ 227 struct rb_nand_softc *sc; 228 229 sc = device_get_softc(dev); 230 231 bus_read_region_1(sc->sc_mem, RB_NAND_DATA, buf, len); 232} 233 234static void 235rb_nand_write_buf(device_t dev, void* buf, uint32_t len) 236{ 237 struct rb_nand_softc *sc; 238 int i; 239 uint8_t *b = (uint8_t*)buf; 240 241 sc = device_get_softc(dev); 242 243 for (i = 0; i < len; i++) { 244#ifdef NAND_DEBUG 245 if (!(i % 16)) 246 printf("%s", i == 0 ? "rb_nand:\n" : "\n"); 247 printf(" %x", b[i]); 248 if (i == len - 1) 249 printf("\n"); 250#endif 251 bus_write_1(sc->sc_mem, RB_NAND_DATA, b[i]); 252 } 253} 254 255static int 256rb_nand_select_cs(device_t dev, uint8_t cs) 257{ 258 259 if (cs > 0) 260 return (ENODEV); 261 262 return (0); 263} 264 265static int 266rb_nand_read_rnb(device_t dev) 267{ 268 struct rb_nand_softc *sc; 269 uint32_t rdy_bit; 270 271 sc = device_get_softc(dev); 272 GPIO_PIN_GET(sc->sc_gpio, sc->sc_rdy_pin, &rdy_bit); 273 274 return (rdy_bit); /* ready */ 275} 276