nfc_rb.c revision 284083
1/*- 2 * Copyright (C) 2015 Justin Hibbits 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* RouterBoard 600/800 NAND controller driver. */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/sys/dev/nand/nfc_rb.c 284083 2015-06-06 16:38:40Z jhibbits $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/proc.h> 35#include <sys/bus.h> 36#include <sys/conf.h> 37#include <sys/kernel.h> 38#include <sys/module.h> 39#include <sys/malloc.h> 40#include <sys/rman.h> 41#include <sys/lock.h> 42#include <sys/mutex.h> 43#include <sys/time.h> 44 45#include <machine/bus.h> 46 47#include <dev/ofw/ofw_bus.h> 48#include <dev/ofw/ofw_bus_subr.h> 49 50#include <dev/nand/nand.h> 51#include <dev/nand/nandbus.h> 52 53#include <powerpc/mpc85xx/mpc85xx.h> 54 55#include "nfc_if.h" 56#include "gpio_if.h" 57 58#define RB_NAND_DATA (0x00) 59 60struct rb_nand_softc { 61 struct nand_softc nand_dev; 62 struct resource *sc_mem; 63 int rid; 64 device_t sc_gpio; 65 uint32_t sc_rdy_pin; 66 uint32_t sc_nce_pin; 67 uint32_t sc_cle_pin; 68 uint32_t sc_ale_pin; 69}; 70 71static int rb_nand_attach(device_t); 72static int rb_nand_probe(device_t); 73static int rb_nand_send_command(device_t, uint8_t); 74static int rb_nand_send_address(device_t, uint8_t); 75static uint8_t rb_nand_read_byte(device_t); 76static void rb_nand_read_buf(device_t, void *, uint32_t); 77static void rb_nand_write_buf(device_t, void *, uint32_t); 78static int rb_nand_select_cs(device_t, uint8_t); 79static int rb_nand_read_rnb(device_t); 80 81static device_method_t rb_nand_methods[] = { 82 DEVMETHOD(device_probe, rb_nand_probe), 83 DEVMETHOD(device_attach, rb_nand_attach), 84 85 DEVMETHOD(nfc_send_command, rb_nand_send_command), 86 DEVMETHOD(nfc_send_address, rb_nand_send_address), 87 DEVMETHOD(nfc_read_byte, rb_nand_read_byte), 88 DEVMETHOD(nfc_read_buf, rb_nand_read_buf), 89 DEVMETHOD(nfc_write_buf, rb_nand_write_buf), 90 DEVMETHOD(nfc_select_cs, rb_nand_select_cs), 91 DEVMETHOD(nfc_read_rnb, rb_nand_read_rnb), 92 93 { 0, 0 }, 94}; 95 96static driver_t rb_nand_driver = { 97 "nand", 98 rb_nand_methods, 99 sizeof(struct rb_nand_softc), 100}; 101 102static devclass_t rb_nand_devclass; 103DRIVER_MODULE(rb_nand, ofwbus, rb_nand_driver, rb_nand_devclass, 0, 0); 104 105#if 0 106static const struct nand_ecc_data rb_ecc = { 107 .eccsize = 6, 108 .eccmode = NAND_ECC_SOFT, 109 .eccbytes = 6, 110 .eccpositions = { 8, 9, 10, 13, 14, 15 }, 111}; 112#endif 113 114static int 115rb_nand_probe(device_t dev) 116{ 117 const char *device_type; 118 119 device_type = ofw_bus_get_type(dev); 120 121 if (!device_type || strcmp(device_type, "rb,nand")) 122 return (ENXIO); 123 124 device_set_desc(dev, "RouterBoard 333/600/800 NAND controller"); 125 return (BUS_PROBE_DEFAULT); 126} 127 128static int 129rb_nand_attach(device_t dev) 130{ 131 struct rb_nand_softc *sc; 132 phandle_t node; 133 uint32_t ale[2],cle[2],nce[2],rdy[2]; 134 u_long size,start; 135 int err; 136 137 sc = device_get_softc(dev); 138 node = ofw_bus_get_node(dev); 139 140 if (OF_getprop(node, "ale", ale, sizeof(ale)) <= 0) { 141 return (ENXIO); 142 } 143 if (OF_getprop(node, "cle", cle, sizeof(cle)) <= 0) { 144 return (ENXIO); 145 } 146 if (OF_getprop(node, "nce", nce, sizeof(nce)) <= 0) { 147 return (ENXIO); 148 } 149 if (OF_getprop(node, "rdy", rdy, sizeof(rdy)) <= 0) { 150 return (ENXIO); 151 } 152 153 if (ale[0] != cle[0] || ale[0] != nce[0] || ale[0] != rdy[0]) { 154 device_printf(dev, "GPIO handles for signals must match.\n"); 155 return (ENXIO); 156 } 157 sc->sc_ale_pin = ale[1]; 158 sc->sc_cle_pin = cle[1]; 159 sc->sc_nce_pin = nce[1]; 160 sc->sc_rdy_pin = rdy[1]; 161 162 sc->sc_gpio = OF_device_from_xref(ale[0]); 163 if (sc->sc_gpio == NULL) { 164 device_printf(dev, "No GPIO resource found!\n"); 165 return (ENXIO); 166 } 167 168 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid, 169 RF_ACTIVE); 170 if (sc->sc_mem == NULL) { 171 device_printf(dev, "could not allocate resources!\n"); 172 return (ENXIO); 173 } 174 175 start = rman_get_start(sc->sc_mem); 176 size = rman_get_size(sc->sc_mem); 177 if (law_enable(OCP85XX_TGTIF_LBC, start, size) != 0) { 178 bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->sc_mem); 179 device_printf(dev, "could not allocate local address window.\n"); 180 return (ENXIO); 181 } 182 183 nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL); 184 185 err = nandbus_create(dev); 186 187 return (err); 188} 189 190static int 191rb_nand_send_command(device_t dev, uint8_t command) 192{ 193 struct rb_nand_softc *sc; 194 195 nand_debug(NDBG_DRV,"rb_nand: send command %x", command); 196 197 sc = device_get_softc(dev); 198 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 1); 199 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 200 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 201 bus_write_1(sc->sc_mem, RB_NAND_DATA, command); 202 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 203 return (0); 204} 205 206static int 207rb_nand_send_address(device_t dev, uint8_t addr) 208{ 209 struct rb_nand_softc *sc; 210 211 nand_debug(NDBG_DRV,"rb_nand: send address %x", addr); 212 213 sc = device_get_softc(dev); 214 GPIO_PIN_SET(sc->sc_gpio, sc->sc_cle_pin, 0); 215 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 1); 216 GPIO_PIN_SET(sc->sc_gpio, sc->sc_nce_pin, 0); 217 bus_write_1(sc->sc_mem, RB_NAND_DATA, addr); 218 GPIO_PIN_SET(sc->sc_gpio, sc->sc_ale_pin, 0); 219 return (0); 220} 221 222static uint8_t 223rb_nand_read_byte(device_t dev) 224{ 225 struct rb_nand_softc *sc; 226 uint8_t data; 227 228 sc = device_get_softc(dev); 229 data = bus_read_1(sc->sc_mem, RB_NAND_DATA); 230 231 nand_debug(NDBG_DRV,"rb_nand: read %x", data); 232 233 return (data); 234} 235 236static void 237rb_nand_read_buf(device_t dev, void* buf, uint32_t len) 238{ 239 struct rb_nand_softc *sc; 240 241 sc = device_get_softc(dev); 242 243 bus_read_region_1(sc->sc_mem, RB_NAND_DATA, buf, len); 244} 245 246static void 247rb_nand_write_buf(device_t dev, void* buf, uint32_t len) 248{ 249 struct rb_nand_softc *sc; 250 int i; 251 uint8_t *b = (uint8_t*)buf; 252 253 sc = device_get_softc(dev); 254 255 for (i = 0; i < len; i++) { 256#ifdef NAND_DEBUG 257 if (!(i % 16)) 258 printf("%s", i == 0 ? "rb_nand:\n" : "\n"); 259 printf(" %x", b[i]); 260 if (i == len - 1) 261 printf("\n"); 262#endif 263 bus_write_1(sc->sc_mem, RB_NAND_DATA, b[i]); 264 } 265} 266 267static int 268rb_nand_select_cs(device_t dev, uint8_t cs) 269{ 270 271 if (cs > 0) 272 return (ENODEV); 273 274 return (0); 275} 276 277static int 278rb_nand_read_rnb(device_t dev) 279{ 280 struct rb_nand_softc *sc; 281 uint32_t rdy_bit; 282 283 sc = device_get_softc(dev); 284 GPIO_PIN_GET(sc->sc_gpio, sc->sc_rdy_pin, &rdy_bit); 285 286 return (rdy_bit); /* ready */ 287} 288