1/*- 2 * Copyright (c) 2015 Luiz Otavio O Souza <loos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: releng/11.0/sys/dev/iicbus/ds1307reg.h 297573 2016-04-05 03:27:33Z jhibbits $ 27 */ 28 29/* 30 * Maxim DS1307 RTC registers. 31 */ 32 33#ifndef _DS1307REG_H_ 34#define _DS1307REG_H_ 35 36#define DS1307_SECS 0x00 37#define DS1307_SECS_MASK 0x7f 38#define DS1307_SECS_CH 0x80 39#define DS1307_MINS 0x01 40#define DS1307_MINS_MASK 0x7f 41#define DS1307_HOUR 0x02 42#define DS1307_HOUR_MASK 0x3f 43#define DS1307_WEEKDAY 0x03 44#define DS1307_WEEKDAY_MASK 0x07 45#define DS1307_DATE 0x04 46#define DS1307_DATE_MASK 0x3f 47#define DS1307_MONTH 0x05 48#define DS1307_MONTH_MASK 0x1f 49#define DS1307_YEAR 0x06 50#define DS1307_YEAR_MASK 0xff 51#define DS1307_CONTROL 0x07 52#define DS1307_CTRL_OUT (1 << 7) 53#define MCP7941X_CTRL_SQWE (1 << 6) 54#define DS1307_CTRL_SQWE (1 << 4) 55#define DS1307_CTRL_RS1 (1 << 1) 56#define DS1307_CTRL_RS0 (1 << 0) 57#define DS1307_CTRL_RS_MASK (DS1307_CTRL_RS1 | DS1307_CTRL_RS0) 58#define DS1307_CTRL_MASK 0x93 59 60#endif /* _DS1307REG_H_ */ 61