ata-dma.c revision 54594
145095Ssos/*- 245095Ssos * Copyright (c) 1998,1999 S�ren Schmidt 345095Ssos * All rights reserved. 445095Ssos * 545095Ssos * Redistribution and use in source and binary forms, with or without 645095Ssos * modification, are permitted provided that the following conditions 745095Ssos * are met: 845095Ssos * 1. Redistributions of source code must retain the above copyright 945095Ssos * notice, this list of conditions and the following disclaimer, 1045095Ssos * without modification, immediately at the beginning of the file. 1145095Ssos * 2. Redistributions in binary form must reproduce the above copyright 1245095Ssos * notice, this list of conditions and the following disclaimer in the 1345095Ssos * documentation and/or other materials provided with the distribution. 1445095Ssos * 3. The name of the author may not be used to endorse or promote products 1545095Ssos * derived from this software without specific prior written permission. 1645095Ssos * 1745095Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1845095Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1945095Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2045095Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2145095Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2245095Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2345095Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2445095Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2545095Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2645095Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2745095Ssos * 2850477Speter * $FreeBSD: head/sys/dev/ata/ata-dma.c 54594 1999-12-14 10:25:28Z sos $ 2945095Ssos */ 3045095Ssos 3145150Ssos#include "pci.h" 3251520Ssos#include "apm.h" 3345095Ssos#include <sys/param.h> 3445095Ssos#include <sys/systm.h> 3545095Ssos#include <sys/buf.h> 3645095Ssos#include <sys/malloc.h> 3745798Ssos#include <sys/bus.h> 3854270Ssos#include <sys/disk.h> 3954270Ssos#include <sys/devicestat.h> 4051520Ssos#include <vm/vm.h> 4145095Ssos#include <vm/pmap.h> 4247272Ssos#if NPCI > 0 4345095Ssos#include <pci/pcivar.h> 4447272Ssos#endif 4551520Ssos#if NAPM > 0 4651520Ssos#include <machine/apm_bios.h> 4751520Ssos#endif 4845095Ssos#include <dev/ata/ata-all.h> 4954270Ssos#include <dev/ata/ata-disk.h> 5045095Ssos 5152067Ssos/* prototypes */ 5252067Ssosstatic void hpt366_timing(struct ata_softc *, int32_t, int32_t); 5352067Ssos 5452067Ssos/* misc defines */ 5552067Ssos#define MIN(a,b) ((a)>(b)?(b):(a)) 5645720Speter#ifdef __alpha__ 5745720Speter#undef vtophys 5851520Ssos#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 5945720Speter#endif 6045720Speter 6145150Ssos#if NPCI > 0 6245150Ssos 6345095Ssosint32_t 6445095Ssosata_dmainit(struct ata_softc *scp, int32_t device, 6545095Ssos int32_t apiomode, int32_t wdmamode, int32_t udmamode) 6645095Ssos{ 6745095Ssos int32_t type, devno, error; 6845095Ssos void *dmatab; 6945095Ssos 7045095Ssos if (!scp->bmaddr) 7145095Ssos return -1; 7251520Ssos#ifdef ATA_DMADEBUG 7345095Ssos printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 7445095Ssos scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 7545095Ssos#endif 7645095Ssos 7752067Ssos /* if simplex controller, only allow DMA on primary channel */ 7852067Ssos if (scp->unit == 1) { 7952067Ssos outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 8052067Ssos (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 8152067Ssos if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 8252067Ssos printf("ata%d: simplex device, DMA on primary channel only\n", 8352067Ssos scp->lun); 8452067Ssos return -1; 8552067Ssos } 8652067Ssos } 8752067Ssos 8845095Ssos if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 8951520Ssos return -1; 9045095Ssos 9145798Ssos if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 9245798Ssos (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 9351520Ssos printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 9451520Ssos free(dmatab, M_DEVBUF); 9551520Ssos return -1; 9645095Ssos } 9751520Ssos scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 9845095Ssos 9951520Ssos switch (type = pci_get_devid(scp->dev)) { 10045095Ssos 10145095Ssos case 0x71118086: /* Intel PIIX4 */ 10245095Ssos if (udmamode >= 2) { 10351520Ssos int32_t mask48, new48; 10445095Ssos 10545095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 10653029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 10751520Ssos if (bootverbose) 10851520Ssos printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 10951520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 11051520Ssos (error) ? "failed" : "success"); 11153681Ssos if (!error) { 11253681Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 11353681Ssos mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 11453681Ssos new48 = (1 << devno) + (2 << (16 + (devno << 2))); 11553681Ssos pci_write_config(scp->dev, 0x48, 11653681Ssos (pci_read_config(scp->dev, 0x48, 4) & 11753681Ssos ~mask48) | new48, 4); 11853681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 11953681Ssos return 0; 12053681Ssos } 12145095Ssos } 12245095Ssos /* FALLTHROUGH */ 12345095Ssos 12445095Ssos case 0x70108086: /* Intel PIIX3 */ 12545095Ssos if (wdmamode >= 2 && apiomode >= 4) { 12645095Ssos int32_t mask40, new40, mask44, new44; 12745095Ssos 12845095Ssos /* if SITRE not set doit for both channels */ 12945798Ssos if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 13051520Ssos new40 = pci_read_config(scp->dev, 0x40, 4); 13151520Ssos new44 = pci_read_config(scp->dev, 0x44, 4); 13251520Ssos if (!(new40 & 0x00004000)) { 13351520Ssos new44 &= ~0x0000000f; 13451520Ssos new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 13551520Ssos } 13651520Ssos if (!(new40 & 0x40000000)) { 13751520Ssos new44 &= ~0x000000f0; 13851520Ssos new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 13951520Ssos } 14051520Ssos new40 |= 0x40004000; 14151520Ssos pci_write_config(scp->dev, 0x40, new40, 4); 14251520Ssos pci_write_config(scp->dev, 0x44, new44, 4); 14345095Ssos } 14445095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 14553029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 14651520Ssos if (bootverbose) 14751520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 14851520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 14951520Ssos (error) ? "failed" : "success"); 15053681Ssos if (!error) { 15153681Ssos if (device == ATA_MASTER) { 15253681Ssos mask40 = 0x0000330f; 15353681Ssos new40 = 0x00002307; 15453681Ssos mask44 = 0; 15553681Ssos new44 = 0; 15653681Ssos } 15753681Ssos else { 15853681Ssos mask40 = 0x000000f0; 15953681Ssos new40 = 0x00000070; 16053681Ssos mask44 = 0x0000000f; 16153681Ssos new44 = 0x0000000b; 16253681Ssos } 16353681Ssos if (scp->unit) { 16453681Ssos mask40 <<= 16; 16553681Ssos new40 <<= 16; 16653681Ssos mask44 <<= 4; 16753681Ssos new44 <<= 4; 16853681Ssos } 16953681Ssos pci_write_config(scp->dev, 0x40, 17053681Ssos (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 17153681Ssos new40, 4); 17253681Ssos pci_write_config(scp->dev, 0x44, 17353681Ssos (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 17453681Ssos new44, 4); 17553681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 17653681Ssos return 0; 17745095Ssos } 17851520Ssos } 17953681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 18045095Ssos break; 18145095Ssos 18245095Ssos case 0x12308086: /* Intel PIIX */ 18354544Ssos if (wdmamode >= 2 && apiomode >= 4) { 18454544Ssos int32_t word40; 18554544Ssos 18654544Ssos word40 = pci_read_config(scp->dev, 0x40, 4); 18754544Ssos word40 >>= scp->unit * 16; 18854544Ssos 18954544Ssos /* Check for timing config usable for DMA on controller */ 19054544Ssos if (!((word40 & 0x3300) == 0x2300 && 19154544Ssos ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1)) 19254544Ssos break; 19354544Ssos 19454544Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 19554544Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 19654544Ssos if (bootverbose) 19754544Ssos printf("ata%d: %s: %s setting up WDMA2 mode on PIIX chip\n", 19854544Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 19954544Ssos (error) ? "failed" : "success"); 20054544Ssos if (!error) { 20154544Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 20254544Ssos return 0; 20354544Ssos } 20454544Ssos } 20545095Ssos break; 20645095Ssos 20752067Ssos case 0x522910b9: /* AcerLabs Aladdin IV/V */ 20853029Ssos /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 20953029Ssos if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 21053029Ssos printf("ata%d: Aladdin: two atapi devices on this channel, " 21153029Ssos "DMA disabled\n", scp->lun); 21253029Ssos break; 21352067Ssos } 21453681Ssos if (udmamode >= 2) { 21552067Ssos int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 21652067Ssos 21751520Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 21853029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 21951520Ssos if (bootverbose) 22052067Ssos printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 22151520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 22251520Ssos (error) ? "failed" : "success"); 22353681Ssos if (!error) { 22453681Ssos word54 |= 0x5555; 22553681Ssos word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 22653681Ssos pci_write_config(scp->dev, 0x54, word54, 4); 22753681Ssos pci_write_config(scp->dev, 0x53, 22853681Ssos pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 22953681Ssos scp->flags |= ATA_ATAPI_DMA_RO; 23053681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 23153681Ssos return 0; 23253681Ssos } 23351520Ssos } 23453681Ssos if (wdmamode >= 2 && apiomode >= 4) { 23552067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 23653029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 23752067Ssos if (bootverbose) 23852067Ssos printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 23952067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 24052067Ssos (error) ? "failed" : "success"); 24153681Ssos if (!error) { 24253681Ssos pci_write_config(scp->dev, 0x53, 24353681Ssos pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 24453681Ssos scp->flags |= ATA_ATAPI_DMA_RO; 24553681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 24653681Ssos return 0; 24753681Ssos } 24852067Ssos } 24953681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 25052067Ssos break; 25152067Ssos 25254594Ssos case 0x05711106: /* VIA Apollo 82C571 / 82C586 / 82C686 */ 25353681Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 25454270Ssos 25554594Ssos /* UDMA4 mode only on VT82C686 hardware */ 25654594Ssos if (udmamode >= 4 && ata_find_dev(scp->dev, 0x06861106)) { 25753681Ssos int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 25853681Ssos 25953681Ssos /* enable UDMA transfer modes setting by SETFEATURES cmd */ 26053681Ssos pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 26154270Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 26253681Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 26354270Ssos if (bootverbose) 26454270Ssos printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n", 26554270Ssos scp->lun, (device == ATA_MASTER) ? "master":"slave", 26654270Ssos (error) ? "failed" : "success"); 26754270Ssos if (!error) { 26854270Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 26954270Ssos return 0; 27053681Ssos } 27154270Ssos pci_write_config(scp->dev, 0x53 - devno, byte, 1); 27254270Ssos } 27354270Ssos 27454594Ssos /* UDMA2 mode only on rev 1 and better 82C586 & 82C586 chips */ 27554594Ssos if (udmamode >= 2 && pci_read_config(scp->dev, 0x08, 1) >= 0x01 && 27654594Ssos (ata_find_dev(scp->dev, 0x05861106) || 27754594Ssos ata_find_dev(scp->dev, 0x06861106))) { 27854270Ssos int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 27954270Ssos 28054270Ssos /* enable UDMA transfer modes setting by SETFEATURES cmd */ 28154270Ssos pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 28253681Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 28353681Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 28453681Ssos if (bootverbose) 28553681Ssos printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n", 28653681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 28753681Ssos (error) ? "failed" : "success"); 28853681Ssos if (!error) { 28954270Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATA_MASTER) || 29054270Ssos (device == ATA_SLAVE && scp->devices & ATA_ATA_SLAVE)) { 29154270Ssos struct ata_params *ap = ((struct ad_softc *) 29254270Ssos (scp->dev_softc[(device==ATA_MASTER)?0:1]))->ata_parm; 29354270Ssos 29454594Ssos if (ata_find_dev(scp->dev, 0x06861106) && 29554270Ssos (ap->udmamodes & 0x10) && !ap->cblid) { 29654270Ssos pci_write_config(scp->dev, 0x53 - devno, 29754270Ssos (byte & 0x1c) | 0x42, 1); 29854270Ssos } 29954270Ssos } 30053681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 30153681Ssos return 0; 30253681Ssos } 30353681Ssos pci_write_config(scp->dev, 0x53 - devno, byte, 1); 30453681Ssos } 30553681Ssos if (wdmamode >= 2 && apiomode >= 4) { 30653681Ssos /* set WDMA2 mode timing */ 30753681Ssos pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1); 30853681Ssos 30953681Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 31053681Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 31153681Ssos if (bootverbose) 31253681Ssos printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n", 31353681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 31453681Ssos (error) ? "failed" : "success"); 31553681Ssos if (!error) { 31653681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 31753681Ssos return 0; 31853681Ssos } 31953681Ssos } 32053681Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 32153681Ssos break; 32253681Ssos 32354544Ssos case 0x55131039: /* SiS 5591 */ 32454544Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 32554544Ssos if (udmamode >= 2) { 32654544Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 32754544Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 32854544Ssos if (bootverbose) 32954544Ssos printf("ata%d: %s: %s setting up UDMA2 mode on SiS chip\n", 33054544Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 33154544Ssos (error) ? "failed" : "success"); 33254544Ssos if (!error) { 33354544Ssos pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2); 33454544Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 33554544Ssos return 0; 33654544Ssos } 33754544Ssos } 33854544Ssos if (wdmamode >=2 && apiomode >= 4) { 33954544Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 34054544Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 34154544Ssos if (bootverbose) 34254544Ssos printf("ata%d: %s: %s setting up WDMA2 mode on SiS chip\n", 34354544Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 34454544Ssos (error) ? "failed" : "success"); 34554544Ssos if (!error) { 34654544Ssos pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2); 34754544Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 34854544Ssos return 0; 34954544Ssos } 35054544Ssos } 35154544Ssos /* we could set PIO mode timings, but we assume the BIOS did that */ 35254544Ssos break; 35354544Ssos 35452067Ssos case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 35552067Ssos case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 35652067Ssos /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 35752067Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 35852067Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 35952067Ssos break; 36052067Ssos 36152067Ssos devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 36252918Ssos if (udmamode >=4 && type == 0x4d38105a && 36352918Ssos !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 36452918Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 36553029Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 36652918Ssos if (bootverbose) 36752918Ssos printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n", 36852918Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 36952918Ssos (error) ? "failed" : "success"); 37053681Ssos if (!error) { 37153681Ssos outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 37253681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 37353681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 37453681Ssos return 0; 37553681Ssos } 37652918Ssos } 37753681Ssos if (udmamode >= 2) { 37845095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 37953029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 38051520Ssos if (bootverbose) 38151520Ssos printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 38251520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 38351520Ssos (error) ? "failed" : "success"); 38453681Ssos if (!error) { 38553681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 38653681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 38753681Ssos return 0; 38853681Ssos } 38945095Ssos } 39053681Ssos if (wdmamode >= 2 && apiomode >= 4) { 39145095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 39253029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 39351520Ssos if (bootverbose) 39451520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 39551520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 39651520Ssos (error) ? "failed" : "success"); 39753681Ssos if (!error) { 39853681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 39953681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 40053681Ssos return 0; 40153681Ssos } 40251520Ssos } 40353681Ssos if (bootverbose) 40453681Ssos printf("ata%d: %s: setting PIO mode on Promise chip\n", 40553681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 40653681Ssos pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 40745095Ssos break; 40845095Ssos 40954270Ssos case 0x00041103: /* HighPoint HPT366 controller */ 41053681Ssos /* no ATAPI devices for now */ 41151520Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 41252067Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 41352067Ssos break; 41451520Ssos 41552067Ssos devno = (device == ATA_MASTER) ? 0 : 1; 41652067Ssos if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 41752067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 41853029Ssos ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 41952067Ssos if (bootverbose) 42052067Ssos printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 42152067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 42252067Ssos (error) ? "failed" : "success"); 42353681Ssos if (!error) { 42453681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA4); 42553681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 42653681Ssos return 0; 42753681Ssos } 42851520Ssos } 42952918Ssos if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 43045095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 43153029Ssos ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 43252067Ssos if (bootverbose) 43352067Ssos printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 43452067Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 43552067Ssos (error) ? "failed" : "success"); 43653681Ssos if (!error) { 43753681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA3); 43853681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 43953681Ssos return 0; 44053681Ssos } 44152067Ssos } 44253681Ssos if (udmamode >= 2) { 44352067Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 44453029Ssos ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 44551520Ssos if (bootverbose) 44652067Ssos printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 44751520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 44851520Ssos (error) ? "failed" : "success"); 44953681Ssos if (!error) { 45053681Ssos hpt366_timing(scp, device, ATA_MODE_UDMA2); 45153681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 45253681Ssos return 0; 45353681Ssos } 45445095Ssos } 45553681Ssos if (wdmamode >= 2 && apiomode >= 4) { 45645095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 45753029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 45851520Ssos if (bootverbose) 45952067Ssos printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 46051520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 46151520Ssos (error) ? "failed" : "success"); 46253681Ssos if (!error) { 46353681Ssos hpt366_timing(scp, device, ATA_MODE_WDMA2); 46453681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 46553681Ssos return 0; 46653681Ssos } 46745095Ssos } 46853681Ssos if (bootverbose) 46953681Ssos printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 47053681Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 47153681Ssos hpt366_timing(scp, device, ATA_MODE_PIO); 47245095Ssos break; 47345095Ssos 47451548Ssos default: /* unknown controller chip */ 47551548Ssos /* better not try generic DMA on ATAPI devices it almost never works */ 47651548Ssos if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 47751548Ssos (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 47851548Ssos break; 47951548Ssos 48051548Ssos /* well, we have no support for this, but try anyways */ 48154594Ssos if ((wdmamode >= 2 && apiomode >= 4) && scp->bmaddr) { 48254594Ssos#if MAYBE_NOT 48354594Ssos && (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 48451520Ssos ((device == ATA_MASTER) ? 48554544Ssos ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) { 48654594Ssos#endif 48745095Ssos error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 48853029Ssos ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 48951520Ssos if (bootverbose) 49051520Ssos printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 49151520Ssos scp->lun, (device == ATA_MASTER) ? "master" : "slave", 49251520Ssos (error) ? "failed" : "success"); 49353681Ssos if (!error) { 49453681Ssos scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 49553681Ssos return 0; 49653681Ssos } 49745095Ssos } 49845095Ssos } 49945095Ssos free(dmatab, M_DEVBUF); 50045095Ssos return -1; 50145095Ssos} 50245095Ssos 50345095Ssosint32_t 50445095Ssosata_dmasetup(struct ata_softc *scp, int32_t device, 50545095Ssos int8_t *data, int32_t count, int32_t flags) 50645095Ssos{ 50745095Ssos struct ata_dmaentry *dmatab; 50845095Ssos u_int32_t dma_count, dma_base; 50945095Ssos int32_t i = 0; 51045095Ssos 51151520Ssos#ifdef ATA_DMADEBUG 51245095Ssos printf("ata%d: dmasetup\n", scp->lun); 51345095Ssos#endif 51445720Speter if (((uintptr_t)data & 1) || (count & 1)) 51545095Ssos return -1; 51645095Ssos 51745095Ssos if (!count) { 51851520Ssos#ifdef ATA_DMADEBUG 51945095Ssos printf("ata%d: zero length DMA transfer attempt on %s\n", 52051520Ssos scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 52151520Ssos#endif 52245095Ssos return -1; 52345095Ssos } 52445095Ssos 52551520Ssos dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 52645095Ssos dma_base = vtophys(data); 52745720Speter dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 52845095Ssos data += dma_count; 52945095Ssos count -= dma_count; 53045095Ssos 53145095Ssos while (count) { 53245095Ssos dmatab[i].base = dma_base; 53345095Ssos dmatab[i].count = (dma_count & 0xffff); 53445095Ssos i++; 53545095Ssos if (i >= ATA_DMA_ENTRIES) { 53645095Ssos printf("ata%d: too many segments in DMA table for %s\n", 53745095Ssos scp->lun, (device ? "slave" : "master")); 53845095Ssos return -1; 53945095Ssos } 54045095Ssos dma_base = vtophys(data); 54145095Ssos dma_count = MIN(count, PAGE_SIZE); 54245095Ssos data += MIN(count, PAGE_SIZE); 54345095Ssos count -= MIN(count, PAGE_SIZE); 54445095Ssos } 54551520Ssos#ifdef ATA_DMADEBUG 54651520Ssos printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 54745095Ssos#endif 54845095Ssos dmatab[i].base = dma_base; 54945095Ssos dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 55045095Ssos 55145095Ssos outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 55251520Ssos#ifdef ATA_DMADEBUG 55351520Ssos printf("dmatab=%08x %08x\n", 55451520Ssos vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 55545095Ssos#endif 55645095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 55745095Ssos outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 55845095Ssos (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 55945095Ssos return 0; 56045095Ssos} 56145095Ssos 56245095Ssosvoid 56352067Ssosata_dmastart(struct ata_softc *scp) 56445095Ssos{ 56551520Ssos#ifdef ATA_DMADEBUG 56645095Ssos printf("ata%d: dmastart\n", scp->lun); 56745095Ssos#endif 56852067Ssos scp->flags |= ATA_DMA_ACTIVE; 56945095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, 57045095Ssos inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 57145095Ssos} 57245095Ssos 57345095Ssosint32_t 57452067Ssosata_dmadone(struct ata_softc *scp) 57545095Ssos{ 57651520Ssos#ifdef ATA_DMADEBUG 57745095Ssos printf("ata%d: dmadone\n", scp->lun); 57845095Ssos#endif 57945095Ssos outb(scp->bmaddr + ATA_BMCMD_PORT, 58045095Ssos inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 58152067Ssos scp->flags &= ~ATA_DMA_ACTIVE; 58245095Ssos return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 58345095Ssos} 58445095Ssos 58545095Ssosint32_t 58652067Ssosata_dmastatus(struct ata_softc *scp) 58745095Ssos{ 58851520Ssos#ifdef ATA_DMADEBUG 58945095Ssos printf("ata%d: dmastatus\n", scp->lun); 59045095Ssos#endif 59145095Ssos return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 59245095Ssos} 59345095Ssos 59452067Ssosstatic void 59552067Ssoshpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 59652067Ssos{ 59752067Ssos u_int32_t timing; 59852067Ssos 59952067Ssos switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 60052067Ssos case 0x85: /* 25Mhz */ 60152067Ssos switch (mode) { 60252067Ssos case ATA_MODE_PIO: timing = 0xc0ca8521; break; 60352067Ssos case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 60452067Ssos case ATA_MODE_UDMA2: 60552067Ssos case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 60652067Ssos case ATA_MODE_UDMA4: timing = 0x90c98521; break; 60752067Ssos default: timing = 0x01208585; 60852067Ssos } 60952067Ssos break; 61052067Ssos default: 61152067Ssos case 0xa7: /* 33MHz */ 61252067Ssos switch (mode) { 61352067Ssos case ATA_MODE_PIO: timing = 0xc0c8a731; break; 61452067Ssos case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 61552067Ssos case ATA_MODE_UDMA2: timing = 0x90caa731; break; 61652067Ssos case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 61752067Ssos case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 61852067Ssos default: timing = 0x0120a7a7; 61952067Ssos } 62052067Ssos break; 62152067Ssos case 0xd9: /* 40Mhz */ 62252067Ssos switch (mode) { 62352067Ssos case ATA_MODE_PIO: timing = 0xc008d963; break; 62452067Ssos case ATA_MODE_WDMA2: timing = 0xa008d943; break; 62552067Ssos case ATA_MODE_UDMA2: timing = 0x900bd943; break; 62652067Ssos case ATA_MODE_UDMA3: timing = 0x900ad943; break; 62752067Ssos case ATA_MODE_UDMA4: timing = 0x900fd943; break; 62852067Ssos default: timing = 0x0120d9d9; 62952067Ssos } 63052067Ssos } 63152067Ssos pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 63252067Ssos} 63352067Ssos 63445095Ssos#else /* NPCI > 0 */ 63545095Ssos 63645095Ssosint32_t 63745095Ssosata_dmainit(struct ata_softc *scp, int32_t device, 63851520Ssos int32_t piomode, int32_t wdmamode, int32_t udmamode) 63945095Ssos{ 64045095Ssos return -1; 64145095Ssos} 64245095Ssos 64345095Ssosint32_t 64445095Ssosata_dmasetup(struct ata_softc *scp, int32_t device, 64551520Ssos int8_t *data, int32_t count, int32_t flags) 64645095Ssos{ 64745095Ssos return -1; 64845095Ssos} 64945095Ssos 65045095Ssosvoid 65152067Ssosata_dmastart(struct ata_softc *scp) 65245095Ssos{ 65345095Ssos} 65445095Ssos 65545095Ssosint32_t 65652067Ssosata_dmadone(struct ata_softc *scp) 65745095Ssos{ 65845095Ssos return -1; 65945095Ssos} 66045095Ssos 66145095Ssosint32_t 66252067Ssosata_dmastatus(struct ata_softc *scp) 66345095Ssos{ 66445095Ssos return -1; 66545095Ssos} 66645095Ssos 66745095Ssos#endif /* NPCI > 0 */ 668