ata-dma.c revision 54594
1/*- 2 * Copyright (c) 1998,1999 S�ren Schmidt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD: head/sys/dev/ata/ata-dma.c 54594 1999-12-14 10:25:28Z sos $ 29 */ 30 31#include "pci.h" 32#include "apm.h" 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/buf.h> 36#include <sys/malloc.h> 37#include <sys/bus.h> 38#include <sys/disk.h> 39#include <sys/devicestat.h> 40#include <vm/vm.h> 41#include <vm/pmap.h> 42#if NPCI > 0 43#include <pci/pcivar.h> 44#endif 45#if NAPM > 0 46#include <machine/apm_bios.h> 47#endif 48#include <dev/ata/ata-all.h> 49#include <dev/ata/ata-disk.h> 50 51/* prototypes */ 52static void hpt366_timing(struct ata_softc *, int32_t, int32_t); 53 54/* misc defines */ 55#define MIN(a,b) ((a)>(b)?(b):(a)) 56#ifdef __alpha__ 57#undef vtophys 58#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 59#endif 60 61#if NPCI > 0 62 63int32_t 64ata_dmainit(struct ata_softc *scp, int32_t device, 65 int32_t apiomode, int32_t wdmamode, int32_t udmamode) 66{ 67 int32_t type, devno, error; 68 void *dmatab; 69 70 if (!scp->bmaddr) 71 return -1; 72#ifdef ATA_DMADEBUG 73 printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n", 74 scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr); 75#endif 76 77 /* if simplex controller, only allow DMA on primary channel */ 78 if (scp->unit == 1) { 79 outb(scp->bmaddr + ATA_BMSTAT_PORT, inb(scp->bmaddr + ATA_BMSTAT_PORT) & 80 (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); 81 if (inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { 82 printf("ata%d: simplex device, DMA on primary channel only\n", 83 scp->lun); 84 return -1; 85 } 86 } 87 88 if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) 89 return -1; 90 91 if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ 92 (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { 93 printf("ata_dmainit: dmatab crosses page boundary, no DMA\n"); 94 free(dmatab, M_DEVBUF); 95 return -1; 96 } 97 scp->dmatab[(device == ATA_MASTER) ? 0 : 1] = dmatab; 98 99 switch (type = pci_get_devid(scp->dev)) { 100 101 case 0x71118086: /* Intel PIIX4 */ 102 if (udmamode >= 2) { 103 int32_t mask48, new48; 104 105 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 106 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 107 if (bootverbose) 108 printf("ata%d: %s: %s setting up UDMA2 mode on PIIX4 chip\n", 109 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 110 (error) ? "failed" : "success"); 111 if (!error) { 112 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 113 mask48 = (1 << devno) + (3 << (16 + (devno << 2))); 114 new48 = (1 << devno) + (2 << (16 + (devno << 2))); 115 pci_write_config(scp->dev, 0x48, 116 (pci_read_config(scp->dev, 0x48, 4) & 117 ~mask48) | new48, 4); 118 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 119 return 0; 120 } 121 } 122 /* FALLTHROUGH */ 123 124 case 0x70108086: /* Intel PIIX3 */ 125 if (wdmamode >= 2 && apiomode >= 4) { 126 int32_t mask40, new40, mask44, new44; 127 128 /* if SITRE not set doit for both channels */ 129 if (!((pci_read_config(scp->dev, 0x40, 4)>>(scp->unit<<8))&0x4000)){ 130 new40 = pci_read_config(scp->dev, 0x40, 4); 131 new44 = pci_read_config(scp->dev, 0x44, 4); 132 if (!(new40 & 0x00004000)) { 133 new44 &= ~0x0000000f; 134 new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8); 135 } 136 if (!(new40 & 0x40000000)) { 137 new44 &= ~0x000000f0; 138 new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20); 139 } 140 new40 |= 0x40004000; 141 pci_write_config(scp->dev, 0x40, new40, 4); 142 pci_write_config(scp->dev, 0x44, new44, 4); 143 } 144 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 145 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 146 if (bootverbose) 147 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX4 chip\n", 148 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 149 (error) ? "failed" : "success"); 150 if (!error) { 151 if (device == ATA_MASTER) { 152 mask40 = 0x0000330f; 153 new40 = 0x00002307; 154 mask44 = 0; 155 new44 = 0; 156 } 157 else { 158 mask40 = 0x000000f0; 159 new40 = 0x00000070; 160 mask44 = 0x0000000f; 161 new44 = 0x0000000b; 162 } 163 if (scp->unit) { 164 mask40 <<= 16; 165 new40 <<= 16; 166 mask44 <<= 4; 167 new44 <<= 4; 168 } 169 pci_write_config(scp->dev, 0x40, 170 (pci_read_config(scp->dev, 0x40, 4) & ~mask40)| 171 new40, 4); 172 pci_write_config(scp->dev, 0x44, 173 (pci_read_config(scp->dev, 0x44, 4) & ~mask44)| 174 new44, 4); 175 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 176 return 0; 177 } 178 } 179 /* we could set PIO mode timings, but we assume the BIOS did that */ 180 break; 181 182 case 0x12308086: /* Intel PIIX */ 183 if (wdmamode >= 2 && apiomode >= 4) { 184 int32_t word40; 185 186 word40 = pci_read_config(scp->dev, 0x40, 4); 187 word40 >>= scp->unit * 16; 188 189 /* Check for timing config usable for DMA on controller */ 190 if (!((word40 & 0x3300) == 0x2300 && 191 ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1)) 192 break; 193 194 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 195 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 196 if (bootverbose) 197 printf("ata%d: %s: %s setting up WDMA2 mode on PIIX chip\n", 198 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 199 (error) ? "failed" : "success"); 200 if (!error) { 201 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 202 return 0; 203 } 204 } 205 break; 206 207 case 0x522910b9: /* AcerLabs Aladdin IV/V */ 208 /* the Aladdin doesn't support ATAPI DMA on both master & slave */ 209 if (scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { 210 printf("ata%d: Aladdin: two atapi devices on this channel, " 211 "DMA disabled\n", scp->lun); 212 break; 213 } 214 if (udmamode >= 2) { 215 int32_t word54 = pci_read_config(scp->dev, 0x54, 4); 216 217 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 218 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 219 if (bootverbose) 220 printf("ata%d: %s: %s setting up UDMA2 mode on Aladdin chip\n", 221 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 222 (error) ? "failed" : "success"); 223 if (!error) { 224 word54 |= 0x5555; 225 word54 |= (0x0a << (16 + (scp->unit << 3) + (device << 2))); 226 pci_write_config(scp->dev, 0x54, word54, 4); 227 pci_write_config(scp->dev, 0x53, 228 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 229 scp->flags |= ATA_ATAPI_DMA_RO; 230 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 231 return 0; 232 } 233 } 234 if (wdmamode >= 2 && apiomode >= 4) { 235 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 236 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 237 if (bootverbose) 238 printf("ata%d: %s: %s setting up WDMA2 mode on Aladdin chip\n", 239 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 240 (error) ? "failed" : "success"); 241 if (!error) { 242 pci_write_config(scp->dev, 0x53, 243 pci_read_config(scp->dev, 0x53, 1) | 0x03, 1); 244 scp->flags |= ATA_ATAPI_DMA_RO; 245 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 246 return 0; 247 } 248 } 249 /* we could set PIO mode timings, but we assume the BIOS did that */ 250 break; 251 252 case 0x05711106: /* VIA Apollo 82C571 / 82C586 / 82C686 */ 253 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 254 255 /* UDMA4 mode only on VT82C686 hardware */ 256 if (udmamode >= 4 && ata_find_dev(scp->dev, 0x06861106)) { 257 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 258 259 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 260 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 261 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 262 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 263 if (bootverbose) 264 printf("ata%d: %s: %s setting up UDMA4 mode on VIA chip\n", 265 scp->lun, (device == ATA_MASTER) ? "master":"slave", 266 (error) ? "failed" : "success"); 267 if (!error) { 268 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 269 return 0; 270 } 271 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 272 } 273 274 /* UDMA2 mode only on rev 1 and better 82C586 & 82C586 chips */ 275 if (udmamode >= 2 && pci_read_config(scp->dev, 0x08, 1) >= 0x01 && 276 (ata_find_dev(scp->dev, 0x05861106) || 277 ata_find_dev(scp->dev, 0x06861106))) { 278 int8_t byte = pci_read_config(scp->dev, 0x53 - devno, 1); 279 280 /* enable UDMA transfer modes setting by SETFEATURES cmd */ 281 pci_write_config(scp->dev, 0x53 - devno, (byte & 0x1c) | 0x40, 1); 282 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 283 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 284 if (bootverbose) 285 printf("ata%d: %s: %s setting up UDMA2 mode on VIA chip\n", 286 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 287 (error) ? "failed" : "success"); 288 if (!error) { 289 if ((device == ATA_MASTER && scp->devices & ATA_ATA_MASTER) || 290 (device == ATA_SLAVE && scp->devices & ATA_ATA_SLAVE)) { 291 struct ata_params *ap = ((struct ad_softc *) 292 (scp->dev_softc[(device==ATA_MASTER)?0:1]))->ata_parm; 293 294 if (ata_find_dev(scp->dev, 0x06861106) && 295 (ap->udmamodes & 0x10) && !ap->cblid) { 296 pci_write_config(scp->dev, 0x53 - devno, 297 (byte & 0x1c) | 0x42, 1); 298 } 299 } 300 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 301 return 0; 302 } 303 pci_write_config(scp->dev, 0x53 - devno, byte, 1); 304 } 305 if (wdmamode >= 2 && apiomode >= 4) { 306 /* set WDMA2 mode timing */ 307 pci_write_config(scp->dev, 0x4b - devno, 0x31 , 1); 308 309 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 310 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 311 if (bootverbose) 312 printf("ata%d: %s: %s setting up WDMA2 mode on VIA chip\n", 313 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 314 (error) ? "failed" : "success"); 315 if (!error) { 316 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 317 return 0; 318 } 319 } 320 /* we could set PIO mode timings, but we assume the BIOS did that */ 321 break; 322 323 case 0x55131039: /* SiS 5591 */ 324 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 325 if (udmamode >= 2) { 326 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 327 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 328 if (bootverbose) 329 printf("ata%d: %s: %s setting up UDMA2 mode on SiS chip\n", 330 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 331 (error) ? "failed" : "success"); 332 if (!error) { 333 pci_write_config(scp->dev, 0x40 + (devno << 1), 0xa301, 2); 334 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 335 return 0; 336 } 337 } 338 if (wdmamode >=2 && apiomode >= 4) { 339 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 340 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 341 if (bootverbose) 342 printf("ata%d: %s: %s setting up WDMA2 mode on SiS chip\n", 343 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 344 (error) ? "failed" : "success"); 345 if (!error) { 346 pci_write_config(scp->dev, 0x40 + (devno << 1), 0x0301, 2); 347 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 348 return 0; 349 } 350 } 351 /* we could set PIO mode timings, but we assume the BIOS did that */ 352 break; 353 354 case 0x4d33105a: /* Promise Ultra33 / FastTrak33 controllers */ 355 case 0x4d38105a: /* Promise Ultra66 / FastTrak66 controllers */ 356 /* the Promise can only do DMA on ATA disks not on ATAPI devices */ 357 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 358 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 359 break; 360 361 devno = (scp->unit << 1) + ((device == ATA_MASTER) ? 0 : 1); 362 if (udmamode >=4 && type == 0x4d38105a && 363 !(pci_read_config(scp->dev, 0x50, 2)&(scp->unit ? 1<<11 : 1<<10))) { 364 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 365 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 366 if (bootverbose) 367 printf("ata%d: %s: %s setting up UDMA4 mode on Promise chip\n", 368 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 369 (error) ? "failed" : "success"); 370 if (!error) { 371 outb(scp->bmaddr+0x11, inl(scp->bmaddr+0x11) | scp->unit ? 8:2); 372 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 373 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 374 return 0; 375 } 376 } 377 if (udmamode >= 2) { 378 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 379 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 380 if (bootverbose) 381 printf("ata%d: %s: %s setting up UDMA2 mode on Promise chip\n", 382 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 383 (error) ? "failed" : "success"); 384 if (!error) { 385 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004127f3, 4); 386 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 387 return 0; 388 } 389 } 390 if (wdmamode >= 2 && apiomode >= 4) { 391 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 392 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 393 if (bootverbose) 394 printf("ata%d: %s: %s setting up WDMA2 mode on Promise chip\n", 395 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 396 (error) ? "failed" : "success"); 397 if (!error) { 398 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004367f3, 4); 399 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 400 return 0; 401 } 402 } 403 if (bootverbose) 404 printf("ata%d: %s: setting PIO mode on Promise chip\n", 405 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 406 pci_write_config(scp->dev, 0x60 + (devno << 2), 0x004fe924, 4); 407 break; 408 409 case 0x00041103: /* HighPoint HPT366 controller */ 410 /* no ATAPI devices for now */ 411 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 412 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 413 break; 414 415 devno = (device == ATA_MASTER) ? 0 : 1; 416 if (udmamode >=4 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 417 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 418 ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); 419 if (bootverbose) 420 printf("ata%d: %s: %s setting up UDMA4 mode on HPT366 chip\n", 421 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 422 (error) ? "failed" : "success"); 423 if (!error) { 424 hpt366_timing(scp, device, ATA_MODE_UDMA4); 425 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA4; 426 return 0; 427 } 428 } 429 if (udmamode >=3 && !(pci_read_config(scp->dev, 0x5a, 1) & 0x2)) { 430 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 431 ATA_UDMA3, ATA_C_F_SETXFER, ATA_WAIT_READY); 432 if (bootverbose) 433 printf("ata%d: %s: %s setting up UDMA3 mode on HPT366 chip\n", 434 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 435 (error) ? "failed" : "success"); 436 if (!error) { 437 hpt366_timing(scp, device, ATA_MODE_UDMA3); 438 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA3; 439 return 0; 440 } 441 } 442 if (udmamode >= 2) { 443 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 444 ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 445 if (bootverbose) 446 printf("ata%d: %s: %s setting up UDMA2 mode on HPT366 chip\n", 447 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 448 (error) ? "failed" : "success"); 449 if (!error) { 450 hpt366_timing(scp, device, ATA_MODE_UDMA2); 451 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_UDMA2; 452 return 0; 453 } 454 } 455 if (wdmamode >= 2 && apiomode >= 4) { 456 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 457 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 458 if (bootverbose) 459 printf("ata%d: %s: %s setting up WDMA2 mode on HPT366 chip\n", 460 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 461 (error) ? "failed" : "success"); 462 if (!error) { 463 hpt366_timing(scp, device, ATA_MODE_WDMA2); 464 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 465 return 0; 466 } 467 } 468 if (bootverbose) 469 printf("ata%d: %s: setting PIO mode on HPT366 chip\n", 470 scp->lun, (device == ATA_MASTER) ? "master" : "slave"); 471 hpt366_timing(scp, device, ATA_MODE_PIO); 472 break; 473 474 default: /* unknown controller chip */ 475 /* better not try generic DMA on ATAPI devices it almost never works */ 476 if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || 477 (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) 478 break; 479 480 /* well, we have no support for this, but try anyways */ 481 if ((wdmamode >= 2 && apiomode >= 4) && scp->bmaddr) { 482#if MAYBE_NOT 483 && (inb(scp->bmaddr + ATA_BMSTAT_PORT) & 484 ((device == ATA_MASTER) ? 485 ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) { 486#endif 487 error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0, 488 ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); 489 if (bootverbose) 490 printf("ata%d: %s: %s setting up WDMA2 mode on generic chip\n", 491 scp->lun, (device == ATA_MASTER) ? "master" : "slave", 492 (error) ? "failed" : "success"); 493 if (!error) { 494 scp->mode[(device == ATA_MASTER) ? 0 : 1] = ATA_MODE_WDMA2; 495 return 0; 496 } 497 } 498 } 499 free(dmatab, M_DEVBUF); 500 return -1; 501} 502 503int32_t 504ata_dmasetup(struct ata_softc *scp, int32_t device, 505 int8_t *data, int32_t count, int32_t flags) 506{ 507 struct ata_dmaentry *dmatab; 508 u_int32_t dma_count, dma_base; 509 int32_t i = 0; 510 511#ifdef ATA_DMADEBUG 512 printf("ata%d: dmasetup\n", scp->lun); 513#endif 514 if (((uintptr_t)data & 1) || (count & 1)) 515 return -1; 516 517 if (!count) { 518#ifdef ATA_DMADEBUG 519 printf("ata%d: zero length DMA transfer attempt on %s\n", 520 scp->lun, ((device == ATA_MASTER) ? "master" : "slave")); 521#endif 522 return -1; 523 } 524 525 dmatab = scp->dmatab[(device == ATA_MASTER) ? 0 : 1]; 526 dma_base = vtophys(data); 527 dma_count = MIN(count, (PAGE_SIZE - ((uintptr_t)data & PAGE_MASK))); 528 data += dma_count; 529 count -= dma_count; 530 531 while (count) { 532 dmatab[i].base = dma_base; 533 dmatab[i].count = (dma_count & 0xffff); 534 i++; 535 if (i >= ATA_DMA_ENTRIES) { 536 printf("ata%d: too many segments in DMA table for %s\n", 537 scp->lun, (device ? "slave" : "master")); 538 return -1; 539 } 540 dma_base = vtophys(data); 541 dma_count = MIN(count, PAGE_SIZE); 542 data += MIN(count, PAGE_SIZE); 543 count -= MIN(count, PAGE_SIZE); 544 } 545#ifdef ATA_DMADEBUG 546 printf("ata_dmasetup: base=%08x count%08x\n", dma_base, dma_count); 547#endif 548 dmatab[i].base = dma_base; 549 dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT; 550 551 outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab)); 552#ifdef ATA_DMADEBUG 553 printf("dmatab=%08x %08x\n", 554 vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT)); 555#endif 556 outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0); 557 outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) | 558 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 559 return 0; 560} 561 562void 563ata_dmastart(struct ata_softc *scp) 564{ 565#ifdef ATA_DMADEBUG 566 printf("ata%d: dmastart\n", scp->lun); 567#endif 568 scp->flags |= ATA_DMA_ACTIVE; 569 outb(scp->bmaddr + ATA_BMCMD_PORT, 570 inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); 571} 572 573int32_t 574ata_dmadone(struct ata_softc *scp) 575{ 576#ifdef ATA_DMADEBUG 577 printf("ata%d: dmadone\n", scp->lun); 578#endif 579 outb(scp->bmaddr + ATA_BMCMD_PORT, 580 inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 581 scp->flags &= ~ATA_DMA_ACTIVE; 582 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 583} 584 585int32_t 586ata_dmastatus(struct ata_softc *scp) 587{ 588#ifdef ATA_DMADEBUG 589 printf("ata%d: dmastatus\n", scp->lun); 590#endif 591 return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 592} 593 594static void 595hpt366_timing(struct ata_softc *scp, int32_t device, int32_t mode) 596{ 597 u_int32_t timing; 598 599 switch (pci_read_config(scp->dev, (device == ATA_MASTER) ? 0x41 : 0x45, 1)){ 600 case 0x85: /* 25Mhz */ 601 switch (mode) { 602 case ATA_MODE_PIO: timing = 0xc0ca8521; break; 603 case ATA_MODE_WDMA2: timing = 0xa0ca8521; break; 604 case ATA_MODE_UDMA2: 605 case ATA_MODE_UDMA3: timing = 0x90cf8521; break; 606 case ATA_MODE_UDMA4: timing = 0x90c98521; break; 607 default: timing = 0x01208585; 608 } 609 break; 610 default: 611 case 0xa7: /* 33MHz */ 612 switch (mode) { 613 case ATA_MODE_PIO: timing = 0xc0c8a731; break; 614 case ATA_MODE_WDMA2: timing = 0xa0c8a731; break; 615 case ATA_MODE_UDMA2: timing = 0x90caa731; break; 616 case ATA_MODE_UDMA3: timing = 0x90cfa731; break; 617 case ATA_MODE_UDMA4: timing = 0x90c9a731; break; 618 default: timing = 0x0120a7a7; 619 } 620 break; 621 case 0xd9: /* 40Mhz */ 622 switch (mode) { 623 case ATA_MODE_PIO: timing = 0xc008d963; break; 624 case ATA_MODE_WDMA2: timing = 0xa008d943; break; 625 case ATA_MODE_UDMA2: timing = 0x900bd943; break; 626 case ATA_MODE_UDMA3: timing = 0x900ad943; break; 627 case ATA_MODE_UDMA4: timing = 0x900fd943; break; 628 default: timing = 0x0120d9d9; 629 } 630 } 631 pci_write_config(scp->dev, 0x40 + (device==ATA_MASTER ? 0 : 4), timing, 4); 632} 633 634#else /* NPCI > 0 */ 635 636int32_t 637ata_dmainit(struct ata_softc *scp, int32_t device, 638 int32_t piomode, int32_t wdmamode, int32_t udmamode) 639{ 640 return -1; 641} 642 643int32_t 644ata_dmasetup(struct ata_softc *scp, int32_t device, 645 int8_t *data, int32_t count, int32_t flags) 646{ 647 return -1; 648} 649 650void 651ata_dmastart(struct ata_softc *scp) 652{ 653} 654 655int32_t 656ata_dmadone(struct ata_softc *scp) 657{ 658 return -1; 659} 660 661int32_t 662ata_dmastatus(struct ata_softc *scp) 663{ 664 return -1; 665} 666 667#endif /* NPCI > 0 */ 668