1/*- 2******************************************************************************* 3Copyright (C) 2015 Annapurna Labs Ltd. 4 5This file may be licensed under the terms of the Annapurna Labs Commercial 6License Agreement. 7 8Alternatively, this file can be distributed under the terms of the GNU General 9Public License V2 as published by the Free Software Foundation and can be 10found at http://www.gnu.org/licenses/gpl-2.0.html 11 12Alternatively, redistribution and use in source and binary forms, with or 13without modification, are permitted provided that the following conditions are 14met: 15 16 * Redistributions of source code must retain the above copyright notice, 17 this list of conditions and the following disclaimer. 18 19 * Redistributions in binary form must reproduce the above copyright 20 notice, this list of conditions and the following disclaimer in 21 the documentation and/or other materials provided with the 22 distribution. 23 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 25 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 28 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 31 ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 33 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 35*******************************************************************************/ 36 37/** 38 * @{ 39 * @file al_hal_an_lt_wrapper_regs.h 40 * 41 * @brief ... registers 42 * 43 */ 44 45#ifndef __AL_HAL_AN_LT_wrapper_REGS_H__ 46#define __AL_HAL_AN_LT_wrapper_REGS_H__ 47 48#include "al_hal_plat_types.h" 49 50#ifdef __cplusplus 51extern "C" { 52#endif 53/* 54* Unit Registers 55*/ 56 57 58 59struct al_an_lt_wrapper_gen { 60 /* [0x0] AN LT wrapper Version */ 61 uint32_t version; 62 /* [0x4] AN LT general configuration */ 63 uint32_t cfg; 64 uint32_t rsrvd[14]; 65}; 66struct al_an_lt_wrapper_an_lt { 67 /* [0x0] AN LT register file address */ 68 uint32_t addr; 69 /* [0x4] PCS register file data */ 70 uint32_t data; 71 /* [0x8] AN LT control signals */ 72 uint32_t ctrl; 73 /* [0xc] AN LT status signals */ 74 uint32_t status; 75 uint32_t rsrvd[4]; 76}; 77 78enum al_eth_an_lt_unit { 79 AL_ETH_AN_LT_UNIT_32_BIT = 0, 80 AL_ETH_AN_LT_UNIT_20_BIT = 1, 81 AL_ETH_AN_LT_UNIT_16_BIT = 2, 82}; 83 84struct al_an_lt_wrapper_regs { 85 uint32_t rsrvd_0[64]; 86 struct al_an_lt_wrapper_gen gen; /* [0x100] */ 87 struct al_an_lt_wrapper_an_lt an_lt[3]; /* [0x140] */ 88}; 89 90 91/* 92* Registers Fields 93*/ 94 95 96/**** version register ****/ 97/* Revision number (Minor) */ 98#define AN_LT_WRAPPER_GEN_VERSION_RELEASE_NUM_MINOR_MASK 0x000000FF 99#define AN_LT_WRAPPER_GEN_VERSION_RELEASE_NUM_MINOR_SHIFT 0 100/* Revision number (Major) */ 101#define AN_LT_WRAPPER_GEN_VERSION_RELEASE_NUM_MAJOR_MASK 0x0000FF00 102#define AN_LT_WRAPPER_GEN_VERSION_RELEASE_NUM_MAJOR_SHIFT 8 103/* Date of release */ 104#define AN_LT_WRAPPER_GEN_VERSION_DATE_DAY_MASK 0x001F0000 105#define AN_LT_WRAPPER_GEN_VERSION_DATE_DAY_SHIFT 16 106/* Month of release */ 107#define AN_LT_WRAPPER_GEN_VERSION_DATA_MONTH_MASK 0x01E00000 108#define AN_LT_WRAPPER_GEN_VERSION_DATA_MONTH_SHIFT 21 109/* Year of release (starting from 2000) */ 110#define AN_LT_WRAPPER_GEN_VERSION_DATE_YEAR_MASK 0x3E000000 111#define AN_LT_WRAPPER_GEN_VERSION_DATE_YEAR_SHIFT 25 112/* Reserved */ 113#define AN_LT_WRAPPER_GEN_VERSION_RESERVED_MASK 0xC0000000 114#define AN_LT_WRAPPER_GEN_VERSION_RESERVED_SHIFT 30 115 116/**** cfg register ****/ 117/* 118 * selection between different bus widths: 119 * 0 ��� 16 120 * 1 ��� 20 121 * 2 ��� 32 122 * 3 ��� N/A 123 */ 124#define AN_LT_WRAPPER_GEN_CFG_AN_LT_SEL_RX_MASK 0x00000003 125#define AN_LT_WRAPPER_GEN_CFG_AN_LT_SEL_RX_SHIFT 0 126/* 127 * selection between different bus widths: 128 * 0 ��� 16 129 * 1 ��� 20 130 * 2 ��� 32 131 * 3 ��� N/A 132 */ 133#define AN_LT_WRAPPER_GEN_CFG_AN_LT_SEL_TX_MASK 0x0000000C 134#define AN_LT_WRAPPER_GEN_CFG_AN_LT_SEL_TX_SHIFT 2 135/* bypass the AN/LT block */ 136#define AN_LT_WRAPPER_GEN_CFG_BYPASS_RX (1 << 4) 137/* bypass the AN/LT block */ 138#define AN_LT_WRAPPER_GEN_CFG_BYPASS_TX (1 << 5) 139 140/**** addr register ****/ 141/* Address value */ 142#define AN_LT_WRAPPER_AN_LT_ADDR_VAL_MASK 0x000007FF 143#define AN_LT_WRAPPER_AN_LT_ADDR_VAL_SHIFT 0 144 145/**** data register ****/ 146/* Data value */ 147#define AN_LT_WRAPPER_AN_LT_DATA_VAL_MASK 0x0000FFFF 148#define AN_LT_WRAPPER_AN_LT_DATA_VAL_SHIFT 0 149 150/**** ctrl register ****/ 151/* 152 * Default Auto-Negotiation Enable. If ���1���, the auto-negotiation process will 153 * start after reset de-assertion. The application can also start the 154 * auto-negotiation process by writing the KXAN_CONTROL.an_enable bit with ���1���. 155 * Important: This signal is OR'ed with the KXAN_CONTROL.an_enable bit. Hence, 156 * when asserted (1) the application is unable to disable autonegotiation and 157 * writing the an_enable bit has no effect. 158 * Note: Even if enabled by this pin, the application must write the correct 159 * abilities in the KXAN_ABILITY_1/2/3 registers within 60ms from reset 160 * deassertion (break_link_timer). 161 */ 162#define AN_LT_WRAPPER_AN_LT_CTRL_AN_ENA (1 << 0) 163/* 164 * If set to 1, the Arbitration State Machine reached the TRANSMIT_DISABLE 165 * state. 166 */ 167#define AN_LT_WRAPPER_AN_LT_CTRL_AN_DIS_TIMER (1 << 1) 168 169#define AN_LT_WRAPPER_AN_LT_CTRL_LINK_STATUS_KX (1 << 4) 170 171#define AN_LT_WRAPPER_AN_LT_CTRL_LINK_STATUS_KX4 (1 << 5) 172 173#define AN_LT_WRAPPER_AN_LT_CTRL_LINK_STATUS (1 << 6) 174/* 175 * PHY LOS indication selection 176 * 0 - Select input from the SerDes 177 * 1 - Select register value from phy_los_in_def 178 */ 179#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_IN_SEL (1 << 8) 180/* PHY LOS default value */ 181#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_IN_DEF (1 << 9) 182/* PHY LOS polarity */ 183#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_IN_POL (1 << 10) 184/* 185 * PHY LOS indication selection 186 * 0 ��� select AN output 187 * 1 - Select register value from phy_los_out_def 188 * 2 - Select input from the SerDes 189 * 3 ��� 0 190 */ 191#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_OUT_SEL_MASK 0x00003000 192#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_OUT_SEL_SHIFT 12 193/* PHY LOS default value */ 194#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_OUT_DEF (1 << 14) 195/* PHY LOS polarity */ 196#define AN_LT_WRAPPER_AN_LT_CTRL_PHY_LOS_OUT_POL (1 << 15) 197 198/**** status register ****/ 199/* Auto-Negotiation Done. If ���1���, the auto-negotiation process has completed. */ 200#define AN_LT_WRAPPER_AN_LT_STATUS_AN_DONE (1 << 0) 201/* 202 * If set to 1, auto-negotiation is enabled on the link. It represents the 203 * enable control bit KXAN_CONTROL.an_enable. When set to 1, the signals 204 * an_status/an_select are valid. 205 */ 206#define AN_LT_WRAPPER_AN_LT_STATUS_AN_VAL (1 << 1) 207/* 208 * If set to 0, auto-negotiation is in progress, if set to 1, the Arbitration 209 * State Machine reached the AN_GOOD_CHECK state (i.e. before autonegotiation is 210 * done, but the link no longer is used to transfer DME pages). Stays asserted 211 * also during AN_GOOD (autoneg done). 212 */ 213#define AN_LT_WRAPPER_AN_LT_STATUS_AN_STATUS (1 << 2) 214/* 215 * Selected Technology. Becomes valid when an_status is 1. 216 * The selection mode number (from 0 to 24) corresponds to the Technology 217 * Ability (A0-A24) from the ability pages (see 4.3.2.3 page 13). The mode 218 * selection is based on the matching technology abilities and priority. 219 * A value of 31 is an invalid setting that indicates that no common technology 220 * could be resolved. The application should then inspect the base page results 221 * to determine if the link is operable or not. 222 */ 223#define AN_LT_WRAPPER_AN_LT_STATUS_AN_SELECT_MASK 0x000001F0 224#define AN_LT_WRAPPER_AN_LT_STATUS_AN_SELECT_SHIFT 4 225/* 226 * If set to 1, the Arbitration State Machine reached the TRANSMIT_DISABLE state 227 */ 228#define AN_LT_WRAPPER_AN_LT_STATUS_AN_TR_DIS_STATUS (1 << 16) 229/* 230 * FEC Enable. Asserts when autonegotiation base page exchange identified both 231 * link partners advertising FEC capability and at least one is requesting FEC. 232 * The signal stays constant following base page exchange until autonegotiation 233 * is disabled or restarted. 234 * Note: the information can also be extracted from the base page exchange or 235 * the BP_ETH_STATUS register. 236 */ 237#define AN_LT_WRAPPER_AN_LT_STATUS_FEC_ENA (1 << 17) 238/* 239 * Link Training Frame Lock. If set to 1 the training frame delineation has been 240 * acquired. 241 */ 242#define AN_LT_WRAPPER_AN_LT_STATUS_LT_LOCK (1 << 20) 243/* 244 * If set to 0, link-training is in progress, if set to 1, the training is 245 * completed and the PCS datapath has been enabled (phy_los_out no longer 246 * gated). 247 */ 248#define AN_LT_WRAPPER_AN_LT_STATUS_LT_STATUS (1 << 21) 249/* 250 * If set to 1, link-training is enabled on the link. It represents the enable 251 * control bit PMD Control.taining enable. When set to 1, the signal lt_status 252 * is valid 253 */ 254#define AN_LT_WRAPPER_AN_LT_STATUS_LT_VAL (1 << 22) 255 256#ifdef __cplusplus 257} 258#endif 259 260#endif /* __AL_HAL_AN_LT_wrapper_REGS_H__ */ 261 262/** @} end of ... group */ 263 264 265