1/*- 2 * Copyright (c) 2012-2013 Robert N. M. Watson 3 * Copyright (c) 2013-2014 SRI International 4 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 5 * All rights reserved. 6 * 7 * This software was developed by SRI International and the University of 8 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 9 * ("CTSRD"), as part of the DARPA CRASH research programme. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * $FreeBSD: releng/11.0/sys/boot/fdt/dts/mips/beripad-sockit.dts 275861 2014-12-17 11:36:31Z br $ 33 */ 34 35/dts-v1/; 36 37/* 38 * Device names here have been largely made up on the spot, especially for the 39 * "compatible" strings, and might want to be revised. 40 */ 41 42/ { 43 model = "SRI/Cambridge BeriPad (SoCKit)"; 44 compatible = "sri-cambridge,beripad-sockit"; 45 #address-cells = <1>; 46 #size-cells = <1>; 47 48 cpus { 49 #address-cells = <1>; 50 #size-cells = <1>; 51 52 /* 53 * Secondary CPUs all start disabled and use the 54 * spin-table enable method. cpu-release-addr must be 55 * specified for each cpu other than cpu@0. Values of 56 * cpu-release-addr grow down from 0x100000 (kernel). 57 */ 58 status = "disabled"; 59 enable-method = "spin-table"; 60 61 cpu@0 { 62 device-type = "cpu"; 63 compatible = "sri-cambridge,beri"; 64 65 reg = <0 1>; 66 status = "okay"; 67 }; 68 69/* 70 cpu@1 { 71 device-type = "cpu"; 72 compatible = "sri-cambridge,beri"; 73 74 reg = <1 1>; 75 // XXX: should we need cached prefix? 76 cpu-release-addr = <0xffffffff 0x800fffe0>; 77 }; 78*/ 79 }; 80 81 memory { 82 device_type = "memory"; 83 reg = <0x0 0x10000000>; /* 256MB at 0x0 */ 84 }; 85 86 soc { 87 #address-cells = <2>; 88 #size-cells = <2>; 89 #interrupt-cells = <1>; 90 91 /* 92 * Declare mips,mips4k since BERI doesn't (yet) have a PIC, so 93 * we use mips4k coprocessor 0 interrupt management directly. 94 */ 95 compatible = "simple-bus", "mips,mips4k"; 96 /* ranges = <>; */ 97 98 beripic0: beripic@7f804000 { 99 compatible = "sri-cambridge,beri-pic"; 100 interrupt-controller; 101 #address-cells = <0>; 102 #interrupt-cells = <1>; 103 reg = <0x0 0x7f804000 0x0 0x400 104 0x0 0x7f806000 0x0 0x10 105 0x0 0x7f806080 0x0 0x10 106 0x0 0x7f806100 0x0 0x10>; 107 interrupts = <0 1 2 3 4>; 108 hard-interrupt-sources = <64>; 109 soft-interrupt-sources = <64>; 110 }; 111 112 pio0: pio@7f020000 { 113 compatible = "altr,pio"; 114 reg = <0x0 0x7f020000 0x0 0x1000>; /* send */ 115 interrupts = <4>; /* not used */ 116 interrupt-parent = <&beripic0>; 117 }; 118 119 pio1: pio@7f021000 { 120 compatible = "altr,pio"; 121 reg = <0x0 0x7f021000 0x0 0x1000>; /* recv */ 122 interrupts = <10>; 123 interrupt-parent = <&beripic0>; 124 }; 125 126 pio2: pio@7f022000 { 127 compatible = "altr,pio"; 128 reg = <0x0 0x7f022000 0x0 0x1000>; /* send */ 129 interrupts = <5>; /* not used */ 130 interrupt-parent = <&beripic0>; 131 }; 132 133 pio3: pio@7f023000 { 134 compatible = "altr,pio"; 135 reg = <0x0 0x7f023000 0x0 0x1000>; /* recv */ 136 interrupts = <11>; 137 interrupt-parent = <&beripic0>; 138 }; 139 140 virtio_mmio_platform0: virtio_mmio_platform@0 { 141 compatible = "beri,virtio_mmio_platform"; 142 pio-send = <&pio0>; 143 pio-recv = <&pio1>; 144 }; 145 146 virtio_mmio_platform1: virtio_mmio_platform@1 { 147 compatible = "beri,virtio_mmio_platform"; 148 pio-send = <&pio2>; 149 pio-recv = <&pio3>; 150 }; 151 152 virtio_block@200001000 { 153 compatible = "virtio,mmio"; 154 reg = <0x2 0x1000 0x0 0x1000>; 155 platform = <&virtio_mmio_platform0>; 156 status = "okay"; 157 }; 158 159 virtio_net@200002000 { 160 compatible = "virtio,mmio"; 161 reg = <0x2 0x2000 0x0 0x1000>; 162 platform = <&virtio_mmio_platform1>; 163 status = "okay"; 164 }; 165 166 serial@7f000000 { 167 compatible = "altera,jtag_uart-11_0"; 168 reg = <0x0 0x7f000000 0x0 0x40>; 169 interrupts = <0>; 170 interrupt-parent = <&beripic0>; 171 }; 172 173/* 174 serial@7f001000 { 175 compatible = "altera,jtag_uart-11_0"; 176 reg = <0x7f001000 0x40>; 177 }; 178 179 serial@7f002000 { 180 compatible = "altera,jtag_uart-11_0"; 181 reg = <0x7f002000 0x40>; 182 }; 183*/ 184 185/* 186 led@7f006000 { 187 compatible = "sri-cambridge,de4led"; 188 reg = <0x7f006000 0x1>; 189 }; 190*/ 191 192/* 193 avgen@0x7f009000 { 194 compatible = "sri-cambridge,avgen"; 195 reg = <0x7f009000 0x2>; 196 sri-cambridge,width = <1>; 197 sri-cambridge,fileio = "r"; 198 sri-cambridge,devname = "de4bsw"; 199 }; 200*/ 201 202/* 203 berirom@0x7f00a000 { 204 compatible = "sri-cambridge,berirom"; 205 reg = <0x7f00a000 0x1000>; 206 }; 207*/ 208 209/* 210 avgen@0x7f00c000 { 211 compatible = "sri-cambridge,avgen"; 212 reg = <0x7f00c000 0x8>; 213 sri-cambridge,width = <4>; 214 sri-cambridge,fileio = "rw"; 215 sri-cambridge,devname = "de4tempfan"; 216 }; 217*/ 218 }; 219}; 220