socfpga-sockit-beri.dts revision 275049
1273278Sbr/*-
2273278Sbr * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3273278Sbr * All rights reserved.
4273278Sbr *
5273278Sbr * This software was developed by SRI International and the University of
6273278Sbr * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7273278Sbr * ("CTSRD"), as part of the DARPA CRASH research programme.
8273278Sbr *
9273278Sbr * Redistribution and use in source and binary forms, with or without
10273278Sbr * modification, are permitted provided that the following conditions
11273278Sbr * are met:
12273278Sbr * 1. Redistributions of source code must retain the above copyright
13273278Sbr *    notice, this list of conditions and the following disclaimer.
14273278Sbr * 2. Redistributions in binary form must reproduce the above copyright
15273278Sbr *    notice, this list of conditions and the following disclaimer in the
16273278Sbr *    documentation and/or other materials provided with the distribution.
17273278Sbr *
18273278Sbr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19273278Sbr * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20273278Sbr * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21273278Sbr * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22273278Sbr * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23273278Sbr * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24273278Sbr * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25273278Sbr * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26273278Sbr * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27273278Sbr * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28273278Sbr * SUCH DAMAGE.
29273278Sbr *
30273278Sbr * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts 275049 2014-11-25 16:06:19Z br $
31273278Sbr */
32273278Sbr
33273278Sbr/dts-v1/;
34273278Sbr
35273278Sbr/include/ "socfpga.dtsi"
36273278Sbr
37273278Sbr/ {
38273278Sbr	model = "Terasic SoCKit";
39273278Sbr	compatible = "altr,socfpga-cyclone5", "altr,socfpga";
40273278Sbr
41275049Sbr	memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */
42275049Sbr		     < 0x00001000 0x1000 >; /* virtio block */
43273278Sbr
44273278Sbr	memory {
45273278Sbr		device_type = "memory";
46273278Sbr		reg = < 0x00000000 0x40000000 >;	/* 1G RAM */
47273278Sbr	};
48273278Sbr
49273278Sbr	SOC: socfpga {
50273278Sbr		serial0: serial@ffc02000 {
51273278Sbr			status = "okay";
52273278Sbr		};
53273278Sbr
54273278Sbr		usb1: usb@ffb40000 {
55273278Sbr			status = "okay";
56273278Sbr		};
57273278Sbr
58273278Sbr		gmac1: ethernet@ff702000 {
59273278Sbr			status = "okay";
60273380Sbr
61273380Sbr			rxd0-skew-ps = <0>;
62273380Sbr			rxd1-skew-ps = <0>;
63273380Sbr			rxd2-skew-ps = <0>;
64273380Sbr			rxd3-skew-ps = <0>;
65273380Sbr			txen-skew-ps = <0>;
66273380Sbr			txc-skew-ps = <2600>;
67273380Sbr			rxdv-skew-ps = <0>;
68273380Sbr			rxc-skew-ps = <2000>;
69273278Sbr		};
70273278Sbr
71273278Sbr		mmc: dwmmc@ff704000 {
72275049Sbr			#address-cells = <1>;
73275049Sbr			#size-cells = <0>;
74273278Sbr			status = "okay";
75273278Sbr			num-slots = <1>;
76273278Sbr			supports-highspeed;
77273278Sbr			broken-cd;
78273278Sbr			bus-frequency = <25000000>;
79273278Sbr
80273278Sbr			slot@0 {
81273278Sbr				reg = <0>;
82273278Sbr				bus-width = <4>;
83273380Sbr			};
84273278Sbr		};
85273278Sbr
86275049Sbr		beri_mem0: mem@d0000000 {
87273469Sbr			compatible = "sri-cambridge,beri-mem";
88275049Sbr			reg = <0xd0000000 0x10000000>; /* 256mb */
89273469Sbr			status = "okay";
90273469Sbr		};
91273469Sbr
92275049Sbr		pio0: pio@c0020000 {
93275049Sbr			compatible = "altr,pio";
94275049Sbr			reg = <0xc0020000 0x1000>; /* recv */
95275049Sbr			interrupts = < 76 >;
96275049Sbr			interrupt-parent = <&GIC>;
97275049Sbr			status = "okay";
98275049Sbr		};
99275049Sbr
100275049Sbr		pio1: pio@c0021000 {
101275049Sbr			compatible = "altr,pio";
102275049Sbr			reg = <0xc0021000 0x1000>; /* send */
103275049Sbr			interrupts = < 82 >; /* not in use on arm side */
104275049Sbr			interrupt-parent = <&GIC>;
105275049Sbr			status = "okay";
106275049Sbr		};
107275049Sbr
108275049Sbr		beri_vtblk: vtblk@00001000 {
109275049Sbr			compatible = "sri-cambridge,beri-vtblk";
110275049Sbr			reg = <0x00001000 0x1000>;
111275049Sbr			pio-recv = <&pio0>;
112275049Sbr			pio-send = <&pio1>;
113275049Sbr			beri-mem = <&beri_mem0>;
114275049Sbr			status = "okay";
115275049Sbr		};
116275049Sbr
117273278Sbr		beri_debug: ring@c0000000 {
118273278Sbr			compatible = "sri-cambridge,beri-ring";
119273278Sbr			reg = <0xc0000000 0x3000>;
120273278Sbr			interrupts = < 72 73 >;
121273278Sbr			interrupt-parent = <&GIC>;
122273278Sbr			device_name = "beri_debug";
123273278Sbr			data_size = <0x1000>;
124273278Sbr			data_read = <0x0>;
125273278Sbr			data_write = <0x1000>;
126273278Sbr			control_read = <0x2000>;
127273278Sbr			control_write = <0x2010>;
128273278Sbr			status = "okay";
129273278Sbr		};
130273278Sbr
131273278Sbr		beri_console: ring@c0004000 {
132273278Sbr			compatible = "sri-cambridge,beri-ring";
133273278Sbr			reg = <0xc0004000 0x3000>;
134273278Sbr			interrupts = < 74 75 >;
135273278Sbr			interrupt-parent = <&GIC>;
136273278Sbr			device_name = "beri_console";
137273278Sbr			data_size = <0x1000>;
138273278Sbr			data_read = <0x0>;
139273278Sbr			data_write = <0x1000>;
140273278Sbr			control_read = <0x2000>;
141273278Sbr			control_write = <0x2010>;
142273278Sbr			status = "okay";
143273278Sbr		};
144273278Sbr	};
145273278Sbr
146273278Sbr	chosen {
147273278Sbr		bootargs = "-v";
148273278Sbr		stdin = "serial0";
149273278Sbr		stdout = "serial0";
150273278Sbr	};
151273278Sbr};
152