1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: releng/11.0/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts 275859 2014-12-17 10:48:53Z br $ 31 */ 32 33/dts-v1/; 34 35/include/ "socfpga.dtsi" 36 37/ { 38 model = "Terasic SoCKit"; 39 compatible = "altr,socfpga-cyclone5", "altr,socfpga"; 40 41 memreserve = < 0x00000000 0x1000 >, /* SMP trampoline */ 42 < 0x00001000 0x1000 >, /* virtio block */ 43 < 0x00002000 0x1000 >; /* virtio net */ 44 45 memory { 46 device_type = "memory"; 47 reg = < 0x00000000 0x40000000 >; /* 1G RAM */ 48 }; 49 50 SOC: socfpga { 51 serial0: serial@ffc02000 { 52 status = "okay"; 53 }; 54 55 usb1: usb@ffb40000 { 56 status = "okay"; 57 }; 58 59 gmac1: ethernet@ff702000 { 60 status = "okay"; 61 62 rxd0-skew-ps = <0>; 63 rxd1-skew-ps = <0>; 64 rxd2-skew-ps = <0>; 65 rxd3-skew-ps = <0>; 66 txen-skew-ps = <0>; 67 txc-skew-ps = <2600>; 68 rxdv-skew-ps = <0>; 69 rxc-skew-ps = <2000>; 70 }; 71 72 mmc: dwmmc@ff704000 { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 status = "okay"; 76 num-slots = <1>; 77 supports-highspeed; 78 broken-cd; 79 bus-frequency = <25000000>; 80 81 slot@0 { 82 reg = <0>; 83 bus-width = <4>; 84 }; 85 }; 86 87 beri_mem0: mem@d0000000 { 88 compatible = "sri-cambridge,beri-mem"; 89 reg = <0xd0000000 0x10000000>; /* 256mb */ 90 status = "okay"; 91 }; 92 93 pio0: pio@c0020000 { 94 compatible = "altr,pio"; 95 reg = <0xc0020000 0x1000>; /* recv */ 96 interrupts = < 76 >; 97 interrupt-parent = <&GIC>; 98 status = "okay"; 99 }; 100 101 pio1: pio@c0021000 { 102 compatible = "altr,pio"; 103 reg = <0xc0021000 0x1000>; /* send */ 104 interrupts = < 82 >; /* not in use on arm side */ 105 interrupt-parent = <&GIC>; 106 status = "okay"; 107 }; 108 109 pio2: pio@c0022000 { 110 compatible = "altr,pio"; 111 reg = <0xc0022000 0x1000>; /* recv */ 112 interrupts = < 77 >; 113 interrupt-parent = <&GIC>; 114 status = "okay"; 115 }; 116 117 pio3: pio@c0023000 { 118 compatible = "altr,pio"; 119 reg = <0xc0023000 0x1000>; /* send */ 120 interrupts = < 83 >; /* not in use on arm side */ 121 interrupt-parent = <&GIC>; 122 status = "okay"; 123 }; 124 125 beri_vtblk: vtblk@00001000 { 126 compatible = "sri-cambridge,beri-vtblk"; 127 reg = <0x00001000 0x1000>; 128 pio-recv = <&pio0>; 129 pio-send = <&pio1>; 130 beri-mem = <&beri_mem0>; 131 status = "okay"; 132 }; 133 134 beri_vtnet: vtnet@00002000 { 135 compatible = "sri-cambridge,beri-vtnet"; 136 reg = <0x00002000 0x1000>; 137 pio-recv = <&pio2>; 138 pio-send = <&pio3>; 139 beri-mem = <&beri_mem0>; 140 status = "okay"; 141 }; 142 143 beri_debug: ring@c0000000 { 144 compatible = "sri-cambridge,beri-ring"; 145 reg = <0xc0000000 0x3000>; 146 interrupts = < 72 73 >; 147 interrupt-parent = <&GIC>; 148 device_name = "beri_debug"; 149 data_size = <0x1000>; 150 data_read = <0x0>; 151 data_write = <0x1000>; 152 control_read = <0x2000>; 153 control_write = <0x2010>; 154 status = "okay"; 155 }; 156 157 beri_console: ring@c0004000 { 158 compatible = "sri-cambridge,beri-ring"; 159 reg = <0xc0004000 0x3000>; 160 interrupts = < 74 75 >; 161 interrupt-parent = <&GIC>; 162 device_name = "beri_console"; 163 data_size = <0x1000>; 164 data_read = <0x0>; 165 data_write = <0x1000>; 166 control_read = <0x2000>; 167 control_write = <0x2010>; 168 status = "okay"; 169 }; 170 }; 171 172 chosen { 173 bootargs = "-v"; 174 stdin = "serial0"; 175 stdout = "serial0"; 176 }; 177}; 178