armada-388-gp.dts revision 294432
1/* 2 * Device Tree file for Marvell Armada 385 development board 3 * (RD-88F6820-GP) 4 * 5 * Copyright (C) 2014 Marvell 6 * 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * 9 * This file is dual-licensed: you can use it either under the terms 10 * of the GPL or the X11 license, at your option. Note that this dual 11 * licensing only applies to this file, and not this project as a 12 * whole. 13 * 14 * a) This file is licensed under the terms of the GNU General Public 15 * License version 2. This program is licensed "as is" without 16 * any warranty of any kind, whether express or implied. 17 * 18 * Or, alternatively, 19 * 20 * b) Permission is hereby granted, free of charge, to any person 21 * obtaining a copy of this software and associated documentation 22 * files (the "Software"), to deal in the Software without 23 * restriction, including without limitation the rights to use, 24 * copy, modify, merge, publish, distribute, sublicense, and/or 25 * sell copies of the Software, and to permit persons to whom the 26 * Software is furnished to do so, subject to the following 27 * conditions: 28 * 29 * The above copyright notice and this permission notice shall be 30 * included in all copies or substantial portions of the Software. 31 * 32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39 * OTHER DEALINGS IN THE SOFTWARE. 40 * 41 * $FreeBSD: head/sys/boot/fdt/dts/arm/armada-388-gp.dts 294432 2016-01-20 14:14:30Z zbb $ 42 */ 43 44/dts-v1/; 45#include "armada-388.dtsi" 46#include <dt-bindings/gpio/gpio.h> 47 48/ { 49 model = "Marvell Armada 385 GP"; 50 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; 51 52 chosen { 53 stdout-path = "serial0:115200n8"; 54 }; 55 56 memory { 57 device_type = "memory"; 58 reg = <0x00000000 0x80000000>; /* 2 GB */ 59 }; 60 61 soc { 62 ranges = <0 0 0xf1000000 0x100000>; 63 64 internal-regs { 65 spi@10600 { 66 pinctrl-names = "default"; 67 pinctrl-0 = <&spi0_pins>; 68 status = "okay"; 69 70 spi-flash@0 { 71 #address-cells = <1>; 72 #size-cells = <1>; 73 compatible = "st,m25p128", "jedec,spi-nor"; 74 reg = <0>; /* Chip select 0 */ 75 spi-max-frequency = <50000000>; 76 m25p,fast-read; 77 }; 78 }; 79 80 i2c@11000 { 81 pinctrl-names = "default"; 82 pinctrl-0 = <&i2c0_pins>; 83 status = "okay"; 84 clock-frequency = <100000>; 85 /* 86 * The EEPROM located at adresse 54 is needed 87 * for the boot - DO NOT ERASE IT - 88 */ 89 90 expander0: pca9555@20 { 91 compatible = "nxp,pca9555"; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&pca0_pins>; 94 interrupt-parent = <&gpio0>; 95 interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 96 gpio-controller; 97 #gpio-cells = <2>; 98 interrupt-controller; 99 #interrupt-cells = <2>; 100 reg = <0x20>; 101 }; 102 103 expander1: pca9555@21 { 104 compatible = "nxp,pca9555"; 105 pinctrl-names = "default"; 106 interrupt-parent = <&gpio0>; 107 interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 108 gpio-controller; 109 #gpio-cells = <2>; 110 interrupt-controller; 111 #interrupt-cells = <2>; 112 reg = <0x21>; 113 }; 114 115 }; 116 117 serial@12000 { 118 /* 119 * Exported on the micro USB connector CON16 120 * through an FTDI 121 */ 122 123 pinctrl-names = "default"; 124 pinctrl-0 = <&uart0_pins>; 125 status = "okay"; 126 }; 127 128 /* GE1 CON15 */ 129 ethernet@30000 { 130 pinctrl-names = "default"; 131 pinctrl-0 = <&ge1_rgmii_pins>; 132 status = "okay"; 133 phy = <&phy1>; 134 phy-mode = "rgmii-id"; 135 }; 136 137 /* CON4 */ 138 usb@58000 { 139 vcc-supply = <®_usb2_0_vbus>; 140 status = "okay"; 141 }; 142 143 /* GE0 CON1 */ 144 ethernet@70000 { 145 pinctrl-names = "default"; 146 /* 147 * The Reference Clock 0 is used to provide a 148 * clock to the PHY 149 */ 150 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; 151 status = "okay"; 152 phy = <&phy0>; 153 phy-mode = "rgmii-id"; 154 }; 155 156 157 mdio@72004 { 158 pinctrl-names = "default"; 159 pinctrl-0 = <&mdio_pins>; 160 161 phy0: ethernet-phy@1 { 162 reg = <1>; 163 }; 164 165 phy1: ethernet-phy@0 { 166 reg = <0>; 167 }; 168 }; 169 170 sata@a8000 { 171 pinctrl-names = "default"; 172 pinctrl-0 = <&sata0_pins>, <&sata1_pins>; 173 status = "okay"; 174 #address-cells = <1>; 175 #size-cells = <0>; 176 177 sata0: sata-port@0 { 178 reg = <0>; 179 target-supply = <®_5v_sata0>; 180 }; 181 182 sata1: sata-port@1 { 183 reg = <1>; 184 target-supply = <®_5v_sata1>; 185 }; 186 }; 187 188 sata@e0000 { 189 pinctrl-names = "default"; 190 pinctrl-0 = <&sata2_pins>, <&sata3_pins>; 191 status = "okay"; 192 #address-cells = <1>; 193 #size-cells = <0>; 194 195 sata2: sata-port@0 { 196 reg = <0>; 197 target-supply = <®_5v_sata2>; 198 }; 199 200 sata3: sata-port@1 { 201 reg = <1>; 202 target-supply = <®_5v_sata3>; 203 }; 204 }; 205 206 sdhci@d8000 { 207 pinctrl-names = "default"; 208 pinctrl-0 = <&sdhci_pins>; 209 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; 210 no-1-8-v; 211 wp-inverted; 212 bus-width = <8>; 213 status = "okay"; 214 }; 215 216 /* CON5 */ 217 usb3@f0000 { 218 vcc-supply = <®_usb2_1_vbus>; 219 status = "okay"; 220 }; 221 222 /* CON7 */ 223 usb3@f8000 { 224 vcc-supply = <®_usb3_vbus>; 225 status = "okay"; 226 }; 227 }; 228 229 gpio-fan { 230 compatible = "gpio-fan"; 231 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; 232 gpio-fan,speed-map = < 0 0 233 3000 1>; 234 }; 235 }; 236 237 pci0: pcie@f1080000 { 238 status = "okay"; 239 }; 240 241 reg_usb3_vbus: usb3-vbus { 242 compatible = "regulator-fixed"; 243 regulator-name = "usb3-vbus"; 244 regulator-min-microvolt = <5000000>; 245 regulator-max-microvolt = <5000000>; 246 enable-active-high; 247 regulator-always-on; 248 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; 249 }; 250 251 reg_usb2_0_vbus: v5-vbus0 { 252 compatible = "regulator-fixed"; 253 regulator-name = "v5.0-vbus0"; 254 regulator-min-microvolt = <5000000>; 255 regulator-max-microvolt = <5000000>; 256 enable-active-high; 257 regulator-always-on; 258 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; 259 }; 260 261 reg_usb2_1_vbus: v5-vbus1 { 262 compatible = "regulator-fixed"; 263 regulator-name = "v5.0-vbus1"; 264 regulator-min-microvolt = <5000000>; 265 regulator-max-microvolt = <5000000>; 266 enable-active-high; 267 regulator-always-on; 268 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 269 }; 270 271 reg_usb2_1_vbus: v5-vbus1 { 272 compatible = "regulator-fixed"; 273 regulator-name = "v5.0-vbus1"; 274 regulator-min-microvolt = <5000000>; 275 regulator-max-microvolt = <5000000>; 276 enable-active-high; 277 regulator-always-on; 278 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 279 }; 280 281 reg_sata0: pwr-sata0 { 282 compatible = "regulator-fixed"; 283 regulator-name = "pwr_en_sata0"; 284 enable-active-high; 285 regulator-always-on; 286 287 }; 288 289 reg_5v_sata0: v5-sata0 { 290 compatible = "regulator-fixed"; 291 regulator-name = "v5.0-sata0"; 292 regulator-min-microvolt = <5000000>; 293 regulator-max-microvolt = <5000000>; 294 regulator-always-on; 295 vin-supply = <®_sata0>; 296 }; 297 298 reg_12v_sata0: v12-sata0 { 299 compatible = "regulator-fixed"; 300 regulator-name = "v12.0-sata0"; 301 regulator-min-microvolt = <12000000>; 302 regulator-max-microvolt = <12000000>; 303 regulator-always-on; 304 vin-supply = <®_sata0>; 305 }; 306 307 reg_sata1: pwr-sata1 { 308 regulator-name = "pwr_en_sata1"; 309 compatible = "regulator-fixed"; 310 regulator-min-microvolt = <12000000>; 311 regulator-max-microvolt = <12000000>; 312 enable-active-high; 313 regulator-always-on; 314 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; 315 }; 316 317 reg_5v_sata1: v5-sata1 { 318 compatible = "regulator-fixed"; 319 regulator-name = "v5.0-sata1"; 320 regulator-min-microvolt = <5000000>; 321 regulator-max-microvolt = <5000000>; 322 regulator-always-on; 323 vin-supply = <®_sata1>; 324 }; 325 326 reg_12v_sata1: v12-sata1 { 327 compatible = "regulator-fixed"; 328 regulator-name = "v12.0-sata1"; 329 regulator-min-microvolt = <12000000>; 330 regulator-max-microvolt = <12000000>; 331 regulator-always-on; 332 vin-supply = <®_sata1>; 333 }; 334 335 reg_sata2: pwr-sata2 { 336 compatible = "regulator-fixed"; 337 regulator-name = "pwr_en_sata2"; 338 enable-active-high; 339 regulator-always-on; 340 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; 341 }; 342 343 reg_5v_sata2: v5-sata2 { 344 compatible = "regulator-fixed"; 345 regulator-name = "v5.0-sata2"; 346 regulator-min-microvolt = <5000000>; 347 regulator-max-microvolt = <5000000>; 348 regulator-always-on; 349 vin-supply = <®_sata2>; 350 }; 351 352 reg_12v_sata2: v12-sata2 { 353 compatible = "regulator-fixed"; 354 regulator-name = "v12.0-sata2"; 355 regulator-min-microvolt = <12000000>; 356 regulator-max-microvolt = <12000000>; 357 regulator-always-on; 358 vin-supply = <®_sata2>; 359 }; 360 361 reg_sata3: pwr-sata3 { 362 compatible = "regulator-fixed"; 363 regulator-name = "pwr_en_sata3"; 364 enable-active-high; 365 regulator-always-on; 366 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; 367 }; 368 369 reg_5v_sata3: v5-sata3 { 370 compatible = "regulator-fixed"; 371 regulator-name = "v5.0-sata3"; 372 regulator-min-microvolt = <5000000>; 373 regulator-max-microvolt = <5000000>; 374 regulator-always-on; 375 vin-supply = <®_sata3>; 376 }; 377 378 reg_12v_sata3: v12-sata3 { 379 compatible = "regulator-fixed"; 380 regulator-name = "v12.0-sata3"; 381 regulator-min-microvolt = <12000000>; 382 regulator-max-microvolt = <12000000>; 383 regulator-always-on; 384 vin-supply = <®_sata3>; 385 }; 386}; 387 388&pinctrl { 389 pca0_pins: pca0_pins { 390 marvell,pins = "mpp18"; 391 marvell,function = "gpio"; 392 }; 393}; 394