1/* 2 * Device Tree file for Marvell Armada 385 development board 3 * (RD-88F6820-GP) 4 * 5 * Copyright (C) 2014 Marvell 6 * 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * 9 * This file is dual-licensed: you can use it either under the terms 10 * of the GPL or the X11 license, at your option. Note that this dual 11 * licensing only applies to this file, and not this project as a 12 * whole. 13 * 14 * a) This file is licensed under the terms of the GNU General Public 15 * License version 2. This program is licensed "as is" without 16 * any warranty of any kind, whether express or implied. 17 * 18 * Or, alternatively, 19 * 20 * b) Permission is hereby granted, free of charge, to any person 21 * obtaining a copy of this software and associated documentation 22 * files (the "Software"), to deal in the Software without 23 * restriction, including without limitation the rights to use, 24 * copy, modify, merge, publish, distribute, sublicense, and/or 25 * sell copies of the Software, and to permit persons to whom the 26 * Software is furnished to do so, subject to the following 27 * conditions: 28 * 29 * The above copyright notice and this permission notice shall be 30 * included in all copies or substantial portions of the Software. 31 * 32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39 * OTHER DEALINGS IN THE SOFTWARE. 40 * 41 * $FreeBSD: releng/11.0/sys/boot/fdt/dts/arm/armada-388-gp.dts 301225 2016-06-02 18:41:33Z zbb $ 42 */ 43 44/dts-v1/; 45#include "armada-388.dtsi" 46#include <dt-bindings/gpio/gpio.h> 47 48/ { 49 model = "Marvell Armada 385 GP"; 50 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; 51 52 chosen { 53 stdout-path = "serial0:115200n8"; 54 }; 55 56 memory { 57 device_type = "memory"; 58 reg = <0x00000000 0x80000000>; /* 2 GB */ 59 }; 60 61 soc { 62 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>; 63 64 internal-regs { 65 crypto@90000 { 66 status = "okay"; 67 }; 68 crypto@92000 { 69 status = "okay"; 70 }; 71 72 spi@10600 { 73 pinctrl-names = "default"; 74 pinctrl-0 = <&spi0_pins>; 75 status = "okay"; 76 77 spi-flash@0 { 78 #address-cells = <1>; 79 #size-cells = <1>; 80 compatible = "st,m25p128", "jedec,spi-nor"; 81 reg = <0>; /* Chip select 0 */ 82 spi-max-frequency = <50000000>; 83 m25p,fast-read; 84 }; 85 }; 86 87 i2c@11000 { 88 pinctrl-names = "default"; 89 pinctrl-0 = <&i2c0_pins>; 90 status = "okay"; 91 clock-frequency = <100000>; 92 /* 93 * The EEPROM located at adresse 54 is needed 94 * for the boot - DO NOT ERASE IT - 95 */ 96 97 expander0: pca9555@20 { 98 compatible = "nxp,pca9555"; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pca0_pins>; 101 interrupt-parent = <&gpio0>; 102 interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 103 gpio-controller; 104 #gpio-cells = <2>; 105 interrupt-controller; 106 #interrupt-cells = <2>; 107 reg = <0x20>; 108 }; 109 110 expander1: pca9555@21 { 111 compatible = "nxp,pca9555"; 112 pinctrl-names = "default"; 113 interrupt-parent = <&gpio0>; 114 interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 115 gpio-controller; 116 #gpio-cells = <2>; 117 interrupt-controller; 118 #interrupt-cells = <2>; 119 reg = <0x21>; 120 }; 121 122 }; 123 124 serial@12000 { 125 /* 126 * Exported on the micro USB connector CON16 127 * through an FTDI 128 */ 129 130 pinctrl-names = "default"; 131 pinctrl-0 = <&uart0_pins>; 132 status = "okay"; 133 }; 134 135 /* GE1 CON15 */ 136 ethernet@30000 { 137 pinctrl-names = "default"; 138 pinctrl-0 = <&ge1_rgmii_pins>; 139 status = "okay"; 140 phy = <&phy1>; 141 phy-mode = "rgmii-id"; 142 }; 143 144 /* CON4 */ 145 usb@58000 { 146 vcc-supply = <®_usb2_0_vbus>; 147 status = "okay"; 148 }; 149 150 /* GE0 CON1 */ 151 ethernet@70000 { 152 pinctrl-names = "default"; 153 /* 154 * The Reference Clock 0 is used to provide a 155 * clock to the PHY 156 */ 157 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; 158 status = "okay"; 159 phy = <&phy0>; 160 phy-mode = "rgmii-id"; 161 }; 162 163 164 mdio@72004 { 165 pinctrl-names = "default"; 166 pinctrl-0 = <&mdio_pins>; 167 168 phy0: ethernet-phy@1 { 169 reg = <1>; 170 }; 171 172 phy1: ethernet-phy@0 { 173 reg = <0>; 174 }; 175 }; 176 177 sata@a8000 { 178 pinctrl-names = "default"; 179 pinctrl-0 = <&sata0_pins>, <&sata1_pins>; 180 status = "okay"; 181 #address-cells = <1>; 182 #size-cells = <0>; 183 184 sata0: sata-port@0 { 185 reg = <0>; 186 target-supply = <®_5v_sata0>; 187 }; 188 189 sata1: sata-port@1 { 190 reg = <1>; 191 target-supply = <®_5v_sata1>; 192 }; 193 }; 194 195 sata@e0000 { 196 pinctrl-names = "default"; 197 pinctrl-0 = <&sata2_pins>, <&sata3_pins>; 198 status = "okay"; 199 #address-cells = <1>; 200 #size-cells = <0>; 201 202 sata2: sata-port@0 { 203 reg = <0>; 204 target-supply = <®_5v_sata2>; 205 }; 206 207 sata3: sata-port@1 { 208 reg = <1>; 209 target-supply = <®_5v_sata3>; 210 }; 211 }; 212 213 sdhci@d8000 { 214 pinctrl-names = "default"; 215 pinctrl-0 = <&sdhci_pins>; 216 cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; 217 no-1-8-v; 218 wp-inverted; 219 bus-width = <8>; 220 status = "okay"; 221 }; 222 223 /* CON5 */ 224 usb3@f0000 { 225 vcc-supply = <®_usb2_1_vbus>; 226 status = "okay"; 227 }; 228 229 /* CON7 */ 230 usb3@f8000 { 231 vcc-supply = <®_usb3_vbus>; 232 status = "okay"; 233 }; 234 }; 235 236 gpio-fan { 237 compatible = "gpio-fan"; 238 gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; 239 gpio-fan,speed-map = < 0 0 240 3000 1>; 241 }; 242 }; 243 244 pci0: pcie@f1080000 { 245 status = "okay"; 246 }; 247 248 reg_usb3_vbus: usb3-vbus { 249 compatible = "regulator-fixed"; 250 regulator-name = "usb3-vbus"; 251 regulator-min-microvolt = <5000000>; 252 regulator-max-microvolt = <5000000>; 253 enable-active-high; 254 regulator-always-on; 255 gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; 256 }; 257 258 reg_usb2_0_vbus: v5-vbus0 { 259 compatible = "regulator-fixed"; 260 regulator-name = "v5.0-vbus0"; 261 regulator-min-microvolt = <5000000>; 262 regulator-max-microvolt = <5000000>; 263 enable-active-high; 264 regulator-always-on; 265 gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; 266 }; 267 268 reg_usb2_1_vbus: v5-vbus1 { 269 compatible = "regulator-fixed"; 270 regulator-name = "v5.0-vbus1"; 271 regulator-min-microvolt = <5000000>; 272 regulator-max-microvolt = <5000000>; 273 enable-active-high; 274 regulator-always-on; 275 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 276 }; 277 278 reg_usb2_1_vbus: v5-vbus1 { 279 compatible = "regulator-fixed"; 280 regulator-name = "v5.0-vbus1"; 281 regulator-min-microvolt = <5000000>; 282 regulator-max-microvolt = <5000000>; 283 enable-active-high; 284 regulator-always-on; 285 gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 286 }; 287 288 reg_sata0: pwr-sata0 { 289 compatible = "regulator-fixed"; 290 regulator-name = "pwr_en_sata0"; 291 enable-active-high; 292 regulator-always-on; 293 294 }; 295 296 reg_5v_sata0: v5-sata0 { 297 compatible = "regulator-fixed"; 298 regulator-name = "v5.0-sata0"; 299 regulator-min-microvolt = <5000000>; 300 regulator-max-microvolt = <5000000>; 301 regulator-always-on; 302 vin-supply = <®_sata0>; 303 }; 304 305 reg_12v_sata0: v12-sata0 { 306 compatible = "regulator-fixed"; 307 regulator-name = "v12.0-sata0"; 308 regulator-min-microvolt = <12000000>; 309 regulator-max-microvolt = <12000000>; 310 regulator-always-on; 311 vin-supply = <®_sata0>; 312 }; 313 314 reg_sata1: pwr-sata1 { 315 regulator-name = "pwr_en_sata1"; 316 compatible = "regulator-fixed"; 317 regulator-min-microvolt = <12000000>; 318 regulator-max-microvolt = <12000000>; 319 enable-active-high; 320 regulator-always-on; 321 gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; 322 }; 323 324 reg_5v_sata1: v5-sata1 { 325 compatible = "regulator-fixed"; 326 regulator-name = "v5.0-sata1"; 327 regulator-min-microvolt = <5000000>; 328 regulator-max-microvolt = <5000000>; 329 regulator-always-on; 330 vin-supply = <®_sata1>; 331 }; 332 333 reg_12v_sata1: v12-sata1 { 334 compatible = "regulator-fixed"; 335 regulator-name = "v12.0-sata1"; 336 regulator-min-microvolt = <12000000>; 337 regulator-max-microvolt = <12000000>; 338 regulator-always-on; 339 vin-supply = <®_sata1>; 340 }; 341 342 reg_sata2: pwr-sata2 { 343 compatible = "regulator-fixed"; 344 regulator-name = "pwr_en_sata2"; 345 enable-active-high; 346 regulator-always-on; 347 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; 348 }; 349 350 reg_5v_sata2: v5-sata2 { 351 compatible = "regulator-fixed"; 352 regulator-name = "v5.0-sata2"; 353 regulator-min-microvolt = <5000000>; 354 regulator-max-microvolt = <5000000>; 355 regulator-always-on; 356 vin-supply = <®_sata2>; 357 }; 358 359 reg_12v_sata2: v12-sata2 { 360 compatible = "regulator-fixed"; 361 regulator-name = "v12.0-sata2"; 362 regulator-min-microvolt = <12000000>; 363 regulator-max-microvolt = <12000000>; 364 regulator-always-on; 365 vin-supply = <®_sata2>; 366 }; 367 368 reg_sata3: pwr-sata3 { 369 compatible = "regulator-fixed"; 370 regulator-name = "pwr_en_sata3"; 371 enable-active-high; 372 regulator-always-on; 373 gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; 374 }; 375 376 reg_5v_sata3: v5-sata3 { 377 compatible = "regulator-fixed"; 378 regulator-name = "v5.0-sata3"; 379 regulator-min-microvolt = <5000000>; 380 regulator-max-microvolt = <5000000>; 381 regulator-always-on; 382 vin-supply = <®_sata3>; 383 }; 384 385 reg_12v_sata3: v12-sata3 { 386 compatible = "regulator-fixed"; 387 regulator-name = "v12.0-sata3"; 388 regulator-min-microvolt = <12000000>; 389 regulator-max-microvolt = <12000000>; 390 regulator-always-on; 391 vin-supply = <®_sata3>; 392 }; 393}; 394 395&pinctrl { 396 pca0_pins: pca0_pins { 397 marvell,pins = "mpp18"; 398 marvell,function = "gpio"; 399 }; 400}; 401