1294416Szbb/*
2294416Szbb * Device Tree file for Marvell Armada 385 development board
3294416Szbb * (RD-88F6820-GP)
4294416Szbb *
5294416Szbb * Copyright (C) 2014 Marvell
6294416Szbb *
7294416Szbb * Gregory CLEMENT <gregory.clement@free-electrons.com>
8294416Szbb *
9294416Szbb * This file is dual-licensed: you can use it either under the terms
10294416Szbb * of the GPL or the X11 license, at your option. Note that this dual
11294416Szbb * licensing only applies to this file, and not this project as a
12294416Szbb * whole.
13294416Szbb *
14294416Szbb *  a) This file is licensed under the terms of the GNU General Public
15294416Szbb *     License version 2.  This program is licensed "as is" without
16294416Szbb *     any warranty of any kind, whether express or implied.
17294416Szbb *
18294416Szbb * Or, alternatively,
19294416Szbb *
20294416Szbb *  b) Permission is hereby granted, free of charge, to any person
21294416Szbb *     obtaining a copy of this software and associated documentation
22294416Szbb *     files (the "Software"), to deal in the Software without
23294416Szbb *     restriction, including without limitation the rights to use,
24294416Szbb *     copy, modify, merge, publish, distribute, sublicense, and/or
25294416Szbb *     sell copies of the Software, and to permit persons to whom the
26294416Szbb *     Software is furnished to do so, subject to the following
27294416Szbb *     conditions:
28294416Szbb *
29294416Szbb *     The above copyright notice and this permission notice shall be
30294416Szbb *     included in all copies or substantial portions of the Software.
31294416Szbb *
32294416Szbb *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33294416Szbb *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34294416Szbb *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35294416Szbb *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36294416Szbb *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37294416Szbb *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38294416Szbb *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39294416Szbb *     OTHER DEALINGS IN THE SOFTWARE.
40294416Szbb *
41294416Szbb * $FreeBSD: releng/11.0/sys/boot/fdt/dts/arm/armada-388-gp.dts 301225 2016-06-02 18:41:33Z zbb $
42294416Szbb */
43294416Szbb
44294416Szbb/dts-v1/;
45294416Szbb#include "armada-388.dtsi"
46294416Szbb#include <dt-bindings/gpio/gpio.h>
47294416Szbb
48294416Szbb/ {
49294416Szbb	model = "Marvell Armada 385 GP";
50294416Szbb	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
51294416Szbb
52294416Szbb	chosen {
53294416Szbb		stdout-path = "serial0:115200n8";
54294416Szbb	};
55294416Szbb
56294416Szbb	memory {
57294416Szbb		device_type = "memory";
58294416Szbb		reg = <0x00000000 0x80000000>; /* 2 GB */
59294416Szbb	};
60294416Szbb
61294416Szbb	soc {
62301218Szbb		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
63294416Szbb
64294416Szbb		internal-regs {
65301225Szbb			crypto@90000 {
66301225Szbb				status = "okay";
67301225Szbb			};
68301225Szbb			crypto@92000 {
69301225Szbb				status = "okay";
70301225Szbb			};
71301225Szbb
72294416Szbb			spi@10600 {
73294416Szbb				pinctrl-names = "default";
74294416Szbb				pinctrl-0 = <&spi0_pins>;
75294416Szbb				status = "okay";
76294416Szbb
77294416Szbb				spi-flash@0 {
78294416Szbb					#address-cells = <1>;
79294416Szbb					#size-cells = <1>;
80294416Szbb					compatible = "st,m25p128", "jedec,spi-nor";
81294416Szbb					reg = <0>; /* Chip select 0 */
82294416Szbb					spi-max-frequency = <50000000>;
83294416Szbb					m25p,fast-read;
84294416Szbb				};
85294416Szbb			};
86294416Szbb
87294416Szbb			i2c@11000 {
88294416Szbb				pinctrl-names = "default";
89294416Szbb				pinctrl-0 = <&i2c0_pins>;
90294416Szbb				status = "okay";
91294416Szbb				clock-frequency = <100000>;
92294416Szbb				/*
93294416Szbb				 * The EEPROM located at adresse 54 is needed
94294416Szbb				 * for the boot - DO NOT ERASE IT -
95294416Szbb				 */
96294416Szbb
97294416Szbb				expander0: pca9555@20 {
98294416Szbb					compatible = "nxp,pca9555";
99294416Szbb					pinctrl-names = "default";
100294416Szbb					pinctrl-0 = <&pca0_pins>;
101294416Szbb					interrupt-parent = <&gpio0>;
102294416Szbb					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
103294416Szbb					gpio-controller;
104294416Szbb					#gpio-cells = <2>;
105294416Szbb					interrupt-controller;
106294416Szbb					#interrupt-cells = <2>;
107294416Szbb					reg = <0x20>;
108294416Szbb				};
109294416Szbb
110294416Szbb				expander1: pca9555@21 {
111294416Szbb					compatible = "nxp,pca9555";
112294416Szbb					pinctrl-names = "default";
113294416Szbb					interrupt-parent = <&gpio0>;
114294416Szbb					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
115294416Szbb					gpio-controller;
116294416Szbb					#gpio-cells = <2>;
117294416Szbb					interrupt-controller;
118294416Szbb					#interrupt-cells = <2>;
119294416Szbb					reg = <0x21>;
120294416Szbb				};
121294416Szbb
122294416Szbb			};
123294416Szbb
124294416Szbb			serial@12000 {
125294416Szbb				/*
126294416Szbb				 * Exported on the micro USB connector CON16
127294416Szbb				 * through an FTDI
128294416Szbb				 */
129294416Szbb
130294416Szbb				pinctrl-names = "default";
131294416Szbb				pinctrl-0 = <&uart0_pins>;
132294416Szbb				status = "okay";
133294416Szbb			};
134294416Szbb
135294416Szbb			/* GE1 CON15 */
136294416Szbb			ethernet@30000 {
137294416Szbb				pinctrl-names = "default";
138294416Szbb				pinctrl-0 = <&ge1_rgmii_pins>;
139294416Szbb				status = "okay";
140294416Szbb				phy = <&phy1>;
141294416Szbb				phy-mode = "rgmii-id";
142294416Szbb			};
143294416Szbb
144294416Szbb			/* CON4 */
145294416Szbb			usb@58000 {
146294416Szbb				vcc-supply = <&reg_usb2_0_vbus>;
147294416Szbb				status = "okay";
148294416Szbb			};
149294416Szbb
150294416Szbb			/* GE0 CON1 */
151294416Szbb			ethernet@70000 {
152294416Szbb				pinctrl-names = "default";
153294416Szbb				/*
154294416Szbb				 * The Reference Clock 0 is used to provide a
155294416Szbb				 * clock to the PHY
156294416Szbb				 */
157294416Szbb				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
158294416Szbb				status = "okay";
159294416Szbb				phy = <&phy0>;
160294416Szbb				phy-mode = "rgmii-id";
161294416Szbb			};
162294416Szbb
163294416Szbb
164294416Szbb			mdio@72004 {
165294416Szbb				pinctrl-names = "default";
166294416Szbb				pinctrl-0 = <&mdio_pins>;
167294416Szbb
168294416Szbb				phy0: ethernet-phy@1 {
169294416Szbb					reg = <1>;
170294416Szbb				};
171294416Szbb
172294416Szbb				phy1: ethernet-phy@0 {
173294416Szbb					reg = <0>;
174294416Szbb				};
175294416Szbb			};
176294416Szbb
177294416Szbb			sata@a8000 {
178294416Szbb				pinctrl-names = "default";
179294416Szbb				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
180294416Szbb				status = "okay";
181294416Szbb				#address-cells = <1>;
182294416Szbb				#size-cells = <0>;
183294416Szbb
184294416Szbb				sata0: sata-port@0 {
185294416Szbb					reg = <0>;
186294416Szbb					target-supply = <&reg_5v_sata0>;
187294416Szbb				};
188294416Szbb
189294416Szbb				sata1: sata-port@1 {
190294416Szbb					reg = <1>;
191294416Szbb					target-supply = <&reg_5v_sata1>;
192294416Szbb				};
193294416Szbb			};
194294416Szbb
195294416Szbb			sata@e0000 {
196294416Szbb				pinctrl-names = "default";
197294416Szbb				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
198294416Szbb				status = "okay";
199294416Szbb				#address-cells = <1>;
200294416Szbb				#size-cells = <0>;
201294416Szbb
202294416Szbb				sata2: sata-port@0 {
203294416Szbb					reg = <0>;
204294416Szbb					target-supply = <&reg_5v_sata2>;
205294416Szbb				};
206294416Szbb
207294416Szbb				sata3: sata-port@1 {
208294416Szbb					reg = <1>;
209294416Szbb					target-supply = <&reg_5v_sata3>;
210294416Szbb				};
211294416Szbb			};
212294416Szbb
213294416Szbb			sdhci@d8000 {
214294416Szbb				pinctrl-names = "default";
215294416Szbb				pinctrl-0 = <&sdhci_pins>;
216294416Szbb				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
217294416Szbb				no-1-8-v;
218294416Szbb				wp-inverted;
219294416Szbb				bus-width = <8>;
220294416Szbb				status = "okay";
221294416Szbb			};
222294416Szbb
223294416Szbb			/* CON5 */
224294416Szbb			usb3@f0000 {
225294416Szbb				vcc-supply = <&reg_usb2_1_vbus>;
226294416Szbb				status = "okay";
227294416Szbb			};
228294416Szbb
229294416Szbb			/* CON7 */
230294416Szbb			usb3@f8000 {
231294416Szbb				vcc-supply = <&reg_usb3_vbus>;
232294416Szbb				status = "okay";
233294416Szbb			};
234294416Szbb		};
235294416Szbb
236294416Szbb		gpio-fan {
237294416Szbb			compatible = "gpio-fan";
238294416Szbb			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
239294416Szbb			gpio-fan,speed-map = <	 0 0
240294416Szbb					      3000 1>;
241294416Szbb		};
242294416Szbb	};
243294416Szbb
244294432Szbb	pci0: pcie@f1080000 {
245294432Szbb		status = "okay";
246294432Szbb	};
247294432Szbb
248294416Szbb	reg_usb3_vbus: usb3-vbus {
249294416Szbb		compatible = "regulator-fixed";
250294416Szbb		regulator-name = "usb3-vbus";
251294416Szbb		regulator-min-microvolt = <5000000>;
252294416Szbb		regulator-max-microvolt = <5000000>;
253294416Szbb		enable-active-high;
254294416Szbb		regulator-always-on;
255294416Szbb		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
256294416Szbb	};
257294416Szbb
258294416Szbb	reg_usb2_0_vbus: v5-vbus0 {
259294416Szbb		compatible = "regulator-fixed";
260294416Szbb		regulator-name = "v5.0-vbus0";
261294416Szbb		regulator-min-microvolt = <5000000>;
262294416Szbb		regulator-max-microvolt = <5000000>;
263294416Szbb		enable-active-high;
264294416Szbb		regulator-always-on;
265294416Szbb		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
266294416Szbb	};
267294416Szbb
268294416Szbb	reg_usb2_1_vbus: v5-vbus1 {
269294416Szbb		compatible = "regulator-fixed";
270294416Szbb		regulator-name = "v5.0-vbus1";
271294416Szbb		regulator-min-microvolt = <5000000>;
272294416Szbb		regulator-max-microvolt = <5000000>;
273294416Szbb		enable-active-high;
274294416Szbb		regulator-always-on;
275294416Szbb		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
276294416Szbb	};
277294416Szbb
278294416Szbb	reg_usb2_1_vbus: v5-vbus1 {
279294416Szbb		compatible = "regulator-fixed";
280294416Szbb		regulator-name = "v5.0-vbus1";
281294416Szbb		regulator-min-microvolt = <5000000>;
282294416Szbb		regulator-max-microvolt = <5000000>;
283294416Szbb		enable-active-high;
284294416Szbb		regulator-always-on;
285294416Szbb		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
286294416Szbb	};
287294416Szbb
288294416Szbb	reg_sata0: pwr-sata0 {
289294416Szbb		compatible = "regulator-fixed";
290294416Szbb		regulator-name = "pwr_en_sata0";
291294416Szbb		enable-active-high;
292294416Szbb		regulator-always-on;
293294416Szbb
294294416Szbb	};
295294416Szbb
296294416Szbb	reg_5v_sata0: v5-sata0 {
297294416Szbb		compatible = "regulator-fixed";
298294416Szbb		regulator-name = "v5.0-sata0";
299294416Szbb		regulator-min-microvolt = <5000000>;
300294416Szbb		regulator-max-microvolt = <5000000>;
301294416Szbb		regulator-always-on;
302294416Szbb		vin-supply = <&reg_sata0>;
303294416Szbb	};
304294416Szbb
305294416Szbb	reg_12v_sata0: v12-sata0 {
306294416Szbb		compatible = "regulator-fixed";
307294416Szbb		regulator-name = "v12.0-sata0";
308294416Szbb		regulator-min-microvolt = <12000000>;
309294416Szbb		regulator-max-microvolt = <12000000>;
310294416Szbb		regulator-always-on;
311294416Szbb		vin-supply = <&reg_sata0>;
312294416Szbb	};
313294416Szbb
314294416Szbb	reg_sata1: pwr-sata1 {
315294416Szbb		regulator-name = "pwr_en_sata1";
316294416Szbb		compatible = "regulator-fixed";
317294416Szbb		regulator-min-microvolt = <12000000>;
318294416Szbb		regulator-max-microvolt = <12000000>;
319294416Szbb		enable-active-high;
320294416Szbb		regulator-always-on;
321294416Szbb		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
322294416Szbb	};
323294416Szbb
324294416Szbb	reg_5v_sata1: v5-sata1 {
325294416Szbb		compatible = "regulator-fixed";
326294416Szbb		regulator-name = "v5.0-sata1";
327294416Szbb		regulator-min-microvolt = <5000000>;
328294416Szbb		regulator-max-microvolt = <5000000>;
329294416Szbb		regulator-always-on;
330294416Szbb		vin-supply = <&reg_sata1>;
331294416Szbb	};
332294416Szbb
333294416Szbb	reg_12v_sata1: v12-sata1 {
334294416Szbb		compatible = "regulator-fixed";
335294416Szbb		regulator-name = "v12.0-sata1";
336294416Szbb		regulator-min-microvolt = <12000000>;
337294416Szbb		regulator-max-microvolt = <12000000>;
338294416Szbb		regulator-always-on;
339294416Szbb		vin-supply = <&reg_sata1>;
340294416Szbb	};
341294416Szbb
342294416Szbb	reg_sata2: pwr-sata2 {
343294416Szbb		compatible = "regulator-fixed";
344294416Szbb		regulator-name = "pwr_en_sata2";
345294416Szbb		enable-active-high;
346294416Szbb		regulator-always-on;
347294416Szbb		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
348294416Szbb	};
349294416Szbb
350294416Szbb	reg_5v_sata2: v5-sata2 {
351294416Szbb		compatible = "regulator-fixed";
352294416Szbb		regulator-name = "v5.0-sata2";
353294416Szbb		regulator-min-microvolt = <5000000>;
354294416Szbb		regulator-max-microvolt = <5000000>;
355294416Szbb		regulator-always-on;
356294416Szbb		vin-supply = <&reg_sata2>;
357294416Szbb	};
358294416Szbb
359294416Szbb	reg_12v_sata2: v12-sata2 {
360294416Szbb		compatible = "regulator-fixed";
361294416Szbb		regulator-name = "v12.0-sata2";
362294416Szbb		regulator-min-microvolt = <12000000>;
363294416Szbb		regulator-max-microvolt = <12000000>;
364294416Szbb		regulator-always-on;
365294416Szbb		vin-supply = <&reg_sata2>;
366294416Szbb	};
367294416Szbb
368294416Szbb	reg_sata3: pwr-sata3 {
369294416Szbb		compatible = "regulator-fixed";
370294416Szbb		regulator-name = "pwr_en_sata3";
371294416Szbb		enable-active-high;
372294416Szbb		regulator-always-on;
373294416Szbb		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
374294416Szbb	};
375294416Szbb
376294416Szbb	reg_5v_sata3: v5-sata3 {
377294416Szbb		compatible = "regulator-fixed";
378294416Szbb		regulator-name = "v5.0-sata3";
379294416Szbb		regulator-min-microvolt = <5000000>;
380294416Szbb		regulator-max-microvolt = <5000000>;
381294416Szbb		regulator-always-on;
382294416Szbb		vin-supply = <&reg_sata3>;
383294416Szbb	};
384294416Szbb
385294416Szbb	reg_12v_sata3: v12-sata3 {
386294416Szbb		compatible = "regulator-fixed";
387294416Szbb		regulator-name = "v12.0-sata3";
388294416Szbb		regulator-min-microvolt = <12000000>;
389294416Szbb		regulator-max-microvolt = <12000000>;
390294416Szbb		regulator-always-on;
391294416Szbb		vin-supply = <&reg_sata3>;
392294416Szbb	};
393294416Szbb};
394294416Szbb
395294416Szbb&pinctrl {
396294416Szbb	pca0_pins: pca0_pins {
397294416Szbb		marvell,pins = "mpp18";
398294416Szbb		marvell,function = "gpio";
399294416Szbb	};
400294416Szbb};
401