1/*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * $FreeBSD: releng/11.0/sys/boot/arm/at91/libat91/reset.c 161370 2006-08-16 23:39:58Z imp $ 25 */ 26 27#include "at91rm9200.h" 28#include "lib.h" 29 30/* 31 * void reset() 32 * 33 * Forces a reset of the system. Uses watchdog timer of '1', which 34 * corresponds to 128 / SLCK seconds (SLCK is 32,768 Hz, so 128/32768 is 35 * 1 / 256 ~= 5.4ms 36 */ 37void 38reset(void) 39{ 40 // The following should effect a reset. 41 AT91C_BASE_ST->ST_WDMR = 1 | AT91C_ST_RSTEN; 42 AT91C_BASE_ST->ST_CR = AT91C_ST_WDRST; 43} 44 45/* 46 * void start_wdog() 47 * 48 * Starts a watchdog timer. We force the boot process to get to the point 49 * it can kick the watch dog part of the ST part for the OS's driver. 50 */ 51void 52start_wdog(int n) 53{ 54 // The following should effect a reset after N seconds. 55 AT91C_BASE_ST->ST_WDMR = (n * (32768 / 128)) | AT91C_ST_RSTEN; 56 AT91C_BASE_ST->ST_CR = AT91C_ST_WDRST; 57} 58