1/*-
2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: releng/11.0/sys/arm/lpc/if_lpereg.h 258780 2013-11-30 22:17:27Z eadler $
27 */
28
29#ifndef	_ARM_LPC_IF_LPEREG_H
30#define	_ARM_LPC_IF_LPEREG_H
31
32#define	LPE_MAC1		0x000
33#define	LPE_MAC1_RXENABLE	(1 << 0)
34#define	LPE_MAC1_PASSALL	(1 << 1)
35#define	LPE_MAC1_RXFLOWCTRL	(1 << 2)
36#define	LPE_MAC1_TXFLOWCTRL	(1 << 3)
37#define	LPE_MAC1_LOOPBACK	(1 << 4)
38#define	LPE_MAC1_RESETTX	(1 << 8)
39#define	LPE_MAC1_RESETMCSTX	(1 << 9)
40#define	LPE_MAC1_RESETRX	(1 << 10)
41#define	LPE_MAC1_RESETMCSRX	(1 << 11)
42#define	LPE_MAC1_SIMRESET	(1 << 14)
43#define	LPE_MAC1_SOFTRESET	(1 << 15)
44#define	LPE_MAC2		0x004
45#define	LPE_MAC2_FULLDUPLEX	(1 << 0)
46#define	LPE_MAC2_FRAMELENCHECK	(1 << 1)
47#define	LPE_MAC2_HUGEFRAME	(1 << 2)
48#define	LPE_MAC2_DELAYEDCRC	(1 << 3)
49#define	LPE_MAC2_CRCENABLE	(1 << 4)
50#define	LPE_MAC2_PADCRCENABLE	(1 << 5)
51#define	LPE_MAC2_VLANPADENABLE	(1 << 6)
52#define	LPE_MAC2_AUTOPADENABLE	(1 << 7)
53#define	LPE_MAC2_PUREPREAMBLE	(1 << 8)
54#define	LPE_MAC2_LONGPREAMBLE	(1 << 9)
55#define	LPE_MAC2_NOBACKOFF	(1 << 12)
56#define	LPE_MAC2_BACKPRESSURE	(1 << 13)
57#define	LPE_MAC2_EXCESSDEFER	(1 << 14)
58#define	LPE_IPGT		0x008
59#define	LPE_IPGR		0x00c
60#define	LPE_CLRT		0x010
61#define	LPE_MAXF		0x014
62#define	LPE_SUPP		0x018
63#define	LPE_SUPP_SPEED		(1 << 8)
64#define	LPE_TEST		0x01c
65#define	LPE_MCFG		0x020
66#define	LPE_MCFG_SCANINCR	(1 << 0)
67#define	LPE_MCFG_SUPPREAMBLE	(1 << 1)
68#define	LPE_MCFG_CLKSEL(_n)	((_n & 0x7) << 2)
69#define	LPC_MCFG_RESETMII	(1 << 15)
70#define	LPE_MCMD		0x024
71#define	LPE_MCMD_READ		(1 << 0)
72#define	LPE_MCMD_WRITE		(0 << 0)
73#define	LPE_MCMD_SCAN		(1 << 1)
74#define	LPE_MADR		0x028
75#define	LPE_MADR_REGMASK	0x1f
76#define	LPE_MADR_REGSHIFT	0
77#define	LPE_MADR_PHYMASK	0x1f
78#define	LPE_MADR_PHYSHIFT	8
79#define	LPE_MWTD		0x02c
80#define	LPE_MWTD_DATAMASK	0xffff
81#define	LPE_MRDD		0x030
82#define	LPE_MRDD_DATAMASK	0xffff
83#define	LPE_MIND		0x034
84#define	LPE_MIND_BUSY		(1 << 0)
85#define	LPE_MIND_SCANNING	(1 << 1)
86#define	LPE_MIND_INVALID	(1 << 2)
87#define	LPE_MIND_MIIFAIL	(1 << 3)
88#define	LPE_SA0			0x040
89#define	LPE_SA1			0x044
90#define	LPE_SA2			0x048
91#define	LPE_COMMAND		0x100
92#define	LPE_COMMAND_RXENABLE	(1 << 0)
93#define	LPE_COMMAND_TXENABLE	(1 << 1)
94#define	LPE_COMMAND_REGRESET	(1 << 3)
95#define	LPE_COMMAND_TXRESET	(1 << 4)
96#define	LPE_COMMAND_RXRESET	(1 << 5)
97#define	LPE_COMMAND_PASSRUNTFRAME	(1 << 6)
98#define	LPE_COMMAND_PASSRXFILTER	(1 << 7)
99#define	LPE_COMMAND_TXFLOWCTL		(1 << 8)
100#define	LPE_COMMAND_RMII		(1 << 9)
101#define	LPE_COMMAND_FULLDUPLEX		(1 << 10)
102#define	LPE_STATUS		0x104
103#define	LPE_STATUS_RXACTIVE		(1 << 0)
104#define	LPE_STATUS_TXACTIVE		(1 << 1)
105#define	LPE_RXDESC		0x108
106#define	LPE_RXSTATUS		0x10c
107#define	LPE_RXDESC_NUMBER	0x110
108#define	LPE_RXDESC_PROD		0x114
109#define	LPE_RXDESC_CONS		0x118
110#define	LPE_TXDESC		0x11c
111#define	LPE_TXSTATUS		0x120
112#define	LPE_TXDESC_NUMBER	0x124
113#define	LPE_TXDESC_PROD		0x128
114#define	LPE_TXDESC_CONS		0x12c
115#define	LPE_TSV0		0x158
116#define	LPE_TSV1		0x15c
117#define	LPE_RSV			0x160
118#define	LPE_FLOWCONTROL_COUNTER	0x170
119#define	LPE_FLOWCONTROL_STATUS	0x174
120#define	LPE_RXFILTER_CTRL	0x200
121#define	LPE_RXFILTER_UNICAST	(1 << 0)
122#define	LPE_RXFILTER_BROADCAST	(1 << 1)
123#define LPE_RXFILTER_MULTICAST	(1 << 2)
124#define	LPE_RXFILTER_UNIHASH	(1 << 3)
125#define	LPE_RXFILTER_MULTIHASH	(1 << 4)
126#define	LPE_RXFILTER_PERFECT	(1 << 5)
127#define	LPE_RXFILTER_WOL	(1 << 12)
128#define	LPE_RXFILTER_FILTWOL	(1 << 13)
129#define	LPE_RXFILTER_WOL_STATUS	0x204
130#define	LPE_RXFILTER_WOL_CLEAR	0x208
131#define	LPE_HASHFILTER_L	0x210
132#define	LPE_HASHFILTER_H	0x214
133#define	LPE_INTSTATUS		0xfe0
134#define	LPE_INTENABLE		0xfe4
135#define	LPE_INTCLEAR		0xfe8
136#define	LPE_INTSET		0xfec
137#define	LPE_INT_RXOVERRUN	(1 << 0)
138#define	LPE_INT_RXERROR		(1 << 1)
139#define	LPE_INT_RXFINISH	(1 << 2)
140#define	LPE_INT_RXDONE		(1 << 3)
141#define	LPE_INT_TXUNDERRUN	(1 << 4)
142#define	LPE_INT_TXERROR		(1 << 5)
143#define	LPE_INT_TXFINISH	(1 << 6)
144#define	LPE_INT_TXDONE		(1 << 7)
145#define	LPE_INT_SOFTINT		(1 << 12)
146#define	LPE_INTWAKEUPINT	(1 << 13)
147#define	LPE_POWERDOWN		0xff4
148
149#define	LPE_DESC_ALIGN		8
150#define	LPE_TXDESC_NUM		128
151#define	LPE_RXDESC_NUM		128
152#define	LPE_TXDESC_SIZE		(LPE_TXDESC_NUM * sizeof(struct lpe_hwdesc))
153#define	LPE_RXDESC_SIZE		(LPE_RXDESC_NUM * sizeof(struct lpe_hwdesc))
154#define	LPE_TXSTATUS_SIZE	(LPE_TXDESC_NUM * sizeof(struct lpe_hwstatus))
155#define	LPE_RXSTATUS_SIZE	(LPE_RXDESC_NUM * sizeof(struct lpe_hwstatus))
156#define	LPE_MAXFRAGS		8
157
158struct lpe_hwdesc {
159	uint32_t	lhr_data;
160	uint32_t	lhr_control;
161};
162
163struct lpe_hwstatus {
164	uint32_t	lhs_info;
165	uint32_t	lhs_crc;
166};
167
168#define	LPE_INC(x, y)		(x) = ((x) == ((y)-1)) ? 0 : (x)+1
169
170/* These are valid for both Rx and Tx descriptors */
171#define	LPE_HWDESC_SIZE_MASK	(1 << 10)
172#define	LPE_HWDESC_INTERRUPT	(1U << 31)
173
174/* These are valid for Tx descriptors */
175#define	LPE_HWDESC_LAST		(1 << 30)
176#define	LPE_HWDESC_CRC		(1 << 29)
177#define	LPE_HWDESC_PAD		(1 << 28)
178#define	LPE_HWDESC_HUGE		(1 << 27)
179#define	LPE_HWDESC_OVERRIDE	(1 << 26)
180
181/* These are valid for Tx status descriptors */
182#define	LPE_HWDESC_COLLISIONS(_n) (((_n) >> 21) & 0x7)
183#define	LPE_HWDESC_DEFER	(1 << 25)
184#define	LPE_HWDESC_EXCDEFER	(1 << 26)
185#define	LPE_HWDESC_EXCCOLL	(1 << 27)
186#define	LPE_HWDESC_LATECOLL	(1 << 28)
187#define	LPE_HWDESC_UNDERRUN	(1 << 29)
188#define	LPE_HWDESC_TXNODESCR	(1 << 30)
189#define	LPE_HWDESC_ERROR	(1U << 31)
190
191/* These are valid for Rx status descriptors */
192#define	LPE_HWDESC_CONTROL	(1 << 18)
193#define	LPE_HWDESC_VLAN		(1 << 19)
194#define	LPE_HWDESC_FAILFILTER	(1 << 20)
195#define	LPE_HWDESC_MULTICAST	(1 << 21)
196#define	LPE_HWDESC_BROADCAST	(1 << 22)
197#define	LPE_HWDESC_CRCERROR	(1 << 23)
198#define	LPE_HWDESC_SYMBOLERROR	(1 << 24)
199#define	LPE_HWDESC_LENGTHERROR	(1 << 25)
200#define	LPE_HWDESC_RANGEERROR	(1 << 26)
201#define	LPE_HWDESC_ALIGNERROR	(1 << 27)
202#define	LPE_HWDESC_OVERRUN	(1 << 28)
203#define	LPE_HWDESC_RXNODESCR	(1 << 29)
204#define	LPE_HWDESC_LASTFLAG	(1 << 30)
205#define	LPE_HWDESC_ERROR	(1U << 31)
206
207
208#endif	/* _ARM_LPC_IF_LPEREG_H */
209