1/*-
2 * Copyright (c) 2005-2008 Olivier Houchard.  All rights reserved.
3 * Copyright (c) 2005-2008 Warner Losh.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: releng/11.0/sys/arm/at91/board_hl201.c 260886 2014-01-19 17:59:34Z imp $");
29#include <sys/param.h>
30#include <sys/systm.h>
31
32#include <machine/board.h>
33#include <arm/at91/at91board.h>
34#include <arm/at91/at91sam9g20reg.h>
35#include <arm/at91/at91_piovar.h>
36#include <arm/at91/at91_pio_sam9g20.h>
37#include <arm/at91/at91_smc.h>
38#include <arm/at91/at91_gpio.h>
39#include <dev/nand/nfc_at91.h>
40
41static struct at91_smc_init nand_smc = {
42	.ncs_rd_setup		= 0,
43	.nrd_setup		= 2,
44	.ncs_wr_setup		= 0,
45	.nwe_setup		= 2,
46
47	.ncs_rd_pulse		= 4,
48	.nrd_pulse		= 4,
49	.ncs_wr_pulse		= 4,
50	.nwe_pulse		= 4,
51
52	.nrd_cycle		= 7,
53	.nwe_cycle		= 7,
54
55	.mode			= SMC_MODE_READ | SMC_MODE_WRITE | SMC_MODE_EXNW_DISABLED,
56	.tdf_cycles		= 3,
57};
58
59static struct at91_nand_params nand_param = {
60	.ale			= 1u << 21,
61	.cle			= 1u << 22,
62	.width			= 8,
63	.rnb_pin		= AT91_PIN_PC13,	/* Note: These pins not confirmed */
64	.nce_pin		= AT91_PIN_PC14,
65	.cs			= 3,
66};
67
68BOARD_INIT long
69board_init(void)
70{
71	/* Setup Ethernet Pins */
72	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, 1<<7, 0);
73
74	at91_pio_gpio_input(AT91SAM9G20_PIOA_BASE, 1<<7);
75	at91_pio_gpio_set_deglitch(AT91SAM9G20_PIOA_BASE, 1<<7, 1);
76
77	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA19, 0);	/* ETXCK_EREFCK */
78	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA17, 0);	/* ERXDV */
79	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA14, 0);	/* ERX0 */
80	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA15, 0);	/* ERX1 */
81	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA18, 0);	/* ERXER */
82	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA16, 0);	/* ETXEN */
83	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA12, 0);	/* ETX0 */
84	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA13, 0);	/* ETX1 */
85	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA21, 0);	/* EMDIO */
86	at91_pio_use_periph_a(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA20, 0);	/* EMDC */
87
88	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA28, 0);	/* ECRS */
89	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA29, 0);	/* ECOL */
90	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA25, 0);	/* ERX2 */
91	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA26, 0);	/* ERX3 */
92	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA27, 0);	/* ERXCK */
93	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA23, 0);	/* ETX2 */
94	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA24, 0);	/* ETX3 */
95	at91_pio_use_periph_b(AT91SAM9G20_PIOA_BASE, AT91C_PIO_PA22, 0);	/* ETXER */
96
97	/* Setup Static Memory Controller */
98	at91_smc_setup(0, 3, &nand_smc);
99	at91_enable_nand(&nand_param);
100
101	/*
102	 * This assumes
103	 *  - RNB is on pin PC13
104	 *  - CE is on pin PC14
105	 *
106	 * Nothing actually uses RNB right now.
107	 *
108	 * For CE, this currently asserts it during board setup and leaves it
109	 * that way forever.
110	 *
111	 * All this can go away when the gpio pin-renumbering happens...
112	 */
113	at91_pio_use_gpio(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13 | AT91C_PIO_PC14);
114	at91_pio_gpio_input(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC13);	/* RNB */
115	at91_pio_gpio_output(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14, 0);	/* nCS */
116	at91_pio_gpio_clear(AT91SAM9G20_PIOC_BASE, AT91C_PIO_PC14);	/* Assert nCS */
117
118	return (at91_ramsize());
119}
120
121ARM_BOARD(NONE, "HOTe 201");
122