1/*- 2 * Copyright 2013-2015 John Wehle <john@feith.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: releng/11.0/sys/arm/amlogic/aml8726/aml8726_uart.h 282517 2015-05-06 01:07:59Z ganbold $ 27 */ 28 29#ifndef _ARM_AMLOGIC_AML8726_UART_H 30#define _ARM_AMLOGIC_AML8726_UART_H 31 32#define AML_UART_WFIFO_REG 0 33 34#define AML_UART_RFIFO_REG 4 35 36#define AML_UART_CONTROL_REG 8 37#define AML_UART_CONTROL_TX_INT_EN (1 << 28) 38#define AML_UART_CONTROL_RX_INT_EN (1 << 27) 39#define AML_UART_CONTROL_CLR_ERR (1 << 24) 40#define AML_UART_CONTROL_RX_RST (1 << 23) 41#define AML_UART_CONTROL_TX_RST (1 << 22) 42#define AML_UART_CONTROL_DB_MASK (3 << 20) 43#define AML_UART_CONTROL_8_DB (0 << 20) 44#define AML_UART_CONTROL_7_DB (1 << 20) 45#define AML_UART_CONTROL_6_DB (2 << 20) 46#define AML_UART_CONTROL_5_DB (3 << 20) 47#define AML_UART_CONTROL_P_MASK (3 << 18) 48#define AML_UART_CONTROL_P_EN (1 << 19) 49#define AML_UART_CONTROL_P_EVEN (0 << 18) 50#define AML_UART_CONTROL_P_ODD (1 << 18) 51#define AML_UART_CONTROL_SB_MASK (3 << 16) 52#define AML_UART_CONTROL_1_SB (0 << 16) 53#define AML_UART_CONTROL_2_SB (1 << 16) 54#define AML_UART_CONTROL_TWO_WIRE_EN (1 << 15) 55#define AML_UART_CONTROL_RX_EN (1 << 13) 56#define AML_UART_CONTROL_TX_EN (1 << 12) 57#define AML_UART_CONTROL_BAUD_MASK 0xfff 58#define AML_UART_CONTROL_BAUD_WIDTH 12 59 60#define AML_UART_STATUS_REG 12 61#define AML_UART_STATUS_RECV_BUSY (1 << 26) 62#define AML_UART_STATUS_XMIT_BUSY (1 << 25) 63#define AML_UART_STATUS_RX_FIFO_OVERFLOW (1 << 24) 64#define AML_UART_STATUS_TX_FIFO_EMPTY (1 << 22) 65#define AML_UART_STATUS_TX_FIFO_FULL (1 << 21) 66#define AML_UART_STATUS_RX_FIFO_EMPTY (1 << 20) 67#define AML_UART_STATUS_RX_FIFO_FULL (1 << 19) 68#define AML_UART_STATUS_TX_FIFO_WRITE_ERR (1 << 18) 69#define AML_UART_STATUS_FRAME_ERR (1 << 17) 70#define AML_UART_STATUS_PARITY_ERR (1 << 16) 71#define AML_UART_STATUS_TX_FIFO_CNT_MASK (0x7f << 8) 72#define AML_UART_STATUS_TX_FIFO_CNT_SHIFT 8 73#define AML_UART_STATUS_RX_FIFO_CNT_MASK (0x7f << 0) 74#define AML_UART_STATUS_RX_FIFO_CNT_SHIFT 0 75 76#define AML_UART_MISC_REG 16 77#define AML_UART_MISC_OLD_RX_BAUD (1 << 30) 78#define AML_UART_MISC_BAUD_EXT_MASK (0xf << 20) 79#define AML_UART_MISC_BAUD_EXT_SHIFT 20 80 81/* 82 * The documentation appears to be incorrect as the 83 * IRQ is actually generated when TX FIFO count is 84 * * equal to * or less than the selected threshold. 85 */ 86#define AML_UART_MISC_XMIT_IRQ_CNT_MASK (0xff << 8) 87#define AML_UART_MISC_XMIT_IRQ_CNT_SHIFT 8 88 89/* 90 * The documentation appears to be incorrect as the 91 * IRQ is actually generated when RX FIFO count is 92 * * equal to * or greater than the selected threshold. 93 */ 94#define AML_UART_MISC_RECV_IRQ_CNT_MASK 0xff 95#define AML_UART_MISC_RECV_IRQ_CNT_SHIFT 0 96 97/* 98 * The new baud rate register is available on the 99 * aml8726-m6 and later. 100 */ 101#define AML_UART_NEW_BAUD_REG 20 102#define AML_UART_NEW_BAUD_USE_XTAL_CLK (1 << 24) 103#define AML_UART_NEW_BAUD_RATE_EN (1 << 23) 104#define AML_UART_NEW_BAUD_RATE_MASK (0x7fffff << 0) 105#define AML_UART_NEW_BAUD_RATE_SHIFT 0 106 107#endif /* _ARM_AMLOGIC_AML8726_UART_H */ 108