a10_ehci.c revision 299113 
1/*-
2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/*
28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: head/sys/arm/allwinner/a10_ehci.c 299113 2016-05-05 09:41:57Z jmcneill $");
33
34#include "opt_bus.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/bus.h>
39#include <sys/rman.h>
40#include <sys/condvar.h>
41#include <sys/kernel.h>
42#include <sys/module.h>
43
44#include <machine/bus.h>
45#include <dev/ofw/ofw_bus.h>
46#include <dev/ofw/ofw_bus_subr.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50
51#include <dev/usb/usb_core.h>
52#include <dev/usb/usb_busdma.h>
53#include <dev/usb/usb_process.h>
54#include <dev/usb/usb_util.h>
55
56#include <dev/usb/usb_controller.h>
57#include <dev/usb/usb_bus.h>
58#include <dev/usb/controller/ehci.h>
59#include <dev/usb/controller/ehcireg.h>
60
61#include <arm/allwinner/allwinner_machdep.h>
62#include <dev/extres/clk/clk.h>
63#include <dev/extres/hwreset/hwreset.h>
64
65#define EHCI_HC_DEVSTR			"Allwinner Integrated USB 2.0 controller"
66
67#define SW_USB_PMU_IRQ_ENABLE		0x800
68
69#define SW_SDRAM_REG_HPCR_USB1		(0x250 + ((1 << 2) * 4))
70#define SW_SDRAM_REG_HPCR_USB2		(0x250 + ((1 << 2) * 5))
71#define SW_SDRAM_BP_HPCR_ACCESS		(1 << 0)
72
73#define SW_ULPI_BYPASS			(1 << 0)
74#define SW_AHB_INCRX_ALIGN		(1 << 8)
75#define SW_AHB_INCR4			(1 << 9)
76#define SW_AHB_INCR8			(1 << 10)
77
78#define	USB_CONF(d)			\
79	(void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
80
81#define A10_READ_4(sc, reg)		\
82	bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
83
84#define A10_WRITE_4(sc, reg, data)	\
85	bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
86
87static device_attach_t a10_ehci_attach;
88static device_detach_t a10_ehci_detach;
89
90bs_r_1_proto(reversed);
91bs_w_1_proto(reversed);
92
93struct aw_ehci_softc {
94	ehci_softc_t	sc;
95	clk_t		clk;
96	hwreset_t	rst;
97};
98
99struct aw_ehci_conf {
100	bool		sdram_init;
101};
102
103static const struct aw_ehci_conf a10_ehci_conf = {
104	.sdram_init = true,
105};
106
107static const struct aw_ehci_conf a31_ehci_conf = {
108	.sdram_init = false,
109};
110
111static struct ofw_compat_data compat_data[] = {
112	{ "allwinner,sun4i-a10-ehci",	(uintptr_t)&a10_ehci_conf },
113	{ "allwinner,sun6i-a31-ehci",	(uintptr_t)&a31_ehci_conf },
114	{ "allwinner,sun7i-a20-ehci",	(uintptr_t)&a10_ehci_conf },
115	{ "allwinner,sun8i-a83t-ehci",	(uintptr_t)&a31_ehci_conf },
116	{ NULL,				(uintptr_t)NULL }
117};
118
119static int
120a10_ehci_probe(device_t self)
121{
122
123	if (!ofw_bus_status_okay(self))
124		return (ENXIO);
125
126	if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0)
127		return (ENXIO);
128
129	device_set_desc(self, EHCI_HC_DEVSTR);
130
131	return (BUS_PROBE_DEFAULT);
132}
133
134static int
135a10_ehci_attach(device_t self)
136{
137	struct aw_ehci_softc *aw_sc = device_get_softc(self);
138	ehci_softc_t *sc = &aw_sc->sc;
139	const struct aw_ehci_conf *conf;
140	bus_space_handle_t bsh;
141	int err;
142	int rid;
143	uint32_t reg_value = 0;
144
145	conf = USB_CONF(self);
146
147	/* initialise some bus fields */
148	sc->sc_bus.parent = self;
149	sc->sc_bus.devices = sc->sc_devices;
150	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
151	sc->sc_bus.dma_bits = 32;
152
153	/* get all DMA memory */
154	if (usb_bus_mem_alloc_all(&sc->sc_bus,
155	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
156		return (ENOMEM);
157	}
158
159	sc->sc_bus.usbrev = USB_REV_2_0;
160
161	rid = 0;
162	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
163	if (!sc->sc_io_res) {
164		device_printf(self, "Could not map memory\n");
165		goto error;
166	}
167
168	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
169	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
170	bsh = rman_get_bushandle(sc->sc_io_res);
171
172	sc->sc_io_size = rman_get_size(sc->sc_io_res);
173
174	if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00,
175	    sc->sc_io_size, &sc->sc_io_hdl) != 0)
176		panic("%s: unable to subregion USB host registers",
177		    device_get_name(self));
178
179	rid = 0;
180	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
181	    RF_SHAREABLE | RF_ACTIVE);
182	if (sc->sc_irq_res == NULL) {
183		device_printf(self, "Could not allocate irq\n");
184		goto error;
185	}
186	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
187	if (!sc->sc_bus.bdev) {
188		device_printf(self, "Could not add USB device\n");
189		goto error;
190	}
191	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
192	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
193
194	sprintf(sc->sc_vendor, "Allwinner");
195
196	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
197	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
198	if (err) {
199		device_printf(self, "Could not setup irq, %d\n", err);
200		sc->sc_intr_hdl = NULL;
201		goto error;
202	}
203
204	sc->sc_flags |= EHCI_SCFLG_DONTRESET;
205
206	/* De-assert reset */
207	if (hwreset_get_by_ofw_idx(self, 0, &aw_sc->rst) == 0) {
208		err = hwreset_deassert(aw_sc->rst);
209		if (err != 0) {
210			device_printf(self, "Could not de-assert reset\n");
211			goto error;
212		}
213	}
214
215	/* Enable clock for USB */
216	err = clk_get_by_ofw_index(self, 0, &aw_sc->clk);
217	if (err != 0) {
218		device_printf(self, "Could not get clock\n");
219		goto error;
220	}
221	err = clk_enable(aw_sc->clk);
222	if (err != 0) {
223		device_printf(self, "Could not enable clock\n");
224		goto error;
225	}
226
227	/* Enable passby */
228	reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
229	reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */
230	reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */
231	reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */
232	reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */
233	A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
234
235	/* Configure port */
236	if (conf->sdram_init) {
237		reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
238		reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
239		A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
240	}
241
242	err = ehci_init(sc);
243	if (!err) {
244		err = device_probe_and_attach(sc->sc_bus.bdev);
245	}
246	if (err) {
247		device_printf(self, "USB init failed err=%d\n", err);
248		goto error;
249	}
250	return (0);
251
252error:
253	if (aw_sc->clk)
254		clk_release(aw_sc->clk);
255	a10_ehci_detach(self);
256	return (ENXIO);
257}
258
259static int
260a10_ehci_detach(device_t self)
261{
262	struct aw_ehci_softc *aw_sc = device_get_softc(self);
263	ehci_softc_t *sc = &aw_sc->sc;
264	const struct aw_ehci_conf *conf;
265	device_t bdev;
266	int err;
267	uint32_t reg_value = 0;
268
269	conf = USB_CONF(self);
270
271	if (sc->sc_bus.bdev) {
272		bdev = sc->sc_bus.bdev;
273		device_detach(bdev);
274		device_delete_child(self, bdev);
275	}
276	/* during module unload there are lots of children leftover */
277	device_delete_children(self);
278
279	if (sc->sc_irq_res && sc->sc_intr_hdl) {
280		/*
281		 * only call ehci_detach() after ehci_init()
282		 */
283		ehci_detach(sc);
284
285		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
286
287		if (err)
288			/* XXX or should we panic? */
289			device_printf(self, "Could not tear down irq, %d\n",
290			    err);
291		sc->sc_intr_hdl = NULL;
292	}
293
294	if (sc->sc_irq_res) {
295		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
296		sc->sc_irq_res = NULL;
297	}
298	if (sc->sc_io_res) {
299		bus_release_resource(self, SYS_RES_MEMORY, 0,
300		    sc->sc_io_res);
301		sc->sc_io_res = NULL;
302	}
303	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
304
305	/* Disable configure port */
306	if (conf->sdram_init) {
307		reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
308		reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
309		A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
310	}
311
312	/* Disable passby */
313	reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
314	reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */
315	reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */
316	reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */
317	reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */
318	A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
319
320	/* Disable clock for USB */
321	clk_disable(aw_sc->clk);
322	clk_release(aw_sc->clk);
323
324	/* Assert reset */
325	if (aw_sc->rst != NULL) {
326		hwreset_assert(aw_sc->rst);
327		hwreset_release(aw_sc->rst);
328	}
329
330	return (0);
331}
332
333static device_method_t ehci_methods[] = {
334	/* Device interface */
335	DEVMETHOD(device_probe, a10_ehci_probe),
336	DEVMETHOD(device_attach, a10_ehci_attach),
337	DEVMETHOD(device_detach, a10_ehci_detach),
338	DEVMETHOD(device_suspend, bus_generic_suspend),
339	DEVMETHOD(device_resume, bus_generic_resume),
340	DEVMETHOD(device_shutdown, bus_generic_shutdown),
341
342	DEVMETHOD_END
343};
344
345static driver_t ehci_driver = {
346	.name = "ehci",
347	.methods = ehci_methods,
348	.size = sizeof(ehci_softc_t),
349};
350
351static devclass_t ehci_devclass;
352
353DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
354MODULE_DEPEND(ehci, usb, 1, 1, 1);
355