a10_ehci.c revision 296408
1/*- 2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: head/sys/arm/allwinner/a10_ehci.c 296408 2016-03-05 13:17:53Z andrew $"); 33 34#include "opt_bus.h" 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/bus.h> 39#include <sys/rman.h> 40#include <sys/condvar.h> 41#include <sys/kernel.h> 42#include <sys/module.h> 43 44#include <machine/bus.h> 45#include <dev/ofw/ofw_bus.h> 46#include <dev/ofw/ofw_bus_subr.h> 47 48#include <dev/usb/usb.h> 49#include <dev/usb/usbdi.h> 50 51#include <dev/usb/usb_core.h> 52#include <dev/usb/usb_busdma.h> 53#include <dev/usb/usb_process.h> 54#include <dev/usb/usb_util.h> 55 56#include <dev/usb/usb_controller.h> 57#include <dev/usb/usb_bus.h> 58#include <dev/usb/controller/ehci.h> 59#include <dev/usb/controller/ehcireg.h> 60 61#include <arm/allwinner/allwinner_machdep.h> 62#include <arm/allwinner/a10_clk.h> 63#include <arm/allwinner/a31/a31_clk.h> 64 65#define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller" 66 67#define SW_USB_PMU_IRQ_ENABLE 0x800 68 69#define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4)) 70#define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5)) 71#define SW_SDRAM_BP_HPCR_ACCESS (1 << 0) 72 73#define SW_ULPI_BYPASS (1 << 0) 74#define SW_AHB_INCRX_ALIGN (1 << 8) 75#define SW_AHB_INCR4 (1 << 9) 76#define SW_AHB_INCR8 (1 << 10) 77 78#define USB_CONF(d) \ 79 (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data 80 81#define A10_READ_4(sc, reg) \ 82 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg) 83 84#define A10_WRITE_4(sc, reg, data) \ 85 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data) 86 87static device_attach_t a10_ehci_attach; 88static device_detach_t a10_ehci_detach; 89 90bs_r_1_proto(reversed); 91bs_w_1_proto(reversed); 92 93struct aw_ehci_conf { 94 int (*clk_activate)(void); 95 int (*clk_deactivate)(void); 96 bool sdram_init; 97}; 98 99static const struct aw_ehci_conf a10_ehci_conf = { 100#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20) 101 .clk_activate = a10_clk_ehci_activate, 102 .clk_deactivate = a10_clk_ehci_deactivate, 103#endif 104 .sdram_init = true, 105}; 106 107static const struct aw_ehci_conf a31_ehci_conf = { 108#if defined(SOC_ALLWINNER_A31) || defined(SOC_ALLWINNER_A31S) 109 .clk_activate = a31_clk_ehci_activate, 110 .clk_deactivate = a31_clk_ehci_deactivate, 111#endif 112}; 113 114static struct ofw_compat_data compat_data[] = { 115 { "allwinner,sun4i-a10-ehci", (uintptr_t)&a10_ehci_conf }, 116 { "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf }, 117 { "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf }, 118 { NULL, (uintptr_t)NULL } 119}; 120 121static int 122a10_ehci_probe(device_t self) 123{ 124 125 if (!ofw_bus_status_okay(self)) 126 return (ENXIO); 127 128 if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0) 129 return (ENXIO); 130 131 device_set_desc(self, EHCI_HC_DEVSTR); 132 133 return (BUS_PROBE_DEFAULT); 134} 135 136static int 137a10_ehci_attach(device_t self) 138{ 139 ehci_softc_t *sc = device_get_softc(self); 140 const struct aw_ehci_conf *conf; 141 bus_space_handle_t bsh; 142 int err; 143 int rid; 144 uint32_t reg_value = 0; 145 146 conf = USB_CONF(self); 147 if (conf->clk_activate == NULL) { 148 device_printf(self, "clock not supported\n"); 149 return (ENXIO); 150 } 151 152 /* initialise some bus fields */ 153 sc->sc_bus.parent = self; 154 sc->sc_bus.devices = sc->sc_devices; 155 sc->sc_bus.devices_max = EHCI_MAX_DEVICES; 156 sc->sc_bus.dma_bits = 32; 157 158 /* get all DMA memory */ 159 if (usb_bus_mem_alloc_all(&sc->sc_bus, 160 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) { 161 return (ENOMEM); 162 } 163 164 sc->sc_bus.usbrev = USB_REV_2_0; 165 166 rid = 0; 167 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 168 if (!sc->sc_io_res) { 169 device_printf(self, "Could not map memory\n"); 170 goto error; 171 } 172 173 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); 174 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); 175 bsh = rman_get_bushandle(sc->sc_io_res); 176 177 sc->sc_io_size = rman_get_size(sc->sc_io_res); 178 179 if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00, 180 sc->sc_io_size, &sc->sc_io_hdl) != 0) 181 panic("%s: unable to subregion USB host registers", 182 device_get_name(self)); 183 184 rid = 0; 185 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 186 RF_SHAREABLE | RF_ACTIVE); 187 if (sc->sc_irq_res == NULL) { 188 device_printf(self, "Could not allocate irq\n"); 189 goto error; 190 } 191 sc->sc_bus.bdev = device_add_child(self, "usbus", -1); 192 if (!sc->sc_bus.bdev) { 193 device_printf(self, "Could not add USB device\n"); 194 goto error; 195 } 196 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); 197 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR); 198 199 sprintf(sc->sc_vendor, "Allwinner"); 200 201 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, 202 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); 203 if (err) { 204 device_printf(self, "Could not setup irq, %d\n", err); 205 sc->sc_intr_hdl = NULL; 206 goto error; 207 } 208 209 sc->sc_flags |= EHCI_SCFLG_DONTRESET; 210 211 /* Enable clock for USB */ 212 if (conf->clk_activate() != 0) { 213 device_printf(self, "Could not activate clock\n"); 214 goto error; 215 } 216 217 /* Enable passby */ 218 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); 219 reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */ 220 reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */ 221 reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */ 222 reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */ 223 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); 224 225 /* Configure port */ 226 if (conf->sdram_init) { 227 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2); 228 reg_value |= SW_SDRAM_BP_HPCR_ACCESS; 229 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value); 230 } 231 232 err = ehci_init(sc); 233 if (!err) { 234 err = device_probe_and_attach(sc->sc_bus.bdev); 235 } 236 if (err) { 237 device_printf(self, "USB init failed err=%d\n", err); 238 goto error; 239 } 240 return (0); 241 242error: 243 a10_ehci_detach(self); 244 return (ENXIO); 245} 246 247static int 248a10_ehci_detach(device_t self) 249{ 250 ehci_softc_t *sc = device_get_softc(self); 251 const struct aw_ehci_conf *conf; 252 device_t bdev; 253 int err; 254 uint32_t reg_value = 0; 255 256 conf = USB_CONF(self); 257 258 if (sc->sc_bus.bdev) { 259 bdev = sc->sc_bus.bdev; 260 device_detach(bdev); 261 device_delete_child(self, bdev); 262 } 263 /* during module unload there are lots of children leftover */ 264 device_delete_children(self); 265 266 if (sc->sc_irq_res && sc->sc_intr_hdl) { 267 /* 268 * only call ehci_detach() after ehci_init() 269 */ 270 ehci_detach(sc); 271 272 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl); 273 274 if (err) 275 /* XXX or should we panic? */ 276 device_printf(self, "Could not tear down irq, %d\n", 277 err); 278 sc->sc_intr_hdl = NULL; 279 } 280 281 if (sc->sc_irq_res) { 282 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res); 283 sc->sc_irq_res = NULL; 284 } 285 if (sc->sc_io_res) { 286 bus_release_resource(self, SYS_RES_MEMORY, 0, 287 sc->sc_io_res); 288 sc->sc_io_res = NULL; 289 } 290 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc); 291 292 /* Disable configure port */ 293 if (conf->sdram_init) { 294 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2); 295 reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS; 296 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value); 297 } 298 299 /* Disable passby */ 300 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE); 301 reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */ 302 reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */ 303 reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */ 304 reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */ 305 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value); 306 307 /* Disable clock for USB */ 308 conf->clk_deactivate(); 309 310 return (0); 311} 312 313static device_method_t ehci_methods[] = { 314 /* Device interface */ 315 DEVMETHOD(device_probe, a10_ehci_probe), 316 DEVMETHOD(device_attach, a10_ehci_attach), 317 DEVMETHOD(device_detach, a10_ehci_detach), 318 DEVMETHOD(device_suspend, bus_generic_suspend), 319 DEVMETHOD(device_resume, bus_generic_resume), 320 DEVMETHOD(device_shutdown, bus_generic_shutdown), 321 322 DEVMETHOD_END 323}; 324 325static driver_t ehci_driver = { 326 .name = "ehci", 327 .methods = ehci_methods, 328 .size = sizeof(ehci_softc_t), 329}; 330 331static devclass_t ehci_devclass; 332 333DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); 334MODULE_DEPEND(ehci, usb, 1, 1, 1); 335