1/*- 2 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26#include <machine/asm.h> 27__FBSDID("$FreeBSD: releng/11.0/lib/libc/sparc64/fpu/fpu_reg.S 96129 2002-05-06 23:24:39Z obrien $"); 28 29/* 30 * Define arrays of leaf functions to load/store fp registers to memory. See 31 * fpu_reg.h for the definitions to use this from C code. The function sizes 32 * defines there must be kept in sync with this file! 33 */ 34 35.macro ld32 reg 36 retl 37 ld [%o0], %f\reg 38.endm 39 40.macro st32 reg 41 retl 42 st %f\reg, [%o0] 43.endm 44 45.macro ld64 reg 46 retl 47 ldd [%o0], %f\reg 48.endm 49 50.macro st64 reg 51 retl 52 std %f\reg, [%o0] 53.endm 54 55/* The actual function arrays. */ 56 .globl __fpu_ld32 57__fpu_ld32: 58 ld32 0 59 ld32 1 60 ld32 2 61 ld32 3 62 ld32 4 63 ld32 5 64 ld32 6 65 ld32 7 66 ld32 8 67 ld32 9 68 ld32 10 69 ld32 11 70 ld32 12 71 ld32 13 72 ld32 14 73 ld32 15 74 ld32 16 75 ld32 17 76 ld32 18 77 ld32 19 78 ld32 20 79 ld32 21 80 ld32 22 81 ld32 23 82 ld32 24 83 ld32 25 84 ld32 26 85 ld32 27 86 ld32 28 87 ld32 29 88 ld32 30 89 ld32 31 90 91 .globl __fpu_st32 92__fpu_st32: 93 st32 0 94 st32 1 95 st32 2 96 st32 3 97 st32 4 98 st32 5 99 st32 6 100 st32 7 101 st32 8 102 st32 9 103 st32 10 104 st32 11 105 st32 12 106 st32 13 107 st32 14 108 st32 15 109 st32 16 110 st32 17 111 st32 18 112 st32 19 113 st32 20 114 st32 21 115 st32 22 116 st32 23 117 st32 24 118 st32 25 119 st32 26 120 st32 27 121 st32 28 122 st32 29 123 st32 30 124 st32 31 125 126 .globl __fpu_ld64 127__fpu_ld64: 128 ld64 0 129 ld64 2 130 ld64 4 131 ld64 6 132 ld64 8 133 ld64 10 134 ld64 12 135 ld64 14 136 ld64 16 137 ld64 18 138 ld64 20 139 ld64 22 140 ld64 24 141 ld64 26 142 ld64 28 143 ld64 30 144 ld64 32 145 ld64 34 146 ld64 36 147 ld64 38 148 ld64 40 149 ld64 42 150 ld64 44 151 ld64 46 152 ld64 48 153 ld64 50 154 ld64 52 155 ld64 54 156 ld64 56 157 ld64 58 158 ld64 60 159 ld64 62 160 161 .globl __fpu_st64 162__fpu_st64: 163 st64 0 164 st64 2 165 st64 4 166 st64 6 167 st64 8 168 st64 10 169 st64 12 170 st64 14 171 st64 16 172 st64 18 173 st64 20 174 st64 22 175 st64 24 176 st64 26 177 st64 28 178 st64 30 179 st64 32 180 st64 34 181 st64 36 182 st64 38 183 st64 40 184 st64 42 185 st64 44 186 st64 46 187 st64 48 188 st64 50 189 st64 52 190 st64 54 191 st64 56 192 st64 58 193 st64 60 194 st64 62 195