X86TargetMachine.cpp revision 280031 
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86TargetMachine.h"
15#include "X86.h"
16#include "X86TargetObjectFile.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/IR/Function.h"
19#include "llvm/PassManager.h"
20#include "llvm/Support/CommandLine.h"
21#include "llvm/Support/FormattedStream.h"
22#include "llvm/Support/TargetRegistry.h"
23#include "llvm/Target/TargetOptions.h"
24using namespace llvm;
25
26extern "C" void LLVMInitializeX86Target() {
27  // Register the target.
28  RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
29  RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
30}
31
32static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
33  if (TT.isOSBinFormatMachO()) {
34    if (TT.getArch() == Triple::x86_64)
35      return make_unique<X86_64MachoTargetObjectFile>();
36    return make_unique<TargetLoweringObjectFileMachO>();
37  }
38
39  if (TT.isOSLinux())
40    return make_unique<X86LinuxTargetObjectFile>();
41  if (TT.isOSBinFormatELF())
42    return make_unique<TargetLoweringObjectFileELF>();
43  if (TT.isKnownWindowsMSVCEnvironment())
44    return make_unique<X86WindowsTargetObjectFile>();
45  if (TT.isOSBinFormatCOFF())
46    return make_unique<TargetLoweringObjectFileCOFF>();
47  llvm_unreachable("unknown subtarget type");
48}
49
50/// X86TargetMachine ctor - Create an X86 target.
51///
52X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,
53                                   StringRef FS, const TargetOptions &Options,
54                                   Reloc::Model RM, CodeModel::Model CM,
55                                   CodeGenOpt::Level OL)
56    : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
57      TLOF(createTLOF(Triple(getTargetTriple()))),
58      Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {
59  // default to hard float ABI
60  if (Options.FloatABIType == FloatABI::Default)
61    this->Options.FloatABIType = FloatABI::Hard;
62
63  // Windows stack unwinder gets confused when execution flow "falls through"
64  // after a call to 'noreturn' function.
65  // To prevent that, we emit a trap for 'unreachable' IR instructions.
66  // (which on X86, happens to be the 'ud2' instruction)
67  if (Subtarget.isTargetWin64())
68    this->Options.TrapUnreachable = true;
69
70  initAsmInfo();
71}
72
73X86TargetMachine::~X86TargetMachine() {}
74
75const X86Subtarget *
76X86TargetMachine::getSubtargetImpl(const Function &F) const {
77  AttributeSet FnAttrs = F.getAttributes();
78  Attribute CPUAttr =
79      FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
80  Attribute FSAttr =
81      FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
82
83  std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
84                        ? CPUAttr.getValueAsString().str()
85                        : TargetCPU;
86  std::string FS = !FSAttr.hasAttribute(Attribute::None)
87                       ? FSAttr.getValueAsString().str()
88                       : TargetFS;
89
90  // FIXME: This is related to the code below to reset the target options,
91  // we need to know whether or not the soft float flag is set on the
92  // function before we can generate a subtarget. We also need to use
93  // it as a key for the subtarget since that can be the only difference
94  // between two functions.
95  Attribute SFAttr =
96      FnAttrs.getAttribute(AttributeSet::FunctionIndex, "use-soft-float");
97  bool SoftFloat = !SFAttr.hasAttribute(Attribute::None)
98                       ? SFAttr.getValueAsString() == "true"
99                       : Options.UseSoftFloat;
100
101  auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true"
102                                               : "use-soft-float=false")];
103  if (!I) {
104    // This needs to be done before we create a new subtarget since any
105    // creation will depend on the TM and the code generation flags on the
106    // function that reside in TargetOptions.
107    resetTargetOptions(F);
108    I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
109                                        Options.StackAlignmentOverride);
110  }
111  return I.get();
112}
113
114//===----------------------------------------------------------------------===//
115// Command line options for x86
116//===----------------------------------------------------------------------===//
117static cl::opt<bool>
118UseVZeroUpper("x86-use-vzeroupper", cl::Hidden,
119  cl::desc("Minimize AVX to SSE transition penalty"),
120  cl::init(true));
121
122//===----------------------------------------------------------------------===//
123// X86 Analysis Pass Setup
124//===----------------------------------------------------------------------===//
125
126void X86TargetMachine::addAnalysisPasses(PassManagerBase &PM) {
127  // Add first the target-independent BasicTTI pass, then our X86 pass. This
128  // allows the X86 pass to delegate to the target independent layer when
129  // appropriate.
130  PM.add(createBasicTargetTransformInfoPass(this));
131  PM.add(createX86TargetTransformInfoPass(this));
132}
133
134
135//===----------------------------------------------------------------------===//
136// Pass Pipeline Configuration
137//===----------------------------------------------------------------------===//
138
139namespace {
140/// X86 Code Generator Pass Configuration Options.
141class X86PassConfig : public TargetPassConfig {
142public:
143  X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM)
144    : TargetPassConfig(TM, PM) {}
145
146  X86TargetMachine &getX86TargetMachine() const {
147    return getTM<X86TargetMachine>();
148  }
149
150  const X86Subtarget &getX86Subtarget() const {
151    return *getX86TargetMachine().getSubtargetImpl();
152  }
153
154  void addIRPasses() override;
155  bool addInstSelector() override;
156  bool addILPOpts() override;
157  void addPreRegAlloc() override;
158  void addPostRegAlloc() override;
159  void addPreEmitPass() override;
160};
161} // namespace
162
163TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) {
164  return new X86PassConfig(this, PM);
165}
166
167void X86PassConfig::addIRPasses() {
168  addPass(createAtomicExpandPass(&getX86TargetMachine()));
169
170  TargetPassConfig::addIRPasses();
171}
172
173bool X86PassConfig::addInstSelector() {
174  // Install an instruction selector.
175  addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel()));
176
177  // For ELF, cleanup any local-dynamic TLS accesses.
178  if (getX86Subtarget().isTargetELF() && getOptLevel() != CodeGenOpt::None)
179    addPass(createCleanupLocalDynamicTLSPass());
180
181  addPass(createX86GlobalBaseRegPass());
182
183  return false;
184}
185
186bool X86PassConfig::addILPOpts() {
187  addPass(&EarlyIfConverterID);
188  return true;
189}
190
191void X86PassConfig::addPreRegAlloc() {
192  addPass(createX86CallFrameOptimization());
193}
194
195void X86PassConfig::addPostRegAlloc() {
196  addPass(createX86FloatingPointStackifierPass());
197}
198
199void X86PassConfig::addPreEmitPass() {
200  if (getOptLevel() != CodeGenOpt::None && getX86Subtarget().hasSSE2())
201    addPass(createExecutionDependencyFixPass(&X86::VR128RegClass));
202
203  if (UseVZeroUpper)
204    addPass(createX86IssueVZeroUpperPass());
205
206  if (getOptLevel() != CodeGenOpt::None) {
207    addPass(createX86PadShortFunctions());
208    addPass(createX86FixupLEAs());
209  }
210}
211