X86TargetMachine.cpp revision 221345 
1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the X86 specific subclass of TargetMachine.
11//
12//===----------------------------------------------------------------------===//
13
14#include "X86MCAsmInfo.h"
15#include "X86TargetMachine.h"
16#include "X86.h"
17#include "llvm/PassManager.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/MC/MCCodeEmitter.h"
21#include "llvm/MC/MCStreamer.h"
22#include "llvm/Support/FormattedStream.h"
23#include "llvm/Target/TargetOptions.h"
24#include "llvm/Target/TargetRegistry.h"
25using namespace llvm;
26
27static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
28  Triple TheTriple(TT);
29
30  if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO) {
31    if (TheTriple.getArch() == Triple::x86_64)
32      return new X86_64MCAsmInfoDarwin(TheTriple);
33    else
34      return new X86MCAsmInfoDarwin(TheTriple);
35  }
36
37  if (TheTriple.isOSWindows())
38    return new X86MCAsmInfoCOFF(TheTriple);
39
40  return new X86ELFMCAsmInfo(TheTriple);
41}
42
43static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
44                                    MCContext &Ctx, TargetAsmBackend &TAB,
45                                    raw_ostream &_OS,
46                                    MCCodeEmitter *_Emitter,
47                                    bool RelaxAll,
48                                    bool NoExecStack) {
49  Triple TheTriple(TT);
50
51  if (TheTriple.isOSDarwin() || TheTriple.getEnvironment() == Triple::MachO)
52    return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
53
54  if (TheTriple.isOSWindows())
55    return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
56
57  return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll, NoExecStack);
58}
59
60extern "C" void LLVMInitializeX86Target() {
61  // Register the target.
62  RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
63  RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
64
65  // Register the target asm info.
66  RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
67  RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
68
69  // Register the code emitter.
70  TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
71                                      createX86_32MCCodeEmitter);
72  TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
73                                      createX86_64MCCodeEmitter);
74
75  // Register the asm backend.
76  TargetRegistry::RegisterAsmBackend(TheX86_32Target,
77                                     createX86_32AsmBackend);
78  TargetRegistry::RegisterAsmBackend(TheX86_64Target,
79                                     createX86_64AsmBackend);
80
81  // Register the object streamer.
82  TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
83                                         createMCStreamer);
84  TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
85                                         createMCStreamer);
86}
87
88
89X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
90                                         const std::string &FS)
91  : X86TargetMachine(T, TT, FS, false),
92    DataLayout(getSubtargetImpl()->isTargetDarwin() ?
93               "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
94               (getSubtargetImpl()->isTargetCygMing() ||
95                getSubtargetImpl()->isTargetWindows()) ?
96               "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-n8:16:32" :
97               "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-n8:16:32"),
98    InstrInfo(*this),
99    TSInfo(*this),
100    TLInfo(*this),
101    JITInfo(*this) {
102}
103
104
105X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
106                                         const std::string &FS)
107  : X86TargetMachine(T, TT, FS, true),
108    DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
109    InstrInfo(*this),
110    TSInfo(*this),
111    TLInfo(*this),
112    JITInfo(*this) {
113}
114
115/// X86TargetMachine ctor - Create an X86 target.
116///
117X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
118                                   const std::string &FS, bool is64Bit)
119  : LLVMTargetMachine(T, TT),
120    Subtarget(TT, FS, is64Bit),
121    FrameLowering(*this, Subtarget),
122    ELFWriterInfo(is64Bit, true) {
123  DefRelocModel = getRelocationModel();
124
125  // If no relocation model was picked, default as appropriate for the target.
126  if (getRelocationModel() == Reloc::Default) {
127    // Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
128    // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
129    // use static relocation model by default.
130    if (Subtarget.isTargetDarwin()) {
131      if (Subtarget.is64Bit())
132        setRelocationModel(Reloc::PIC_);
133      else
134        setRelocationModel(Reloc::DynamicNoPIC);
135    } else if (Subtarget.isTargetWin64())
136      setRelocationModel(Reloc::PIC_);
137    else
138      setRelocationModel(Reloc::Static);
139  }
140
141  assert(getRelocationModel() != Reloc::Default &&
142         "Relocation mode not picked");
143
144  // ELF and X86-64 don't have a distinct DynamicNoPIC model.  DynamicNoPIC
145  // is defined as a model for code which may be used in static or dynamic
146  // executables but not necessarily a shared library. On X86-32 we just
147  // compile in -static mode, in x86-64 we use PIC.
148  if (getRelocationModel() == Reloc::DynamicNoPIC) {
149    if (is64Bit)
150      setRelocationModel(Reloc::PIC_);
151    else if (!Subtarget.isTargetDarwin())
152      setRelocationModel(Reloc::Static);
153  }
154
155  // If we are on Darwin, disallow static relocation model in X86-64 mode, since
156  // the Mach-O file format doesn't support it.
157  if (getRelocationModel() == Reloc::Static &&
158      Subtarget.isTargetDarwin() &&
159      is64Bit)
160    setRelocationModel(Reloc::PIC_);
161
162  // Determine the PICStyle based on the target selected.
163  if (getRelocationModel() == Reloc::Static) {
164    // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
165    Subtarget.setPICStyle(PICStyles::None);
166  } else if (Subtarget.is64Bit()) {
167    // PIC in 64 bit mode is always rip-rel.
168    Subtarget.setPICStyle(PICStyles::RIPRel);
169  } else if (Subtarget.isTargetCygMing()) {
170    Subtarget.setPICStyle(PICStyles::None);
171  } else if (Subtarget.isTargetDarwin()) {
172    if (getRelocationModel() == Reloc::PIC_)
173      Subtarget.setPICStyle(PICStyles::StubPIC);
174    else {
175      assert(getRelocationModel() == Reloc::DynamicNoPIC);
176      Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
177    }
178  } else if (Subtarget.isTargetELF()) {
179    Subtarget.setPICStyle(PICStyles::GOT);
180  }
181
182  // Finally, if we have "none" as our PIC style, force to static mode.
183  if (Subtarget.getPICStyle() == PICStyles::None)
184    setRelocationModel(Reloc::Static);
185}
186
187//===----------------------------------------------------------------------===//
188// Pass Pipeline Configuration
189//===----------------------------------------------------------------------===//
190
191bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
192                                       CodeGenOpt::Level OptLevel) {
193  // Install an instruction selector.
194  PM.add(createX86ISelDag(*this, OptLevel));
195
196  // For 32-bit, prepend instructions to set the "global base reg" for PIC.
197  if (!Subtarget.is64Bit())
198    PM.add(createGlobalBaseRegPass());
199
200  return false;
201}
202
203bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
204                                      CodeGenOpt::Level OptLevel) {
205  PM.add(createX86MaxStackAlignmentHeuristicPass());
206  return false;  // -print-machineinstr shouldn't print after this.
207}
208
209bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
210                                       CodeGenOpt::Level OptLevel) {
211  PM.add(createX86FloatingPointStackifierPass());
212  return true;  // -print-machineinstr should print after this.
213}
214
215bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
216                                      CodeGenOpt::Level OptLevel) {
217  if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
218    PM.add(createSSEDomainFixPass());
219    return true;
220  }
221  return false;
222}
223
224bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
225                                      CodeGenOpt::Level OptLevel,
226                                      JITCodeEmitter &JCE) {
227  // FIXME: Move this to TargetJITInfo!
228  // On Darwin, do not override 64-bit setting made in X86TargetMachine().
229  if (DefRelocModel == Reloc::Default &&
230      (!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
231    setRelocationModel(Reloc::Static);
232    Subtarget.setPICStyle(PICStyles::None);
233  }
234
235
236  PM.add(createX86JITCodeEmitterPass(*this, JCE));
237
238  return false;
239}
240
241void X86TargetMachine::setCodeModelForStatic() {
242
243    if (getCodeModel() != CodeModel::Default) return;
244
245    // For static codegen, if we're not already set, use Small codegen.
246    setCodeModel(CodeModel::Small);
247}
248
249
250void X86TargetMachine::setCodeModelForJIT() {
251
252  if (getCodeModel() != CodeModel::Default) return;
253
254  // 64-bit JIT places everything in the same buffer except external functions.
255  if (Subtarget.is64Bit())
256    setCodeModel(CodeModel::Large);
257  else
258    setCodeModel(CodeModel::Small);
259}
260